sky2: use pci_config access functions
Use the PCI layer config access functions. The driver was using the memory mapped window in device, to workaround issues accessing the advanced error reporting registers. Signed-off-by: Stephen Hemminger <shemminger@linux-foundation.org> Signed-off-by: Jeff Garzik <jeff@garzik.org> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Stephen Hemminger
David S. Miller
Родитель
555382cbfc
Коммит
167f53d05f
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@ -223,21 +223,22 @@ static void sky2_power_on(struct sky2_hw *hw)
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sky2_write8(hw, B2_Y2_CLK_GATE, 0);
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if (hw->flags & SKY2_HW_ADV_POWER_CTL) {
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struct pci_dev *pdev = hw->pdev;
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u32 reg;
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sky2_pci_write32(hw, PCI_DEV_REG3, 0);
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pci_write_config_dword(pdev, PCI_DEV_REG3, 0);
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reg = sky2_pci_read32(hw, PCI_DEV_REG4);
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pci_read_config_dword(pdev, PCI_DEV_REG4, ®);
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/* set all bits to 0 except bits 15..12 and 8 */
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reg &= P_ASPM_CONTROL_MSK;
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sky2_pci_write32(hw, PCI_DEV_REG4, reg);
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pci_write_config_dword(pdev, PCI_DEV_REG4, reg);
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reg = sky2_pci_read32(hw, PCI_DEV_REG5);
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pci_read_config_dword(pdev, PCI_DEV_REG5, ®);
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/* set all bits to 0 except bits 28 & 27 */
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reg &= P_CTL_TIM_VMAIN_AV_MSK;
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sky2_pci_write32(hw, PCI_DEV_REG5, reg);
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pci_write_config_dword(pdev, PCI_DEV_REG5, reg);
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sky2_pci_write32(hw, PCI_CFG_REG_1, 0);
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pci_write_config_dword(pdev, PCI_CFG_REG_1, 0);
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/* Enable workaround for dev 4.107 on Yukon-Ultra & Extreme */
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reg = sky2_read32(hw, B2_GP_IO);
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@ -603,6 +604,7 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
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static void sky2_phy_power(struct sky2_hw *hw, unsigned port, int onoff)
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{
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struct pci_dev *pdev = hw->pdev;
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u32 reg1;
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static const u32 phy_power[]
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= { PCI_Y2_PHY1_POWD, PCI_Y2_PHY2_POWD };
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@ -611,15 +613,16 @@ static void sky2_phy_power(struct sky2_hw *hw, unsigned port, int onoff)
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if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
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onoff = !onoff;
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reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
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pci_read_config_dword(pdev, PCI_DEV_REG1, ®1);
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if (onoff)
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/* Turn off phy power saving */
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reg1 &= ~phy_power[port];
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else
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reg1 |= phy_power[port];
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sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
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sky2_pci_read32(hw, PCI_DEV_REG1);
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pci_write_config_dword(pdev, PCI_DEV_REG1, reg1);
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pci_read_config_dword(pdev, PCI_DEV_REG1, ®1);
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udelay(100);
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}
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@ -687,9 +690,9 @@ static void sky2_wol_init(struct sky2_port *sky2)
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sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), ctrl);
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/* Turn on legacy PCI-Express PME mode */
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reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
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pci_read_config_dword(hw->pdev, PCI_DEV_REG1, ®1);
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reg1 |= PCI_Y2_PME_LEGACY;
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sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
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pci_write_config_dword(hw->pdev, PCI_DEV_REG1, reg1);
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/* block receiver */
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sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
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@ -1306,9 +1309,9 @@ static int sky2_up(struct net_device *dev)
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struct sky2_port *osky2 = netdev_priv(otherdev);
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u16 cmd;
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cmd = sky2_pci_read16(hw, cap + PCI_X_CMD);
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pci_read_config_word(hw->pdev, cap + PCI_X_CMD, &cmd);
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cmd &= ~PCI_X_CMD_MAX_SPLIT;
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sky2_pci_write16(hw, cap + PCI_X_CMD, cmd);
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pci_write_config_word(hw->pdev, cap + PCI_X_CMD, cmd);
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sky2->rx_csum = 0;
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osky2->rx_csum = 0;
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@ -2434,13 +2437,13 @@ static void sky2_hw_intr(struct sky2_hw *hw)
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if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) {
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u16 pci_err;
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pci_err = sky2_pci_read16(hw, PCI_STATUS);
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pci_read_config_word(pdev, PCI_STATUS, &pci_err);
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if (net_ratelimit())
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dev_err(&pdev->dev, "PCI hardware error (0x%x)\n",
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pci_err);
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sky2_pci_write16(hw, PCI_STATUS,
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pci_err | PCI_STATUS_ERROR_BITS);
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pci_write_config_word(pdev, PCI_STATUS,
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pci_err | PCI_STATUS_ERROR_BITS);
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}
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if (status & Y2_IS_PCI_EXP) {
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@ -2694,10 +2697,13 @@ static inline u32 sky2_clk2us(const struct sky2_hw *hw, u32 clk)
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static int __devinit sky2_init(struct sky2_hw *hw)
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{
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int rc;
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u8 t8;
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/* Enable all clocks */
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sky2_pci_write32(hw, PCI_DEV_REG3, 0);
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/* Enable all clocks and check for bad PCI access */
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rc = pci_write_config_dword(hw->pdev, PCI_DEV_REG3, 0);
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if (rc)
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return rc;
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sky2_write8(hw, B0_CTST, CS_RST_CLR);
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@ -2791,10 +2797,9 @@ static void sky2_reset(struct sky2_hw *hw)
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sky2_write8(hw, B0_CTST, CS_RST_CLR);
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/* clear PCI errors, if any */
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status = sky2_pci_read16(hw, PCI_STATUS);
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sky2_pci_write16(hw, PCI_STATUS, status | PCI_STATUS_ERROR_BITS);
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pci_read_config_word(pdev, PCI_STATUS, &status);
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status |= PCI_STATUS_ERROR_BITS;
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pci_write_config_word(pdev, PCI_STATUS, status);
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sky2_write8(hw, B0_CTST, CS_MRST_CLR);
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@ -3606,26 +3611,31 @@ static int sky2_get_eeprom_len(struct net_device *dev)
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struct sky2_port *sky2 = netdev_priv(dev);
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u16 reg2;
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reg2 = sky2_pci_read32(sky2->hw, PCI_DEV_REG2);
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pci_read_config_word(sky2->hw->pdev, PCI_DEV_REG2, ®2);
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return 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8);
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}
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static u32 sky2_vpd_read(struct sky2_hw *hw, int cap, u16 offset)
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static u32 sky2_vpd_read(struct pci_dev *pdev, int cap, u16 offset)
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{
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sky2_pci_write16(hw, cap + PCI_VPD_ADDR, offset);
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u32 val;
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while (!(sky2_pci_read16(hw, cap + PCI_VPD_ADDR) & PCI_VPD_ADDR_F))
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cpu_relax();
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return sky2_pci_read32(hw, cap + PCI_VPD_DATA);
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pci_write_config_word(pdev, cap + PCI_VPD_ADDR, offset);
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do {
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pci_read_config_word(pdev, cap + PCI_VPD_ADDR, &offset);
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} while (!(offset & PCI_VPD_ADDR_F));
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pci_read_config_dword(pdev, cap + PCI_VPD_DATA, &val);
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return val;
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}
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static void sky2_vpd_write(struct sky2_hw *hw, int cap, u16 offset, u32 val)
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static void sky2_vpd_write(struct pci_dev *pdev, int cap, u16 offset, u32 val)
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{
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sky2_pci_write32(hw, cap + PCI_VPD_DATA, val);
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sky2_pci_write16(hw, cap + PCI_VPD_ADDR, offset | PCI_VPD_ADDR_F);
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pci_write_config_word(pdev, cap + PCI_VPD_DATA, val);
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pci_write_config_dword(pdev, cap + PCI_VPD_ADDR, offset | PCI_VPD_ADDR_F);
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do {
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cpu_relax();
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} while (sky2_pci_read16(hw, cap + PCI_VPD_ADDR) & PCI_VPD_ADDR_F);
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pci_read_config_word(pdev, cap + PCI_VPD_ADDR, &offset);
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} while (offset & PCI_VPD_ADDR_F);
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}
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static int sky2_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
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@ -3642,7 +3652,7 @@ static int sky2_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom
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eeprom->magic = SKY2_EEPROM_MAGIC;
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while (length > 0) {
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u32 val = sky2_vpd_read(sky2->hw, cap, offset);
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u32 val = sky2_vpd_read(sky2->hw->pdev, cap, offset);
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int n = min_t(int, length, sizeof(val));
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memcpy(data, &val, n);
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@ -3672,10 +3682,10 @@ static int sky2_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom
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int n = min_t(int, length, sizeof(val));
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if (n < sizeof(val))
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val = sky2_vpd_read(sky2->hw, cap, offset);
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val = sky2_vpd_read(sky2->hw->pdev, cap, offset);
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memcpy(&val, data, n);
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sky2_vpd_write(sky2->hw, cap, offset, val);
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sky2_vpd_write(sky2->hw->pdev, cap, offset, val);
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length -= n;
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data += n;
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@ -4116,15 +4126,14 @@ static int __devinit sky2_probe(struct pci_dev *pdev,
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*/
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{
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u32 reg;
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reg = sky2_pci_read32(hw, PCI_DEV_REG2);
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pci_read_config_dword(pdev,PCI_DEV_REG2, ®);
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reg &= ~PCI_REV_DESC;
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sky2_pci_write32(hw, PCI_DEV_REG2, reg);
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pci_write_config_dword(pdev, PCI_DEV_REG2, reg);
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}
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#endif
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/* ring for status responses */
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hw->st_le = pci_alloc_consistent(hw->pdev, STATUS_LE_BYTES,
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&hw->st_dma);
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hw->st_le = pci_alloc_consistent(pdev, STATUS_LE_BYTES, &hw->st_dma);
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if (!hw->st_le)
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goto err_out_iounmap;
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@ -4201,7 +4210,7 @@ err_out_free_netdev:
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free_netdev(dev);
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err_out_free_pci:
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sky2_write8(hw, B0_CTST, CS_RST_SET);
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pci_free_consistent(hw->pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma);
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pci_free_consistent(pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma);
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err_out_iounmap:
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iounmap(hw->regs);
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err_out_free_hw:
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@ -4312,7 +4321,7 @@ static int sky2_resume(struct pci_dev *pdev)
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if (hw->chip_id == CHIP_ID_YUKON_EX ||
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hw->chip_id == CHIP_ID_YUKON_EC_U ||
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hw->chip_id == CHIP_ID_YUKON_FE_P)
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sky2_pci_write32(hw, PCI_DEV_REG3, 0);
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pci_write_config_dword(pdev, PCI_DEV_REG3, 0);
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sky2_reset(hw);
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@ -2129,25 +2129,4 @@ static inline void gma_set_addr(struct sky2_hw *hw, unsigned port, unsigned reg,
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gma_write16(hw, port, reg+4,(u16) addr[2] | ((u16) addr[3] << 8));
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gma_write16(hw, port, reg+8,(u16) addr[4] | ((u16) addr[5] << 8));
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}
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/* PCI config space access */
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static inline u32 sky2_pci_read32(const struct sky2_hw *hw, unsigned reg)
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{
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return sky2_read32(hw, Y2_CFG_SPC + reg);
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}
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static inline u16 sky2_pci_read16(const struct sky2_hw *hw, unsigned reg)
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{
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return sky2_read16(hw, Y2_CFG_SPC + reg);
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}
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static inline void sky2_pci_write32(struct sky2_hw *hw, unsigned reg, u32 val)
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{
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sky2_write32(hw, Y2_CFG_SPC + reg, val);
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}
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static inline void sky2_pci_write16(struct sky2_hw *hw, unsigned reg, u16 val)
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{
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sky2_write16(hw, Y2_CFG_SPC + reg, val);
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}
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#endif
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