spi: spi-fsl-qspi: Introduce variable to fix different invalid master Id
Different platforms have different Master with different SourceID on AHB bus. The 0X0E Master ID is used by cluster 3 in case of LS2088A. So, patch introduce an invalid master id variable to fix invalid mastered on different platforms. Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com> Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Link: https://lore.kernel.org/r/1569920356-8953-1-git-send-email-kuldeep.singh@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Родитель
1b0a2b2d3c
Коммит
16c3e05803
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@ -63,6 +63,11 @@
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#define QUADSPI_IPCR 0x08
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#define QUADSPI_IPCR_SEQID(x) ((x) << 24)
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#define QUADSPI_BUF0CR 0x10
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#define QUADSPI_BUF1CR 0x14
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#define QUADSPI_BUF2CR 0x18
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#define QUADSPI_BUFXCR_INVALID_MSTRID 0xe
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#define QUADSPI_BUF3CR 0x1c
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#define QUADSPI_BUF3CR_ALLMST_MASK BIT(31)
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#define QUADSPI_BUF3CR_ADATSZ(x) ((x) << 8)
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@ -184,6 +189,7 @@
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struct fsl_qspi_devtype_data {
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unsigned int rxfifo;
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unsigned int txfifo;
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int invalid_mstrid;
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unsigned int ahb_buf_size;
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unsigned int quirks;
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bool little_endian;
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@ -192,6 +198,7 @@ struct fsl_qspi_devtype_data {
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static const struct fsl_qspi_devtype_data vybrid_data = {
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.rxfifo = SZ_128,
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.txfifo = SZ_64,
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.invalid_mstrid = QUADSPI_BUFXCR_INVALID_MSTRID,
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.ahb_buf_size = SZ_1K,
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.quirks = QUADSPI_QUIRK_SWAP_ENDIAN,
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.little_endian = true,
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@ -200,6 +207,7 @@ static const struct fsl_qspi_devtype_data vybrid_data = {
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static const struct fsl_qspi_devtype_data imx6sx_data = {
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.rxfifo = SZ_128,
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.txfifo = SZ_512,
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.invalid_mstrid = QUADSPI_BUFXCR_INVALID_MSTRID,
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.ahb_buf_size = SZ_1K,
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.quirks = QUADSPI_QUIRK_4X_INT_CLK | QUADSPI_QUIRK_TKT245618,
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.little_endian = true,
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@ -208,6 +216,7 @@ static const struct fsl_qspi_devtype_data imx6sx_data = {
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static const struct fsl_qspi_devtype_data imx7d_data = {
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.rxfifo = SZ_128,
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.txfifo = SZ_512,
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.invalid_mstrid = QUADSPI_BUFXCR_INVALID_MSTRID,
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.ahb_buf_size = SZ_1K,
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.quirks = QUADSPI_QUIRK_TKT253890 | QUADSPI_QUIRK_4X_INT_CLK,
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.little_endian = true,
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@ -216,6 +225,7 @@ static const struct fsl_qspi_devtype_data imx7d_data = {
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static const struct fsl_qspi_devtype_data imx6ul_data = {
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.rxfifo = SZ_128,
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.txfifo = SZ_512,
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.invalid_mstrid = QUADSPI_BUFXCR_INVALID_MSTRID,
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.ahb_buf_size = SZ_1K,
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.quirks = QUADSPI_QUIRK_TKT253890 | QUADSPI_QUIRK_4X_INT_CLK,
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.little_endian = true,
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@ -224,6 +234,7 @@ static const struct fsl_qspi_devtype_data imx6ul_data = {
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static const struct fsl_qspi_devtype_data ls1021a_data = {
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.rxfifo = SZ_128,
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.txfifo = SZ_64,
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.invalid_mstrid = QUADSPI_BUFXCR_INVALID_MSTRID,
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.ahb_buf_size = SZ_1K,
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.quirks = 0,
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.little_endian = false,
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@ -233,6 +244,7 @@ static const struct fsl_qspi_devtype_data ls2080a_data = {
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.rxfifo = SZ_128,
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.txfifo = SZ_64,
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.ahb_buf_size = SZ_1K,
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.invalid_mstrid = 0x0,
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.quirks = QUADSPI_QUIRK_TKT253890 | QUADSPI_QUIRK_BASE_INTERNAL,
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.little_endian = true,
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};
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@ -615,6 +627,7 @@ static int fsl_qspi_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
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void __iomem *base = q->iobase;
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u32 addr_offset = 0;
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int err = 0;
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int invalid_mstrid = q->devtype_data->invalid_mstrid;
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mutex_lock(&q->lock);
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@ -638,6 +651,10 @@ static int fsl_qspi_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
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qspi_writel(q, QUADSPI_SPTRCLR_BFPTRC | QUADSPI_SPTRCLR_IPPTRC,
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base + QUADSPI_SPTRCLR);
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qspi_writel(q, invalid_mstrid, base + QUADSPI_BUF0CR);
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qspi_writel(q, invalid_mstrid, base + QUADSPI_BUF1CR);
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qspi_writel(q, invalid_mstrid, base + QUADSPI_BUF2CR);
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fsl_qspi_prepare_lut(q, op);
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/*
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