powerpc: Save CFAR before branching in interrupt entry paths
Some of the interrupt vectors on 64-bit POWER server processors are only 32 bytes long, which is not enough for the full first-level interrupt handler. For these we currently just have a branch to an out-of-line handler. However, this means that we corrupt the CFAR (come-from address register) on POWER7 and later processors. To fix this, we split the EXCEPTION_PROLOG_1 macro into two pieces: EXCEPTION_PROLOG_0 contains the part up to the point where the CFAR is saved in the PACA, and EXCEPTION_PROLOG_1 contains the rest. We then put EXCEPTION_PROLOG_0 in the short interrupt vectors before we branch to the out-of-line handler, which contains the rest of the first-level interrupt handler. To facilitate this, we define new _OOL (out of line) variants of STD_EXCEPTION_PSERIES, etc. In order to get EXCEPTION_PROLOG_0 to be short enough, i.e., no more than 6 instructions, it was necessary to move the stores that move the PPR and CFAR values into the PACA into __EXCEPTION_PROLOG_1 and to get rid of one of the two HMT_MEDIUM instructions. Previously there was a HMT_MEDIUM_PPR_DISCARD before the prolog, which was nop'd out on processors with the PPR (POWER7 and later), and then another HMT_MEDIUM inside the HMT_MEDIUM_PPR_SAVE macro call inside __EXCEPTION_PROLOG_1, which was nop'd out on processors without PPR. Now the HMT_MEDIUM inside EXCEPTION_PROLOG_0 is there unconditionally and the HMT_MEDIUM_PPR_DISCARD is not strictly necessary, although this leaves it in for the interrupt vectors where there is room for it. Previously we had a handler for hypervisor maintenance interrupts at 0xe50, which doesn't leave enough room for the vector for hypervisor emulation assist interrupts at 0xe40, since we need 8 instructions. The 0xe50 vector was only used on POWER6, as the HMI vector was moved to 0xe60 on POWER7. Since we don't support running in hypervisor mode on POWER6, we just remove the handler at 0xe50. This also changes denorm_exception_hv to use EXCEPTION_PROLOG_0 instead of open-coding it, and removes the HMT_MEDIUM_PPR_DISCARD from the relocation-on vectors (since any CPU that supports relocation-on interrupts also has the PPR). Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
Paul Mackerras
Benjamin Herrenschmidt
Родитель
6100209bf6
Коммит
1707dd1613
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@ -50,7 +50,7 @@
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#define EX_PPR 88 /* SMT thread status register (priority) */
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#ifdef CONFIG_RELOCATABLE
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#define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
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#define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
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ld r12,PACAKBASE(r13); /* get high part of &label */ \
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mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
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LOAD_HANDLER(r12,label); \
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@ -61,13 +61,15 @@
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blr;
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#else
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/* If not relocatable, we can jump directly -- and save messing with LR */
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#define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
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#define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
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mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
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mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
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li r10,MSR_RI; \
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mtmsrd r10,1; /* Set RI (EE=0) */ \
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b label;
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#endif
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#define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
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__EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
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/*
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* As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on
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@ -75,6 +77,7 @@
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* case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr.
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*/
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#define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \
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EXCEPTION_PROLOG_0(area); \
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EXCEPTION_PROLOG_1(area, extra, vec); \
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EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)
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@ -135,25 +138,32 @@ BEGIN_FTR_SECTION_NESTED(942) \
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END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,0,942) /*non P7*/
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/*
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* Save PPR in paca whenever some register is available to use.
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* Then increase the priority.
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* Get an SPR into a register if the CPU has the given feature
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*/
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#define HMT_MEDIUM_PPR_SAVE(area, ra) \
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#define OPT_GET_SPR(ra, spr, ftr) \
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BEGIN_FTR_SECTION_NESTED(943) \
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mfspr ra,SPRN_PPR; \
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std ra,area+EX_PPR(r13); \
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HMT_MEDIUM; \
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END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,943)
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mfspr ra,spr; \
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END_FTR_SECTION_NESTED(ftr,ftr,943)
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#define __EXCEPTION_PROLOG_1(area, extra, vec) \
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/*
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* Save a register to the PACA if the CPU has the given feature
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*/
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#define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \
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BEGIN_FTR_SECTION_NESTED(943) \
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std ra,offset(r13); \
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END_FTR_SECTION_NESTED(ftr,ftr,943)
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#define EXCEPTION_PROLOG_0(area) \
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GET_PACA(r13); \
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std r9,area+EX_R9(r13); /* save r9 */ \
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HMT_MEDIUM_PPR_SAVE(area, r9); \
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OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \
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HMT_MEDIUM; \
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std r10,area+EX_R10(r13); /* save r10 - r12 */ \
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BEGIN_FTR_SECTION_NESTED(66); \
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mfspr r10,SPRN_CFAR; \
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std r10,area+EX_CFAR(r13); \
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END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
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OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR)
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#define __EXCEPTION_PROLOG_1(area, extra, vec) \
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OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \
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OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \
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SAVE_LR(r10, area); \
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mfcr r9; \
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extra(vec); \
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@ -178,6 +188,7 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,943)
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__EXCEPTION_PROLOG_PSERIES_1(label, h)
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#define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \
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EXCEPTION_PROLOG_0(area); \
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EXCEPTION_PROLOG_1(area, extra, vec); \
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EXCEPTION_PROLOG_PSERIES_1(label, h);
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@ -312,6 +323,13 @@ label##_pSeries: \
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EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
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EXC_STD, KVMTEST_PR, vec)
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/* Version of above for when we have to branch out-of-line */
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#define STD_EXCEPTION_PSERIES_OOL(vec, label) \
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.globl label##_pSeries; \
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label##_pSeries: \
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EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \
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EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_STD)
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#define STD_EXCEPTION_HV(loc, vec, label) \
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. = loc; \
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.globl label##_hv; \
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@ -321,6 +339,13 @@ label##_hv: \
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EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
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EXC_HV, KVMTEST, vec)
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/* Version of above for when we have to branch out-of-line */
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#define STD_EXCEPTION_HV_OOL(vec, label) \
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.globl label##_hv; \
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label##_hv: \
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EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST, vec); \
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EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV)
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#define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \
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. = loc; \
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.globl label##_relon_pSeries; \
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@ -331,6 +356,12 @@ label##_relon_pSeries: \
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EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
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EXC_STD, KVMTEST_PR, vec)
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#define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label) \
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.globl label##_relon_pSeries; \
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label##_relon_pSeries: \
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EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \
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EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, EXC_STD)
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#define STD_RELON_EXCEPTION_HV(loc, vec, label) \
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. = loc; \
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.globl label##_relon_hv; \
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@ -341,6 +372,12 @@ label##_relon_hv: \
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EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
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EXC_HV, KVMTEST, vec)
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#define STD_RELON_EXCEPTION_HV_OOL(vec, label) \
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.globl label##_relon_hv; \
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label##_relon_hv: \
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EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST, vec); \
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EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, EXC_HV)
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/* This associate vector numbers with bits in paca->irq_happened */
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#define SOFTEN_VALUE_0x500 PACA_IRQ_EE
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#define SOFTEN_VALUE_0x502 PACA_IRQ_EE
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@ -375,8 +412,10 @@ label##_relon_hv: \
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#define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
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HMT_MEDIUM_PPR_DISCARD; \
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SET_SCRATCH0(r13); /* save r13 */ \
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__EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
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EXCEPTION_PROLOG_0(PACA_EXGEN); \
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__EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
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EXCEPTION_PROLOG_PSERIES_1(label##_common, h);
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#define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
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__MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)
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@ -394,9 +433,16 @@ label##_hv: \
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_MASKABLE_EXCEPTION_PSERIES(vec, label, \
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EXC_HV, SOFTEN_TEST_HV)
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#define MASKABLE_EXCEPTION_HV_OOL(vec, label) \
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.globl label##_hv; \
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label##_hv: \
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EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \
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EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV);
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#define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \
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HMT_MEDIUM_PPR_DISCARD; \
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SET_SCRATCH0(r13); /* save r13 */ \
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EXCEPTION_PROLOG_0(PACA_EXGEN); \
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__EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
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EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, h);
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#define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \
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@ -416,6 +462,12 @@ label##_relon_hv: \
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_MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \
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EXC_HV, SOFTEN_NOTEST_HV)
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#define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label) \
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.globl label##_relon_hv; \
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label##_relon_hv: \
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EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_HV, vec); \
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EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV);
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/*
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* Our exception common code can be passed various "additions"
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* to specify the behaviour of interrupts, whether to kick the
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@ -153,7 +153,10 @@ machine_check_pSeries_1:
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* some code path might still want to branch into the original
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* vector
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*/
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b machine_check_pSeries
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HMT_MEDIUM_PPR_DISCARD
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SET_SCRATCH0(r13) /* save r13 */
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EXCEPTION_PROLOG_0(PACA_EXMC)
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b machine_check_pSeries_0
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. = 0x300
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.globl data_access_pSeries
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@ -172,6 +175,7 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
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data_access_slb_pSeries:
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HMT_MEDIUM_PPR_DISCARD
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SET_SCRATCH0(r13)
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EXCEPTION_PROLOG_0(PACA_EXSLB)
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EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380)
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std r3,PACA_EXSLB+EX_R3(r13)
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mfspr r3,SPRN_DAR
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@ -203,6 +207,7 @@ data_access_slb_pSeries:
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instruction_access_slb_pSeries:
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HMT_MEDIUM_PPR_DISCARD
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SET_SCRATCH0(r13)
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EXCEPTION_PROLOG_0(PACA_EXSLB)
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EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480)
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std r3,PACA_EXSLB+EX_R3(r13)
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mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
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@ -284,16 +289,28 @@ system_call_pSeries:
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*/
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. = 0xe00
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hv_exception_trampoline:
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SET_SCRATCH0(r13)
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EXCEPTION_PROLOG_0(PACA_EXGEN)
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b h_data_storage_hv
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. = 0xe20
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SET_SCRATCH0(r13)
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EXCEPTION_PROLOG_0(PACA_EXGEN)
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b h_instr_storage_hv
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. = 0xe40
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SET_SCRATCH0(r13)
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EXCEPTION_PROLOG_0(PACA_EXGEN)
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b emulation_assist_hv
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. = 0xe50
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b hmi_exception_hv
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. = 0xe60
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SET_SCRATCH0(r13)
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EXCEPTION_PROLOG_0(PACA_EXGEN)
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b hmi_exception_hv
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. = 0xe80
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SET_SCRATCH0(r13)
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EXCEPTION_PROLOG_0(PACA_EXGEN)
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b h_doorbell_hv
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/* We need to deal with the Altivec unavailable exception
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@ -303,14 +320,20 @@ hv_exception_trampoline:
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*/
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performance_monitor_pSeries_1:
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. = 0xf00
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SET_SCRATCH0(r13)
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EXCEPTION_PROLOG_0(PACA_EXGEN)
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b performance_monitor_pSeries
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altivec_unavailable_pSeries_1:
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. = 0xf20
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SET_SCRATCH0(r13)
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EXCEPTION_PROLOG_0(PACA_EXGEN)
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b altivec_unavailable_pSeries
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vsx_unavailable_pSeries_1:
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. = 0xf40
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SET_SCRATCH0(r13)
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EXCEPTION_PROLOG_0(PACA_EXGEN)
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b vsx_unavailable_pSeries
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#ifdef CONFIG_CBE_RAS
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@ -326,10 +349,7 @@ vsx_unavailable_pSeries_1:
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denorm_exception_hv:
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HMT_MEDIUM_PPR_DISCARD
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mtspr SPRN_SPRG_HSCRATCH0,r13
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mfspr r13,SPRN_SPRG_HPACA
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std r9,PACA_EXGEN+EX_R9(r13)
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HMT_MEDIUM_PPR_SAVE(PACA_EXGEN, r9)
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std r10,PACA_EXGEN+EX_R10(r13)
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EXCEPTION_PROLOG_0(PACA_EXGEN)
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std r11,PACA_EXGEN+EX_R11(r13)
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std r12,PACA_EXGEN+EX_R12(r13)
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mfspr r9,SPRN_SPRG_HSCRATCH0
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@ -372,8 +392,10 @@ machine_check_pSeries:
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machine_check_fwnmi:
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HMT_MEDIUM_PPR_DISCARD
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SET_SCRATCH0(r13) /* save r13 */
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EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common,
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EXC_STD, KVMTEST, 0x200)
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EXCEPTION_PROLOG_0(PACA_EXMC)
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machine_check_pSeries_0:
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EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST, 0x200)
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EXCEPTION_PROLOG_PSERIES_1(machine_check_common, EXC_STD)
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KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200)
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/* moved from 0x300 */
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@ -510,23 +532,23 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
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.align 7
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/* moved from 0xe00 */
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STD_EXCEPTION_HV(., 0xe02, h_data_storage)
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STD_EXCEPTION_HV_OOL(0xe02, h_data_storage)
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KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)
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STD_EXCEPTION_HV(., 0xe22, h_instr_storage)
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STD_EXCEPTION_HV_OOL(0xe22, h_instr_storage)
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KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22)
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STD_EXCEPTION_HV(., 0xe42, emulation_assist)
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STD_EXCEPTION_HV_OOL(0xe42, emulation_assist)
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KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42)
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STD_EXCEPTION_HV(., 0xe62, hmi_exception) /* need to flush cache ? */
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STD_EXCEPTION_HV_OOL(0xe62, hmi_exception) /* need to flush cache ? */
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KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62)
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MASKABLE_EXCEPTION_HV(., 0xe82, h_doorbell)
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MASKABLE_EXCEPTION_HV_OOL(0xe82, h_doorbell)
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KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82)
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/* moved from 0xf00 */
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STD_EXCEPTION_PSERIES(., 0xf00, performance_monitor)
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STD_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
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KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf00)
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STD_EXCEPTION_PSERIES(., 0xf20, altivec_unavailable)
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STD_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
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KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf20)
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STD_EXCEPTION_PSERIES(., 0xf40, vsx_unavailable)
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STD_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable)
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KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf40)
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/*
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@ -718,8 +740,8 @@ machine_check_common:
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. = 0x4380
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.globl data_access_slb_relon_pSeries
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data_access_slb_relon_pSeries:
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HMT_MEDIUM_PPR_DISCARD
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SET_SCRATCH0(r13)
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EXCEPTION_PROLOG_0(PACA_EXSLB)
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||||
EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380)
|
||||
std r3,PACA_EXSLB+EX_R3(r13)
|
||||
mfspr r3,SPRN_DAR
|
||||
|
|
@ -743,8 +765,8 @@ data_access_slb_relon_pSeries:
|
|||
. = 0x4480
|
||||
.globl instruction_access_slb_relon_pSeries
|
||||
instruction_access_slb_relon_pSeries:
|
||||
HMT_MEDIUM_PPR_DISCARD
|
||||
SET_SCRATCH0(r13)
|
||||
EXCEPTION_PROLOG_0(PACA_EXSLB)
|
||||
EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480)
|
||||
std r3,PACA_EXSLB+EX_R3(r13)
|
||||
mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
|
||||
|
|
@ -788,33 +810,46 @@ system_call_relon_pSeries:
|
|||
STD_RELON_EXCEPTION_PSERIES(0x4d00, 0xd00, single_step)
|
||||
|
||||
. = 0x4e00
|
||||
SET_SCRATCH0(r13)
|
||||
EXCEPTION_PROLOG_0(PACA_EXGEN)
|
||||
b h_data_storage_relon_hv
|
||||
|
||||
. = 0x4e20
|
||||
SET_SCRATCH0(r13)
|
||||
EXCEPTION_PROLOG_0(PACA_EXGEN)
|
||||
b h_instr_storage_relon_hv
|
||||
|
||||
. = 0x4e40
|
||||
SET_SCRATCH0(r13)
|
||||
EXCEPTION_PROLOG_0(PACA_EXGEN)
|
||||
b emulation_assist_relon_hv
|
||||
|
||||
. = 0x4e50
|
||||
b hmi_exception_relon_hv
|
||||
|
||||
. = 0x4e60
|
||||
SET_SCRATCH0(r13)
|
||||
EXCEPTION_PROLOG_0(PACA_EXGEN)
|
||||
b hmi_exception_relon_hv
|
||||
|
||||
. = 0x4e80
|
||||
SET_SCRATCH0(r13)
|
||||
EXCEPTION_PROLOG_0(PACA_EXGEN)
|
||||
b h_doorbell_relon_hv
|
||||
|
||||
performance_monitor_relon_pSeries_1:
|
||||
. = 0x4f00
|
||||
SET_SCRATCH0(r13)
|
||||
EXCEPTION_PROLOG_0(PACA_EXGEN)
|
||||
b performance_monitor_relon_pSeries
|
||||
|
||||
altivec_unavailable_relon_pSeries_1:
|
||||
. = 0x4f20
|
||||
SET_SCRATCH0(r13)
|
||||
EXCEPTION_PROLOG_0(PACA_EXGEN)
|
||||
b altivec_unavailable_relon_pSeries
|
||||
|
||||
vsx_unavailable_relon_pSeries_1:
|
||||
. = 0x4f40
|
||||
SET_SCRATCH0(r13)
|
||||
EXCEPTION_PROLOG_0(PACA_EXGEN)
|
||||
b vsx_unavailable_relon_pSeries
|
||||
|
||||
STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint)
|
||||
|
|
@ -1171,20 +1206,20 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
|
|||
__end_handlers:
|
||||
|
||||
/* Equivalents to the above handlers for relocation-on interrupt vectors */
|
||||
STD_RELON_EXCEPTION_HV(., 0xe00, h_data_storage)
|
||||
STD_RELON_EXCEPTION_HV_OOL(0xe00, h_data_storage)
|
||||
KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe00)
|
||||
STD_RELON_EXCEPTION_HV(., 0xe20, h_instr_storage)
|
||||
STD_RELON_EXCEPTION_HV_OOL(0xe20, h_instr_storage)
|
||||
KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe20)
|
||||
STD_RELON_EXCEPTION_HV(., 0xe40, emulation_assist)
|
||||
STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist)
|
||||
KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe40)
|
||||
STD_RELON_EXCEPTION_HV(., 0xe60, hmi_exception)
|
||||
STD_RELON_EXCEPTION_HV_OOL(0xe60, hmi_exception)
|
||||
KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe60)
|
||||
MASKABLE_RELON_EXCEPTION_HV(., 0xe80, h_doorbell)
|
||||
MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell)
|
||||
KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe80)
|
||||
|
||||
STD_RELON_EXCEPTION_PSERIES(., 0xf00, performance_monitor)
|
||||
STD_RELON_EXCEPTION_PSERIES(., 0xf20, altivec_unavailable)
|
||||
STD_RELON_EXCEPTION_PSERIES(., 0xf40, vsx_unavailable)
|
||||
STD_RELON_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
|
||||
STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
|
||||
STD_RELON_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable)
|
||||
|
||||
#if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
|
||||
/*
|
||||
|
|
|
|||
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