ARM: dts: r8a7794: Add DU1 clock to device tree
Add the missing module clock for the second channel of the display unit. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Родитель
3932197c01
Коммит
1764f8081f
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@ -1270,19 +1270,21 @@
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clocks = <&mp_clk>, <&hp_clk>,
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<&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
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<&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
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<&zx_clk>;
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<&zx_clk>, <&zx_clk>;
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#clock-cells = <1>;
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clock-indices = <
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R8A7794_CLK_EHCI R8A7794_CLK_HSUSB
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R8A7794_CLK_HSCIF2 R8A7794_CLK_SCIF5
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R8A7794_CLK_SCIF4 R8A7794_CLK_HSCIF1 R8A7794_CLK_HSCIF0
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R8A7794_CLK_SCIF3 R8A7794_CLK_SCIF2 R8A7794_CLK_SCIF1
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R8A7794_CLK_SCIF0 R8A7794_CLK_DU0
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R8A7794_CLK_SCIF0
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R8A7794_CLK_DU1 R8A7794_CLK_DU0
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>;
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clock-output-names =
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"ehci", "hsusb",
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"hscif2", "scif5", "scif4", "hscif1", "hscif0",
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"scif3", "scif2", "scif1", "scif0", "du0";
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"scif3", "scif2", "scif1", "scif0",
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"du1", "du0";
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};
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mstp8_clks: mstp8_clks@e6150990 {
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compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
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@ -82,6 +82,7 @@
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#define R8A7794_CLK_SCIF2 19
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#define R8A7794_CLK_SCIF1 20
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#define R8A7794_CLK_SCIF0 21
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#define R8A7794_CLK_DU1 23
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#define R8A7794_CLK_DU0 24
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/* MSTP8 */
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