OMAP/serial: Fix incorrect Rx FIFO threshold setting, LSR validation on Tx, and Tx FIFO IRQ generation
Original configuration of Rx FIFO threshold contained an error that resulted Rx threshold to be effectively set to 1 character instead of 16 characters, as noted in comments. Checking LSR to contain UART_LSR_THRE bit set caused issue when not all UART_IER_THRI interrupts have been properly handled. This caused gap in Tx data, visible on high baud rates using oscilloscope. Setting OMAP_UART_SCR_TX_EMPTY bit in SCR caused UART_IER_THRI interrupt to be raised only when Tx FIFO and Tx shift registers are empty. Signed-off-by: Alexey Pelykh <alexey.pelykh@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Родитель
f26402e817
Коммит
1776fd059c
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@ -59,6 +59,7 @@
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/* SCR register bitmasks */
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#define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7)
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#define OMAP_UART_SCR_TX_TRIG_GRANU1_MASK (1 << 6)
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#define OMAP_UART_SCR_TX_EMPTY (1 << 3)
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/* FCR register bitmasks */
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@ -320,9 +321,6 @@ static void transmit_chars(struct uart_omap_port *up, unsigned int lsr)
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struct circ_buf *xmit = &up->port.state->xmit;
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int count;
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if (!(lsr & UART_LSR_THRE))
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return;
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if (up->port.x_char) {
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serial_out(up, UART_TX, up->port.x_char);
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up->port.icount.tx++;
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@ -864,7 +862,7 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
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serial_out(up, UART_IER, up->ier);
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serial_out(up, UART_LCR, cval); /* reset DLAB */
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up->lcr = cval;
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up->scr = OMAP_UART_SCR_TX_EMPTY;
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up->scr = 0;
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/* FIFOs and DMA Settings */
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@ -888,8 +886,6 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
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serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
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/* FIFO ENABLE, DMA MODE */
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up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK;
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/* Set receive FIFO threshold to 16 characters and
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* transmit FIFO threshold to 16 spaces
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*/
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