media: dt-bindings: media: renesas,vsp1: Document RZ/G2L VSPD bindings

Document VSPD found in RZ/G2L SoC. VSPD block is similar to VSP2-D
found on R-Car SoC's, but it does not have a version register and
it has 3 clocks compared to 1 clock on vsp1 and vsp2.

This patch introduces a new compatible 'renesas,r9a07g044-vsp2' to
handle these differences.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
This commit is contained in:
Biju Das 2022-08-28 10:13:30 +02:00 коммит произвёл Mauro Carvalho Chehab
Родитель 4029372233
Коммит 17b5179ef6
1 изменённых файлов: 40 добавлений и 13 удалений

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@ -17,6 +17,7 @@ description:
properties:
compatible:
enum:
- renesas,r9a07g044-vsp2 # RZ/G2L
- renesas,vsp1 # R-Car Gen2 and RZ/G1
- renesas,vsp2 # R-Car Gen3 and RZ/G2
@ -26,8 +27,8 @@ properties:
interrupts:
maxItems: 1
clocks:
maxItems: 1
clocks: true
clock-names: true
power-domains:
maxItems: 1
@ -50,17 +51,43 @@ required:
additionalProperties: false
if:
properties:
compatible:
items:
- const: renesas,vsp1
then:
properties:
renesas,fcp: false
else:
required:
- renesas,fcp
allOf:
- if:
properties:
compatible:
contains:
const: renesas,vsp1
then:
properties:
renesas,fcp: false
else:
required:
- renesas,fcp
- if:
properties:
compatible:
contains:
const: renesas,r9a07g044-vsp2
then:
properties:
clocks:
items:
- description: Main clock
- description: Register access clock
- description: Video clock
clock-names:
items:
- const: aclk
- const: pclk
- const: vclk
required:
- clock-names
else:
properties:
clocks:
maxItems: 1
clock-names: false
examples:
# R8A7790 (R-Car H2) VSP1-S