crypto: omap-aes - Switch to PIO mode during probe
In cases where requesting for DMA channels fails for some reason, or channel numbers are not provided in DT or platform data, we switch to PIO-only mode also checking if platform provides IRQ numbers and interrupt register offsets in DT and platform data. All dma-only paths are avoided in this mode. Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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98837abc86
Коммит
1801ad9483
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@ -1075,7 +1075,7 @@ static int omap_aes_probe(struct platform_device *pdev)
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struct omap_aes_dev *dd;
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struct crypto_alg *algp;
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struct resource res;
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int err = -ENOMEM, i, j;
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int err = -ENOMEM, i, j, irq = -1;
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u32 reg;
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dd = kzalloc(sizeof(struct omap_aes_dev), GFP_KERNEL);
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@ -1118,8 +1118,23 @@ static int omap_aes_probe(struct platform_device *pdev)
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tasklet_init(&dd->queue_task, omap_aes_queue_task, (unsigned long)dd);
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err = omap_aes_dma_init(dd);
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if (err)
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goto err_dma;
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if (err && AES_REG_IRQ_STATUS(dd) && AES_REG_IRQ_ENABLE(dd)) {
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dd->pio_only = 1;
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irq = platform_get_irq(pdev, 0);
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if (irq < 0) {
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dev_err(dev, "can't get IRQ resource\n");
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goto err_irq;
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}
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err = request_irq(irq, omap_aes_irq, 0,
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dev_name(dev), dd);
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if (err) {
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dev_err(dev, "Unable to grab omap-aes IRQ\n");
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goto err_irq;
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}
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}
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INIT_LIST_HEAD(&dd->list);
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spin_lock(&list_lock);
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@ -1147,8 +1162,11 @@ err_algs:
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for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--)
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crypto_unregister_alg(
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&dd->pdata->algs_info[i].algs_list[j]);
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omap_aes_dma_cleanup(dd);
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err_dma:
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if (dd->pio_only)
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free_irq(irq, dd);
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else
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omap_aes_dma_cleanup(dd);
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err_irq:
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tasklet_kill(&dd->done_task);
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tasklet_kill(&dd->queue_task);
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pm_runtime_disable(dev);
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