drm/nouveau/pm/gk104: re-use gf100_pm_ctor()
gk104_pm_ctor() is equal to gf100_pm_ctor(). Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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261d678d10
Коммит
1914f673ec
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@ -29,6 +29,6 @@ extern struct nvkm_oclass *gt215_pm_oclass;
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extern struct nvkm_oclass *gf100_pm_oclass;
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extern struct nvkm_oclass *gf100_pm_oclass;
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extern struct nvkm_oclass *gf108_pm_oclass;
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extern struct nvkm_oclass *gf108_pm_oclass;
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extern struct nvkm_oclass *gf117_pm_oclass;
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extern struct nvkm_oclass *gf117_pm_oclass;
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extern struct nvkm_oclass gk104_pm_oclass;
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extern struct nvkm_oclass *gk104_pm_oclass;
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extern struct nvkm_oclass gk110_pm_oclass;
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extern struct nvkm_oclass gk110_pm_oclass;
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#endif
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#endif
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@ -91,7 +91,7 @@ gk104_identify(struct nvkm_device *device)
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device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
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device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
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device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
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device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
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device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
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device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
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device->oclass[NVDEV_ENGINE_PM ] = &gk104_pm_oclass;
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device->oclass[NVDEV_ENGINE_PM ] = gk104_pm_oclass;
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break;
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break;
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case 0xe7:
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case 0xe7:
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device->cname = "GK107";
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device->cname = "GK107";
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@ -125,7 +125,7 @@ gk104_identify(struct nvkm_device *device)
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device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
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device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
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device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
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device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
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device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
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device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
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device->oclass[NVDEV_ENGINE_PM ] = &gk104_pm_oclass;
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device->oclass[NVDEV_ENGINE_PM ] = gk104_pm_oclass;
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break;
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break;
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case 0xe6:
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case 0xe6:
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device->cname = "GK106";
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device->cname = "GK106";
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@ -159,7 +159,7 @@ gk104_identify(struct nvkm_device *device)
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device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
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device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
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device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
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device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
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device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
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device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
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device->oclass[NVDEV_ENGINE_PM ] = &gk104_pm_oclass;
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device->oclass[NVDEV_ENGINE_PM ] = gk104_pm_oclass;
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break;
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break;
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case 0xea:
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case 0xea:
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device->cname = "GK20A";
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device->cname = "GK20A";
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@ -179,7 +179,7 @@ gk104_identify(struct nvkm_device *device)
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device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
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device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
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device->oclass[NVDEV_ENGINE_GR ] = gk20a_gr_oclass;
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device->oclass[NVDEV_ENGINE_GR ] = gk20a_gr_oclass;
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device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
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device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
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device->oclass[NVDEV_ENGINE_PM ] = &gk104_pm_oclass;
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device->oclass[NVDEV_ENGINE_PM ] = gk104_pm_oclass;
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device->oclass[NVDEV_SUBDEV_VOLT ] = &gk20a_volt_oclass;
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device->oclass[NVDEV_SUBDEV_VOLT ] = &gk20a_volt_oclass;
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device->oclass[NVDEV_SUBDEV_PMU ] = gk20a_pmu_oclass;
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device->oclass[NVDEV_SUBDEV_PMU ] = gk20a_pmu_oclass;
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break;
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break;
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@ -85,58 +85,16 @@ gk104_pm_part[] = {
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{}
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{}
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};
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};
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static int
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struct nvkm_oclass *
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gk104_pm_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
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gk104_pm_oclass = &(struct gf100_pm_oclass) {
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struct nvkm_oclass *oclass, void *data, u32 size,
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.base.handle = NV_ENGINE(PM, 0xe0),
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struct nvkm_object **pobject)
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.base.ofuncs = &(struct nvkm_ofuncs) {
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{
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.ctor = gf100_pm_ctor,
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struct gf100_pm_priv *priv;
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u32 mask;
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int ret;
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ret = nvkm_pm_create(parent, engine, oclass, &priv);
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*pobject = nv_object(priv);
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if (ret)
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return ret;
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/* HUB */
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ret = nvkm_perfdom_new(&priv->base, "hub", 0, 0x1b0000, 0, 0x200,
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gk104_pm_hub);
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if (ret)
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return ret;
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/* GPC */
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mask = (1 << nv_rd32(priv, 0x022430)) - 1;
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mask &= ~nv_rd32(priv, 0x022504);
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mask &= ~nv_rd32(priv, 0x022584);
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ret = nvkm_perfdom_new(&priv->base, "gpc", mask, 0x180000,
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0x1000, 0x200, gk104_pm_gpc);
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if (ret)
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return ret;
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/* PART */
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mask = (1 << nv_rd32(priv, 0x022438)) - 1;
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mask &= ~nv_rd32(priv, 0x022548);
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mask &= ~nv_rd32(priv, 0x0225c8);
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ret = nvkm_perfdom_new(&priv->base, "part", mask, 0x1a0000,
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0x1000, 0x200, gk104_pm_part);
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if (ret)
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return ret;
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nv_engine(priv)->cclass = &nvkm_pm_cclass;
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nv_engine(priv)->sclass = nvkm_pm_sclass;
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return 0;
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}
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struct nvkm_oclass
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gk104_pm_oclass = {
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.handle = NV_ENGINE(PM, 0xe0),
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.ofuncs = &(struct nvkm_ofuncs) {
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.ctor = gk104_pm_ctor,
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.dtor = _nvkm_pm_dtor,
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.dtor = _nvkm_pm_dtor,
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.init = _nvkm_pm_init,
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.init = _nvkm_pm_init,
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.fini = gf100_pm_fini,
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.fini = gf100_pm_fini,
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},
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},
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};
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.doms_gpc = gk104_pm_gpc,
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.doms_hub = gk104_pm_hub,
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.doms_part = gk104_pm_part,
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}.base;
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