ARM: S5PV310: Add support HSMMC and SDHCI configuration
This patch adds support HSMMC for S5PV310 and S5PC210 and setup for HSMMC host controller and also related GPIO. At most 4 channel can be used at the same time. A user can configure SDHCI data bus as 8bit or 4bit. Signed-off-by: Hyuk Lee <hyuk1.lee@samsung.com> Signed-off-by: Jeongbae Seo <jeongbae.seo@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Hyuk Lee
Kukjin Kim
Родитель
2ad530d2e7
Коммит
193151142b
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@ -24,6 +24,17 @@ config S5PV310_SETUP_I2C2
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help
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Common setup code for i2c bus 2.
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config S5PV310_SETUP_SDHCI
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bool
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select S5PV310_SETUP_SDHCI_GPIO
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help
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Internal helper functions for S5PV310 based SDHCI systems.
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config S5PV310_SETUP_SDHCI_GPIO
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bool
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help
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Common setup code for SDHCI gpio.
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# machine support
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menu "S5PC210 Machines"
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@ -33,6 +44,11 @@ config MACH_SMDKC210
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select CPU_S5PV310
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select S3C_DEV_RTC
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select S3C_DEV_WDT
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select S3C_DEV_HSMMC
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select S3C_DEV_HSMMC1
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select S3C_DEV_HSMMC2
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select S3C_DEV_HSMMC3
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select S5PV310_SETUP_SDHCI
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help
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Machine support for Samsung SMDKC210
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S5PC210(MCP) is one of package option of S5PV310
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@ -53,9 +69,32 @@ config MACH_SMDKV310
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select CPU_S5PV310
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select S3C_DEV_RTC
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select S3C_DEV_WDT
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select S3C_DEV_HSMMC
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select S3C_DEV_HSMMC1
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select S3C_DEV_HSMMC2
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select S3C_DEV_HSMMC3
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select S5PV310_SETUP_SDHCI
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help
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Machine support for Samsung SMDKV310
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endmenu
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comment "Configuration for HSMMC bus width"
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menu "Use 8-bit bus width"
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config S5PV310_SDHCI_CH0_8BIT
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bool "Channel 0 with 8-bit bus"
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help
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Support HSMMC Channel 0 8-bit bus.
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If selected, Channel 1 is disabled.
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config S5PV310_SDHCI_CH2_8BIT
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bool "Channel 2 with 8-bit bus"
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help
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Support HSMMC Channel 2 8-bit bus.
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If selected, Channel 3 is disabled.
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endmenu
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endif
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@ -29,3 +29,5 @@ obj-$(CONFIG_MACH_UNIVERSAL_C210) += mach-universal_c210.o
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obj-$(CONFIG_S5PV310_SETUP_I2C1) += setup-i2c1.o
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obj-$(CONFIG_S5PV310_SETUP_I2C2) += setup-i2c2.o
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obj-$(CONFIG_S5PV310_SETUP_SDHCI) += setup-sdhci.o
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obj-$(CONFIG_S5PV310_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
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@ -0,0 +1,152 @@
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/* linux/arch/arm/mach-s5pv310/setup-sdhci-gpio.c
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* S5PV310 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/gpio.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/card.h>
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#include <plat/gpio-cfg.h>
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#include <plat/regs-sdhci.h>
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#include <plat/sdhci.h>
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void s5pv310_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
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{
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struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
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unsigned int gpio;
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/* Set all the necessary GPK0[0:1] pins to special-function 2 */
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for (gpio = S5PV310_GPK0(0); gpio < S5PV310_GPK0(2); gpio++) {
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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switch (width) {
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case 8:
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for (gpio = S5PV310_GPK1(3); gpio <= S5PV310_GPK1(6); gpio++) {
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/* Data pin GPK1[3:6] to special-funtion 3 */
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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case 4:
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for (gpio = S5PV310_GPK0(3); gpio <= S5PV310_GPK0(6); gpio++) {
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/* Data pin GPK0[3:6] to special-funtion 2 */
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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default:
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break;
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}
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if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
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s3c_gpio_cfgpin(S5PV310_GPK0(2), S3C_GPIO_SFN(2));
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s3c_gpio_setpull(S5PV310_GPK0(2), S3C_GPIO_PULL_UP);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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}
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void s5pv310_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
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{
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struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
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unsigned int gpio;
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/* Set all the necessary GPK1[0:1] pins to special-function 2 */
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for (gpio = S5PV310_GPK1(0); gpio < S5PV310_GPK1(2); gpio++) {
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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for (gpio = S5PV310_GPK1(3); gpio <= S5PV310_GPK1(6); gpio++) {
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/* Data pin GPK1[3:6] to special-function 2 */
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
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s3c_gpio_cfgpin(S5PV310_GPK1(2), S3C_GPIO_SFN(2));
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s3c_gpio_setpull(S5PV310_GPK1(2), S3C_GPIO_PULL_UP);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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}
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void s5pv310_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
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{
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struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
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unsigned int gpio;
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/* Set all the necessary GPK2[0:1] pins to special-function 2 */
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for (gpio = S5PV310_GPK2(0); gpio < S5PV310_GPK2(2); gpio++) {
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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switch (width) {
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case 8:
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for (gpio = S5PV310_GPK3(3); gpio <= S5PV310_GPK3(6); gpio++) {
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/* Data pin GPK3[3:6] to special-function 3 */
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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case 4:
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for (gpio = S5PV310_GPK2(3); gpio <= S5PV310_GPK2(6); gpio++) {
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/* Data pin GPK2[3:6] to special-function 2 */
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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default:
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break;
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}
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if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
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s3c_gpio_cfgpin(S5PV310_GPK2(2), S3C_GPIO_SFN(2));
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s3c_gpio_setpull(S5PV310_GPK2(2), S3C_GPIO_PULL_UP);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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}
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void s5pv310_setup_sdhci3_cfg_gpio(struct platform_device *dev, int width)
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{
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struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
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unsigned int gpio;
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/* Set all the necessary GPK3[0:1] pins to special-function 2 */
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for (gpio = S5PV310_GPK3(0); gpio < S5PV310_GPK3(2); gpio++) {
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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for (gpio = S5PV310_GPK3(3); gpio <= S5PV310_GPK3(6); gpio++) {
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/* Data pin GPK3[3:6] to special-function 2 */
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
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s3c_gpio_cfgpin(S5PV310_GPK3(2), S3C_GPIO_SFN(2));
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s3c_gpio_setpull(S5PV310_GPK3(2), S3C_GPIO_PULL_UP);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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}
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@ -0,0 +1,69 @@
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/* linux/arch/arm/mach-s5pv310/setup-sdhci.c
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* S5PV310 - Helper functions for settign up SDHCI device(s) (HSMMC)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/mmc/card.h>
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#include <linux/mmc/host.h>
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#include <plat/regs-sdhci.h>
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/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
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char *s5pv310_hsmmc_clksrcs[4] = {
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[0] = NULL,
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[1] = NULL,
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[2] = "sclk_mmc", /* mmc_bus */
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[3] = NULL,
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};
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void s5pv310_setup_sdhci_cfg_card(struct platform_device *dev, void __iomem *r,
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struct mmc_ios *ios, struct mmc_card *card)
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{
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u32 ctrl2, ctrl3;
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/* don't need to alter anything acording to card-type */
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ctrl2 = readl(r + S3C_SDHCI_CONTROL2);
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/* select base clock source to HCLK */
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ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
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/*
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* clear async mode, enable conflict mask, rx feedback ctrl, SD
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* clk hold and no use debounce count
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*/
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ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
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S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
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S3C_SDHCI_CTRL2_ENFBCLKRX |
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S3C_SDHCI_CTRL2_DFCNT_NONE |
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S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
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/* Tx and Rx feedback clock delay control */
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if (ios->clock < 25 * 1000000)
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ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
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S3C_SDHCI_CTRL3_FCSEL2 |
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S3C_SDHCI_CTRL3_FCSEL1 |
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S3C_SDHCI_CTRL3_FCSEL0);
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else
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ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
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writel(ctrl2, r + S3C_SDHCI_CONTROL2);
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writel(ctrl3, r + S3C_SDHCI_CONTROL3);
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}
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