Merge branch 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm: ARM: footbridge: fix clock event support ARM: footbridge: fix debug macros ARM: initrd: disable initrds outside of memory ARM: extend Code: line by one 16-bit quantity for Thumb instructions ARM: 6955/1: cmpxchg syscall should data abort if page not write ARM: 6954/1: zImage: fix Thumb2 breakage ARM: 6953/1: DT: don't try to access physical address zero ARM: 6949/2: mach-u300: fix compilaton warning in IO accessors Revert "ARM: 6944/1: mm: allow ASID 0 to be allocated to tasks" Revert "ARM: 6943/1: mm: use TTBR1 instead of reserved context ID" davinci: make PCM platform devices static arm: davinci: Fix fallout from generic irq chip conversion ARM: 6894/1: mmci: trigger card detect IRQs on falling and rising edges ARM: 6952/1: fix lockdep warning of "unannotated irqs-off" ARM: 6951/1: include .bss in memory layout information ARM: 6948/1: Fix .size directives for __arm{7,9}tdmi_proc_info ARM: 6947/2: mach-u300: fix compilation error in timer ARM: 6946/1: vexpress: move v2m clock init to init_early ARM: mx51/sdma: Check the chip revision in run-time arm: mxs: include asm/processor.h for cpu_relax()
This commit is contained in:
Коммит
19a1166fa2
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@ -691,9 +691,9 @@ proc_types:
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.word 0x41069260 @ ARM926EJ-S (v5TEJ)
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.word 0xff0ffff0
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b __arm926ejs_mmu_cache_on
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b __armv4_mmu_cache_off
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b __armv5tej_mmu_cache_flush
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W(b) __arm926ejs_mmu_cache_on
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W(b) __armv4_mmu_cache_off
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W(b) __armv5tej_mmu_cache_flush
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.word 0x00007000 @ ARM7 IDs
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.word 0x0000f000
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@ -76,6 +76,9 @@ struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys)
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unsigned long dt_root;
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const char *model;
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if (!dt_phys)
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return NULL;
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devtree = phys_to_virt(dt_phys);
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/* check device tree validity */
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@ -435,6 +435,10 @@ __irq_usr:
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usr_entry
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kuser_cmpxchg_check
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#ifdef CONFIG_IRQSOFF_TRACER
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bl trace_hardirqs_off
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#endif
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get_thread_info tsk
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#ifdef CONFIG_PREEMPT
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ldr r8, [tsk, #TI_PREEMPT] @ get preempt count
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@ -453,7 +457,7 @@ __irq_usr:
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#endif
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mov why, #0
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b ret_to_user
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b ret_to_user_from_irq
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UNWIND(.fnend )
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ENDPROC(__irq_usr)
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@ -64,6 +64,7 @@ work_resched:
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ENTRY(ret_to_user)
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ret_slow_syscall:
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disable_irq @ disable interrupts
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ENTRY(ret_to_user_from_irq)
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ldr r1, [tsk, #TI_FLAGS]
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tst r1, #_TIF_WORK_MASK
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bne work_pending
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@ -75,6 +76,7 @@ no_work_pending:
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arch_ret_to_user r1, lr
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restore_user_regs fast = 0, offset = 0
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ENDPROC(ret_to_user_from_irq)
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ENDPROC(ret_to_user)
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/*
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@ -139,7 +139,7 @@ static void dump_instr(const char *lvl, struct pt_regs *regs)
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fs = get_fs();
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set_fs(KERNEL_DS);
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for (i = -4; i < 1; i++) {
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for (i = -4; i < 1 + !!thumb; i++) {
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unsigned int val, bad;
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if (thumb)
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@ -563,7 +563,7 @@ asmlinkage int arm_syscall(int no, struct pt_regs *regs)
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if (!pmd_present(*pmd))
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goto bad_access;
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pte = pte_offset_map_lock(mm, pmd, addr, &ptl);
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if (!pte_present(*pte) || !pte_dirty(*pte)) {
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if (!pte_present(*pte) || !pte_write(*pte) || !pte_dirty(*pte)) {
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pte_unmap_unlock(pte, ptl);
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goto bad_access;
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}
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@ -494,7 +494,7 @@ static struct platform_device da850_mcasp_device = {
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.resource = da850_mcasp_resources,
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};
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struct platform_device davinci_pcm_device = {
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static struct platform_device davinci_pcm_device = {
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.name = "davinci-pcm-audio",
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.id = -1,
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};
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@ -298,7 +298,7 @@ static void davinci_init_wdt(void)
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/*-------------------------------------------------------------------------*/
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struct platform_device davinci_pcm_device = {
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static struct platform_device davinci_pcm_device = {
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.name = "davinci-pcm-audio",
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.id = -1,
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};
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@ -252,9 +252,11 @@ static struct irq_chip gpio_irqchip = {
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static void
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gpio_irq_handler(unsigned irq, struct irq_desc *desc)
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{
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struct davinci_gpio_regs __iomem *g = irq2regs(irq);
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struct davinci_gpio_regs __iomem *g;
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u32 mask = 0xffff;
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g = (__force struct davinci_gpio_regs __iomem *) irq_desc_get_handler_data(desc);
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/* we only care about one bank */
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if (irq & 1)
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mask <<= 16;
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@ -422,8 +424,7 @@ static int __init davinci_gpio_irq_setup(void)
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/* set up all irqs in this bank */
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irq_set_chained_handler(bank_irq, gpio_irq_handler);
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irq_set_chip_data(bank_irq, (__force void *)g);
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irq_set_handler_data(bank_irq, (void *)irq);
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irq_set_handler_data(bank_irq, (__force void *)g);
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for (i = 0; i < 16 && gpio < ngpio; i++, irq++, gpio++) {
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irq_set_chip(irq, &gpio_irqchip);
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@ -103,6 +103,7 @@ static void __init footbridge_timer_init(void)
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clockevents_calc_mult_shift(ce, mem_fclk_21285, 5);
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ce->max_delta_ns = clockevent_delta2ns(0xffffff, ce);
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ce->min_delta_ns = clockevent_delta2ns(0x000004, ce);
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ce->cpumask = cpumask_of(smp_processor_id());
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clockevents_register_device(ce);
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}
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@ -26,6 +26,7 @@
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#include <asm/hardware/debug-8250.S>
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#else
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#include <mach/hardware.h>
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/* For EBSA285 debugging */
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.equ dc21285_high, ARMCSR_BASE & 0xff000000
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.equ dc21285_low, ARMCSR_BASE & 0x00ffffff
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@ -36,8 +37,8 @@
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.else
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mov \rp, #0
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.endif
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orr \rv, \rp, #0x42000000
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orr \rp, \rp, #dc21285_high
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orr \rv, \rp, #dc21285_high
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orr \rp, \rp, #0x42000000
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.endm
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.macro senduart,rd,rx
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@ -16,6 +16,8 @@
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#include <linux/err.h>
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#include <linux/mutex.h>
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#include <asm/processor.h> /* for cpu_relax() */
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#include <mach/mxs.h>
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#define OCOTP_WORD_OFFSET 0x20
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@ -31,7 +31,7 @@ struct clk {
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bool reset;
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__u16 clk_val;
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__s8 usecount;
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__u32 res_reg;
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void __iomem * res_reg;
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__u16 res_mask;
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bool hw_ctrld;
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@ -18,6 +18,12 @@
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* the defines are used for setting up the I/O memory mapping.
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*/
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#ifdef __ASSEMBLER__
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#define IOMEM(a) (a)
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#else
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#define IOMEM(a) (void __iomem *) a
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#endif
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/* NAND Flash CS0 */
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#define U300_NAND_CS0_PHYS_BASE 0x80000000
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@ -47,13 +53,6 @@
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#define U300_SEMI_CONFIG_BASE 0x30000000
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#endif
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/*
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* All the following peripherals are specified at their PHYSICAL address,
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* so if you need to access them (in the kernel), you MUST use the macros
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* defined in <asm/io.h> to map to the IO_ADDRESS_AHB() IO_ADDRESS_FAST()
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* etc.
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*/
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/*
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* AHB peripherals
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*/
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@ -63,11 +62,11 @@
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/* Vectored Interrupt Controller 0, servicing 32 interrupts */
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#define U300_INTCON0_BASE (U300_AHB_PER_PHYS_BASE+0x1000)
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#define U300_INTCON0_VBASE (U300_AHB_PER_VIRT_BASE+0x1000)
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#define U300_INTCON0_VBASE IOMEM(U300_AHB_PER_VIRT_BASE+0x1000)
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/* Vectored Interrupt Controller 1, servicing 32 interrupts */
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#define U300_INTCON1_BASE (U300_AHB_PER_PHYS_BASE+0x2000)
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#define U300_INTCON1_VBASE (U300_AHB_PER_VIRT_BASE+0x2000)
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#define U300_INTCON1_VBASE IOMEM(U300_AHB_PER_VIRT_BASE+0x2000)
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/* Memory Stick Pro (MSPRO) controller */
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#define U300_MSPRO_BASE (U300_AHB_PER_PHYS_BASE+0x3000)
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@ -115,7 +114,7 @@
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/* SYSCON */
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#define U300_SYSCON_BASE (U300_SLOW_PER_PHYS_BASE+0x1000)
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#define U300_SYSCON_VBASE (U300_SLOW_PER_VIRT_BASE+0x1000)
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#define U300_SYSCON_VBASE IOMEM(U300_SLOW_PER_VIRT_BASE+0x1000)
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/* Watchdog */
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#define U300_WDOG_BASE (U300_SLOW_PER_PHYS_BASE+0x2000)
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@ -125,7 +124,7 @@
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/* APP side special timer */
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#define U300_TIMER_APP_BASE (U300_SLOW_PER_PHYS_BASE+0x4000)
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#define U300_TIMER_APP_VBASE (U300_SLOW_PER_VIRT_BASE+0x4000)
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#define U300_TIMER_APP_VBASE IOMEM(U300_SLOW_PER_VIRT_BASE+0x4000)
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/* Keypad */
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#define U300_KEYPAD_BASE (U300_SLOW_PER_PHYS_BASE+0x5000)
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@ -181,5 +180,4 @@
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* Virtual accessor macros for static devices
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*/
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#endif
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@ -411,8 +411,7 @@ static void __init u300_timer_init(void)
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/* Use general purpose timer 2 as clock source */
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if (clocksource_mmio_init(U300_TIMER_APP_VBASE + U300_TIMER_APP_GPT2CC,
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"GPT2", rate, 300, 32, clocksource_mmio_readl_up))
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printk(KERN_ERR "timer: failed to initialize clock "
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"source %s\n", clocksource_u300_1mhz.name);
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pr_err("timer: failed to initialize U300 clock source\n");
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clockevents_calc_mult_shift(&clockevent_u300_1mhz,
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rate, APPTIMER_MIN_RANGE);
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@ -46,12 +46,6 @@ static struct map_desc v2m_io_desc[] __initdata = {
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},
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};
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static void __init v2m_init_early(void)
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{
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ct_desc->init_early();
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versatile_sched_clock_init(MMIO_P2V(V2M_SYS_24MHZ), 24000000);
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}
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static void __init v2m_timer_init(void)
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{
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u32 scctrl;
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@ -365,6 +359,13 @@ static struct clk_lookup v2m_lookups[] = {
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},
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};
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static void __init v2m_init_early(void)
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{
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ct_desc->init_early();
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clkdev_add_table(v2m_lookups, ARRAY_SIZE(v2m_lookups));
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versatile_sched_clock_init(MMIO_P2V(V2M_SYS_24MHZ), 24000000);
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}
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static void v2m_power_off(void)
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{
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if (v2m_cfg_write(SYS_CFG_SHUTDOWN | SYS_CFG_SITE_MB, 0))
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@ -418,8 +419,6 @@ static void __init v2m_init(void)
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{
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int i;
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clkdev_add_table(v2m_lookups, ARRAY_SIZE(v2m_lookups));
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platform_device_register(&v2m_pcie_i2c_device);
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platform_device_register(&v2m_ddc_i2c_device);
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platform_device_register(&v2m_flash_device);
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|
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@ -24,7 +24,9 @@ DEFINE_PER_CPU(struct mm_struct *, current_mm);
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/*
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* We fork()ed a process, and we need a new context for the child
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* to run in.
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* to run in. We reserve version 0 for initial tasks so we will
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* always allocate an ASID. The ASID 0 is reserved for the TTBR
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* register changing sequence.
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*/
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void __init_new_context(struct task_struct *tsk, struct mm_struct *mm)
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{
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|
@ -34,11 +36,8 @@ void __init_new_context(struct task_struct *tsk, struct mm_struct *mm)
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|
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static void flush_context(void)
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{
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u32 ttb;
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/* Copy TTBR1 into TTBR0 */
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asm volatile("mrc p15, 0, %0, c2, c0, 1\n"
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"mcr p15, 0, %0, c2, c0, 0"
|
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: "=r" (ttb));
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/* set the reserved ASID before flushing the TLB */
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asm("mcr p15, 0, %0, c13, c0, 1\n" : : "r" (0));
|
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isb();
|
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local_flush_tlb_all();
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if (icache_is_vivt_asid_tagged()) {
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|
@ -94,7 +93,7 @@ static void reset_context(void *info)
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return;
|
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|
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smp_rmb();
|
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asid = cpu_last_asid + cpu;
|
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asid = cpu_last_asid + cpu + 1;
|
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|
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flush_context();
|
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set_mm_context(mm, asid);
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|
@ -144,13 +143,13 @@ void __new_context(struct mm_struct *mm)
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* to start a new version and flush the TLB.
|
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*/
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if (unlikely((asid & ~ASID_MASK) == 0)) {
|
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asid = cpu_last_asid + smp_processor_id();
|
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asid = cpu_last_asid + smp_processor_id() + 1;
|
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flush_context();
|
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#ifdef CONFIG_SMP
|
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smp_wmb();
|
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smp_call_function(reset_context, NULL, 1);
|
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#endif
|
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cpu_last_asid += NR_CPUS - 1;
|
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cpu_last_asid += NR_CPUS;
|
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}
|
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|
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set_mm_context(mm, asid);
|
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|
|
|
@ -330,6 +330,12 @@ void __init arm_memblock_init(struct meminfo *mi, struct machine_desc *mdesc)
|
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memblock_reserve(__pa(_stext), _end - _stext);
|
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#endif
|
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#ifdef CONFIG_BLK_DEV_INITRD
|
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if (phys_initrd_size &&
|
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!memblock_is_region_memory(phys_initrd_start, phys_initrd_size)) {
|
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pr_err("INITRD: 0x%08lx+0x%08lx is not a memory region - disabling initrd\n",
|
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phys_initrd_start, phys_initrd_size);
|
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phys_initrd_start = phys_initrd_size = 0;
|
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}
|
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if (phys_initrd_size &&
|
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memblock_is_region_reserved(phys_initrd_start, phys_initrd_size)) {
|
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pr_err("INITRD: 0x%08lx+0x%08lx overlaps in-use memory region - disabling initrd\n",
|
||||
|
@ -635,7 +641,8 @@ void __init mem_init(void)
|
|||
" modules : 0x%08lx - 0x%08lx (%4ld MB)\n"
|
||||
" .init : 0x%p" " - 0x%p" " (%4d kB)\n"
|
||||
" .text : 0x%p" " - 0x%p" " (%4d kB)\n"
|
||||
" .data : 0x%p" " - 0x%p" " (%4d kB)\n",
|
||||
" .data : 0x%p" " - 0x%p" " (%4d kB)\n"
|
||||
" .bss : 0x%p" " - 0x%p" " (%4d kB)\n",
|
||||
|
||||
MLK(UL(CONFIG_VECTORS_BASE), UL(CONFIG_VECTORS_BASE) +
|
||||
(PAGE_SIZE)),
|
||||
|
@ -657,7 +664,8 @@ void __init mem_init(void)
|
|||
|
||||
MLK_ROUNDUP(__init_begin, __init_end),
|
||||
MLK_ROUNDUP(_text, _etext),
|
||||
MLK_ROUNDUP(_sdata, _edata));
|
||||
MLK_ROUNDUP(_sdata, _edata),
|
||||
MLK_ROUNDUP(__bss_start, __bss_stop));
|
||||
|
||||
#undef MLK
|
||||
#undef MLM
|
||||
|
|
|
@ -146,7 +146,7 @@ __arm7tdmi_proc_info:
|
|||
.long 0
|
||||
.long 0
|
||||
.long v4_cache_fns
|
||||
.size __arm7tdmi_proc_info, . - __arm7dmi_proc_info
|
||||
.size __arm7tdmi_proc_info, . - __arm7tdmi_proc_info
|
||||
|
||||
.type __triscenda7_proc_info, #object
|
||||
__triscenda7_proc_info:
|
||||
|
|
|
@ -116,7 +116,7 @@ __arm9tdmi_proc_info:
|
|||
.long 0
|
||||
.long 0
|
||||
.long v4_cache_fns
|
||||
.size __arm9tdmi_proc_info, . - __arm9dmi_proc_info
|
||||
.size __arm9tdmi_proc_info, . - __arm9tdmi_proc_info
|
||||
|
||||
.type __p2001_proc_info, #object
|
||||
__p2001_proc_info:
|
||||
|
|
|
@ -108,16 +108,18 @@ ENTRY(cpu_v7_switch_mm)
|
|||
#ifdef CONFIG_ARM_ERRATA_430973
|
||||
mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB
|
||||
#endif
|
||||
mrc p15, 0, r2, c2, c0, 1 @ load TTB 1
|
||||
mcr p15, 0, r2, c2, c0, 0 @ into TTB 0
|
||||
#ifdef CONFIG_ARM_ERRATA_754322
|
||||
dsb
|
||||
#endif
|
||||
mcr p15, 0, r2, c13, c0, 1 @ set reserved context ID
|
||||
isb
|
||||
1: mcr p15, 0, r0, c2, c0, 0 @ set TTB 0
|
||||
isb
|
||||
#ifdef CONFIG_ARM_ERRATA_754322
|
||||
dsb
|
||||
#endif
|
||||
mcr p15, 0, r1, c13, c0, 1 @ set context ID
|
||||
isb
|
||||
mcr p15, 0, r0, c2, c0, 0 @ set TTB 0
|
||||
isb
|
||||
#endif
|
||||
mov pc, lr
|
||||
ENDPROC(cpu_v7_switch_mm)
|
||||
|
|
|
@ -139,7 +139,7 @@ static struct sdma_script_start_addrs addr_imx35_to2 = {
|
|||
#endif
|
||||
|
||||
#ifdef CONFIG_SOC_IMX51
|
||||
static struct sdma_script_start_addrs addr_imx51_to1 = {
|
||||
static struct sdma_script_start_addrs addr_imx51 = {
|
||||
.ap_2_ap_addr = 642,
|
||||
.uart_2_mcu_addr = 817,
|
||||
.mcu_2_app_addr = 747,
|
||||
|
@ -196,7 +196,9 @@ static int __init imxXX_add_imx_dma(void)
|
|||
|
||||
#if defined(CONFIG_SOC_IMX51)
|
||||
if (cpu_is_mx51()) {
|
||||
imx51_imx_sdma_data.pdata.script_addrs = &addr_imx51_to1;
|
||||
int to_version = mx51_revision() >> 4;
|
||||
imx51_imx_sdma_data.pdata.to_version = to_version;
|
||||
imx51_imx_sdma_data.pdata.script_addrs = &addr_imx51;
|
||||
ret = imx_add_imx_sdma(&imx51_imx_sdma_data);
|
||||
} else
|
||||
#endif
|
||||
|
|
|
@ -1144,9 +1144,17 @@ static int __devinit mmci_probe(struct amba_device *dev,
|
|||
else if (ret != -ENOSYS)
|
||||
goto err_gpio_cd;
|
||||
|
||||
/*
|
||||
* A gpio pin that will detect cards when inserted and removed
|
||||
* will most likely want to trigger on the edges if it is
|
||||
* 0 when ejected and 1 when inserted (or mutatis mutandis
|
||||
* for the inverted case) so we request triggers on both
|
||||
* edges.
|
||||
*/
|
||||
ret = request_any_context_irq(gpio_to_irq(plat->gpio_cd),
|
||||
mmci_cd_irq, 0,
|
||||
DRIVER_NAME " (cd)", host);
|
||||
mmci_cd_irq,
|
||||
IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
|
||||
DRIVER_NAME " (cd)", host);
|
||||
if (ret >= 0)
|
||||
host->gpio_cd_irq = gpio_to_irq(plat->gpio_cd);
|
||||
}
|
||||
|
|
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