net/freescale: do not export any functions from fsl_pq_mdio.c
None of the functions in fsl_pq_mdio.c are used by any other source file, so there's no point in exporting them. Merge the header file into the source file, make all the functions static, remove any EXPORT_SYMBOL statements, and delete any #include "fsl_pq_mdio.h" statements. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -45,7 +45,31 @@
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#include <asm/ucc.h>
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#include "gianfar.h"
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#include "fsl_pq_mdio.h"
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#define MIIMIND_BUSY 0x00000001
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#define MIIMIND_NOTVALID 0x00000004
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#define MIIMCFG_INIT_VALUE 0x00000007
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#define MIIMCFG_RESET 0x80000000
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#define MII_READ_COMMAND 0x00000001
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struct fsl_pq_mdio {
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u8 res1[16];
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u32 ieventm; /* MDIO Interrupt event register (for etsec2)*/
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u32 imaskm; /* MDIO Interrupt mask register (for etsec2)*/
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u8 res2[4];
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u32 emapm; /* MDIO Event mapping register (for etsec2)*/
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u8 res3[1280];
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u32 miimcfg; /* MII management configuration reg */
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u32 miimcom; /* MII management command reg */
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u32 miimadd; /* MII management address reg */
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u32 miimcon; /* MII management control reg */
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u32 miimstat; /* MII management status reg */
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u32 miimind; /* MII management indication reg */
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u8 res4[28];
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u32 utbipar; /* TBI phy address reg (only on UCC) */
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u8 res5[2728];
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} __packed;
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/* Number of microseconds to wait for an MII register to respond */
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#define MII_TIMEOUT 1000
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@ -64,7 +88,7 @@ struct fsl_pq_mdio_priv {
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* the local mdio pins, which may not be the same as system mdio bus, used for
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* controlling the external PHYs, for example.
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*/
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int fsl_pq_local_mdio_write(struct fsl_pq_mdio __iomem *regs, int mii_id,
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static int fsl_pq_local_mdio_write(struct fsl_pq_mdio __iomem *regs, int mii_id,
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int regnum, u16 value)
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{
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u32 status;
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@ -92,7 +116,7 @@ int fsl_pq_local_mdio_write(struct fsl_pq_mdio __iomem *regs, int mii_id,
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* and are always tied to the local mdio pins, which may not be the
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* same as system mdio bus, used for controlling the external PHYs, for eg.
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*/
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int fsl_pq_local_mdio_read(struct fsl_pq_mdio __iomem *regs,
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static int fsl_pq_local_mdio_read(struct fsl_pq_mdio __iomem *regs,
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int mii_id, int regnum)
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{
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u16 value;
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@ -129,7 +153,8 @@ static struct fsl_pq_mdio __iomem *fsl_pq_mdio_get_regs(struct mii_bus *bus)
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* Write value to the PHY at mii_id at register regnum,
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* on the bus, waiting until the write is done before returning.
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*/
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int fsl_pq_mdio_write(struct mii_bus *bus, int mii_id, int regnum, u16 value)
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static int fsl_pq_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
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u16 value)
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{
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struct fsl_pq_mdio __iomem *regs = fsl_pq_mdio_get_regs(bus);
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@ -141,7 +166,7 @@ int fsl_pq_mdio_write(struct mii_bus *bus, int mii_id, int regnum, u16 value)
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* Read the bus for PHY at addr mii_id, register regnum, and
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* return the value. Clears miimcom first.
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*/
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int fsl_pq_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
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static int fsl_pq_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
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{
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struct fsl_pq_mdio __iomem *regs = fsl_pq_mdio_get_regs(bus);
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@ -178,7 +203,7 @@ static int fsl_pq_mdio_reset(struct mii_bus *bus)
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return 0;
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}
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void fsl_pq_mdio_bus_name(char *name, struct device_node *np)
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static void fsl_pq_mdio_bus_name(char *name, struct device_node *np)
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{
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const u32 *addr;
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u64 taddr = OF_BAD_ADDR;
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@ -190,7 +215,6 @@ void fsl_pq_mdio_bus_name(char *name, struct device_node *np)
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snprintf(name, MII_BUS_ID_SIZE, "%s@%llx", np->name,
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(unsigned long long)taddr);
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}
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EXPORT_SYMBOL_GPL(fsl_pq_mdio_bus_name);
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static u32 __iomem *get_gfar_tbipa(struct fsl_pq_mdio __iomem *regs, struct device_node *np)
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@ -1,52 +0,0 @@
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/*
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* Freescale PowerQUICC MDIO Driver -- MII Management Bus Implementation
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* Driver for the MDIO bus controller on Freescale PowerQUICC processors
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*
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* Author: Andy Fleming
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* Modifier: Sandeep Gopalpet
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*
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* Copyright 2002-2004, 2008-2009 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#ifndef __FSL_PQ_MDIO_H
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#define __FSL_PQ_MDIO_H
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#define MIIMIND_BUSY 0x00000001
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#define MIIMIND_NOTVALID 0x00000004
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#define MIIMCFG_INIT_VALUE 0x00000007
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#define MIIMCFG_RESET 0x80000000
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#define MII_READ_COMMAND 0x00000001
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struct fsl_pq_mdio {
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u8 res1[16];
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u32 ieventm; /* MDIO Interrupt event register (for etsec2)*/
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u32 imaskm; /* MDIO Interrupt mask register (for etsec2)*/
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u8 res2[4];
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u32 emapm; /* MDIO Event mapping register (for etsec2)*/
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u8 res3[1280];
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u32 miimcfg; /* MII management configuration reg */
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u32 miimcom; /* MII management command reg */
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u32 miimadd; /* MII management address reg */
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u32 miimcon; /* MII management control reg */
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u32 miimstat; /* MII management status reg */
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u32 miimind; /* MII management indication reg */
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u8 reserved[28]; /* Space holder */
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u32 utbipar; /* TBI phy address reg (only on UCC) */
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u8 res4[2728];
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} __packed;
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int fsl_pq_mdio_read(struct mii_bus *bus, int mii_id, int regnum);
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int fsl_pq_mdio_write(struct mii_bus *bus, int mii_id, int regnum, u16 value);
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int fsl_pq_local_mdio_write(struct fsl_pq_mdio __iomem *regs, int mii_id,
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int regnum, u16 value);
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int fsl_pq_local_mdio_read(struct fsl_pq_mdio __iomem *regs, int mii_id, int regnum);
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int __init fsl_pq_mdio_init(void);
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void fsl_pq_mdio_exit(void);
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void fsl_pq_mdio_bus_name(char *name, struct device_node *np);
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#endif /* FSL_PQ_MDIO_H */
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@ -100,7 +100,6 @@
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#include <linux/of_net.h>
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#include "gianfar.h"
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#include "fsl_pq_mdio.h"
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#define TX_TIMEOUT (1*HZ)
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@ -42,7 +42,6 @@
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#include <asm/machdep.h>
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#include "ucc_geth.h"
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#include "fsl_pq_mdio.h"
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#undef DEBUG
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