Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mpe/linux
Pull powerpc updates from Michael Ellerman: "There's some bug fixes or cleanups to facilitate fixes, a MAINTAINERS update, and a new syscall (bpf)" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mpe/linux: powerpc/numa: ensure per-cpu NUMA mappings are correct on topology update powerpc/numa: use cached value of update->cpu in update_cpu_topology cxl: Fix PSL error due to duplicate segment table entries powerpc/mm: Use appropriate ESID mask in copro_calculate_slb() cxl: Refactor cxl_load_segment() and find_free_sste() cxl: Disable secondary hash in segment table Revert "powerpc/powernv: Fix endian bug in LPC bus debugfs accessors" powernv: Use _GLOBAL_TOC for opal wrappers powerpc: Wire up sys_bpf() syscall MAINTAINERS: nx-842 driver maintainer change powerpc/mm: Remove redundant #if case powerpc/mm: Fix build error with hugetlfs disabled
This commit is contained in:
Linus Torvalds
Коммит
19be9e8aa7
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@ -4608,7 +4608,7 @@ S: Supported
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F: drivers/crypto/nx/
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IBM Power 842 compression accelerator
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M: Nathan Fontenot <nfont@linux.vnet.ibm.com>
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M: Dan Streetman <ddstreet@us.ibm.com>
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S: Supported
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F: drivers/crypto/nx/nx-842.c
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F: include/linux/nx842.h
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@ -71,7 +71,7 @@ pte_t *huge_pte_offset_and_shift(struct mm_struct *mm,
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void flush_dcache_icache_hugepage(struct page *page);
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#if defined(CONFIG_PPC_MM_SLICES) || defined(CONFIG_PPC_SUBPAGE_PROT)
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#if defined(CONFIG_PPC_MM_SLICES)
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int is_hugepage_only_range(struct mm_struct *mm, unsigned long addr,
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unsigned long len);
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#else
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@ -365,3 +365,4 @@ SYSCALL_SPU(renameat2)
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SYSCALL_SPU(seccomp)
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SYSCALL_SPU(getrandom)
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SYSCALL_SPU(memfd_create)
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SYSCALL_SPU(bpf)
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@ -12,7 +12,7 @@
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#include <uapi/asm/unistd.h>
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#define __NR_syscalls 361
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#define __NR_syscalls 362
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#define __NR__exit __NR_exit
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#define NR_syscalls __NR_syscalls
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@ -383,5 +383,6 @@
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#define __NR_seccomp 358
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#define __NR_getrandom 359
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#define __NR_memfd_create 360
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#define __NR_bpf 361
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#endif /* _UAPI_ASM_POWERPC_UNISTD_H_ */
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@ -99,8 +99,6 @@ int copro_calculate_slb(struct mm_struct *mm, u64 ea, struct copro_slb *slb)
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u64 vsid;
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int psize, ssize;
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slb->esid = (ea & ESID_MASK) | SLB_ESID_V;
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switch (REGION_ID(ea)) {
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case USER_REGION_ID:
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pr_devel("%s: 0x%llx -- USER_REGION_ID\n", __func__, ea);
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@ -133,6 +131,7 @@ int copro_calculate_slb(struct mm_struct *mm, u64 ea, struct copro_slb *slb)
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vsid |= mmu_psize_defs[psize].sllp |
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((ssize == MMU_SEGSIZE_1T) ? SLB_VSID_B_1T : 0);
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slb->esid = (ea & (ssize == MMU_SEGSIZE_1T ? ESID_MASK_1T : ESID_MASK)) | SLB_ESID_V;
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slb->vsid = vsid;
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return 0;
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@ -1509,11 +1509,14 @@ static int update_cpu_topology(void *data)
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cpu = smp_processor_id();
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for (update = data; update; update = update->next) {
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int new_nid = update->new_nid;
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if (cpu != update->cpu)
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continue;
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unmap_cpu_from_node(update->cpu);
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map_cpu_to_node(update->cpu, update->new_nid);
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unmap_cpu_from_node(cpu);
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map_cpu_to_node(cpu, new_nid);
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set_cpu_numa_node(cpu, new_nid);
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set_cpu_numa_mem(cpu, local_memory_node(new_nid));
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vdso_getcpu_init();
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}
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@ -682,6 +682,7 @@ void slice_set_range_psize(struct mm_struct *mm, unsigned long start,
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slice_convert(mm, mask, psize);
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}
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#ifdef CONFIG_HUGETLB_PAGE
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/*
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* is_hugepage_only_range() is used by generic code to verify whether
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* a normal mmap mapping (non hugetlbfs) is valid on a given area.
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@ -726,4 +727,4 @@ int is_hugepage_only_range(struct mm_struct *mm, unsigned long addr,
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#endif
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return !slice_check_fit(mask, available);
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}
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#endif
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@ -191,7 +191,6 @@ static ssize_t lpc_debug_read(struct file *filp, char __user *ubuf,
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{
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struct lpc_debugfs_entry *lpc = filp->private_data;
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u32 data, pos, len, todo;
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__be32 bedata;
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int rc;
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if (!access_ok(VERIFY_WRITE, ubuf, count))
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@ -214,10 +213,9 @@ static ssize_t lpc_debug_read(struct file *filp, char __user *ubuf,
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len = 2;
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}
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rc = opal_lpc_read(opal_lpc_chip_id, lpc->lpc_type, pos,
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&bedata, len);
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&data, len);
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if (rc)
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return -ENXIO;
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data = be32_to_cpu(bedata);
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switch(len) {
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case 4:
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rc = __put_user((u32)data, (u32 __user *)ubuf);
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@ -58,7 +58,7 @@ END_FTR_SECTION(0, 1); \
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*/
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#define OPAL_CALL(name, token) \
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_GLOBAL(name); \
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_GLOBAL_TOC(name); \
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mflr r0; \
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std r0,16(r1); \
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li r0,token; \
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@ -21,60 +21,64 @@
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#include "cxl.h"
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static struct cxl_sste* find_free_sste(struct cxl_sste *primary_group,
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bool sec_hash,
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struct cxl_sste *secondary_group,
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unsigned int *lru)
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static bool sste_matches(struct cxl_sste *sste, struct copro_slb *slb)
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{
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unsigned int i, entry;
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struct cxl_sste *sste, *group = primary_group;
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for (i = 0; i < 2; i++) {
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for (entry = 0; entry < 8; entry++) {
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sste = group + entry;
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if (!(be64_to_cpu(sste->esid_data) & SLB_ESID_V))
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return sste;
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}
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if (!sec_hash)
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break;
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group = secondary_group;
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}
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/* Nothing free, select an entry to cast out */
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if (sec_hash && (*lru & 0x8))
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sste = secondary_group + (*lru & 0x7);
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else
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sste = primary_group + (*lru & 0x7);
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*lru = (*lru + 1) & 0xf;
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return sste;
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return ((sste->vsid_data == cpu_to_be64(slb->vsid)) &&
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(sste->esid_data == cpu_to_be64(slb->esid)));
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}
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static void cxl_load_segment(struct cxl_context *ctx, struct copro_slb *slb)
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/*
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* This finds a free SSTE for the given SLB, or returns NULL if it's already in
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* the segment table.
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*/
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static struct cxl_sste* find_free_sste(struct cxl_context *ctx,
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struct copro_slb *slb)
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{
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/* mask is the group index, we search primary and secondary here. */
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unsigned int mask = (ctx->sst_size >> 7)-1; /* SSTP0[SegTableSize] */
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bool sec_hash = 1;
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struct cxl_sste *sste;
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struct cxl_sste *primary, *sste, *ret = NULL;
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unsigned int mask = (ctx->sst_size >> 7) - 1; /* SSTP0[SegTableSize] */
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unsigned int entry;
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unsigned int hash;
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unsigned long flags;
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sec_hash = !!(cxl_p1n_read(ctx->afu, CXL_PSL_SR_An) & CXL_PSL_SR_An_SC);
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if (slb->vsid & SLB_VSID_B_1T)
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hash = (slb->esid >> SID_SHIFT_1T) & mask;
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else /* 256M */
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hash = (slb->esid >> SID_SHIFT) & mask;
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primary = ctx->sstp + (hash << 3);
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for (entry = 0, sste = primary; entry < 8; entry++, sste++) {
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if (!ret && !(be64_to_cpu(sste->esid_data) & SLB_ESID_V))
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ret = sste;
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if (sste_matches(sste, slb))
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return NULL;
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}
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if (ret)
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return ret;
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/* Nothing free, select an entry to cast out */
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ret = primary + ctx->sst_lru;
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ctx->sst_lru = (ctx->sst_lru + 1) & 0x7;
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return ret;
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}
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static void cxl_load_segment(struct cxl_context *ctx, struct copro_slb *slb)
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{
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/* mask is the group index, we search primary and secondary here. */
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struct cxl_sste *sste;
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unsigned long flags;
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spin_lock_irqsave(&ctx->sste_lock, flags);
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sste = find_free_sste(ctx->sstp + (hash << 3), sec_hash,
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ctx->sstp + ((~hash & mask) << 3), &ctx->sst_lru);
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sste = find_free_sste(ctx, slb);
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if (!sste)
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goto out_unlock;
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pr_devel("CXL Populating SST[%li]: %#llx %#llx\n",
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sste - ctx->sstp, slb->vsid, slb->esid);
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sste->vsid_data = cpu_to_be64(slb->vsid);
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sste->esid_data = cpu_to_be64(slb->esid);
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out_unlock:
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spin_unlock_irqrestore(&ctx->sste_lock, flags);
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}
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@ -417,7 +417,7 @@ static int attach_afu_directed(struct cxl_context *ctx, u64 wed, u64 amr)
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ctx->elem->haurp = 0; /* disable */
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ctx->elem->sdr = cpu_to_be64(mfspr(SPRN_SDR1));
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sr = CXL_PSL_SR_An_SC;
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sr = 0;
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if (ctx->master)
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sr |= CXL_PSL_SR_An_MP;
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if (mfspr(SPRN_LPCR) & LPCR_TC)
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@ -508,7 +508,7 @@ static int attach_dedicated(struct cxl_context *ctx, u64 wed, u64 amr)
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u64 sr;
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int rc;
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sr = CXL_PSL_SR_An_SC;
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sr = 0;
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set_endian(sr);
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if (ctx->master)
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sr |= CXL_PSL_SR_An_MP;
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