ASoC: codecs: wcd-clsh: add new version support
From WCD937X Class H controller has changed significantly, so add support to this new version for WCD937X and WCD938X Codecs. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20210609090943.7896-3-srinivas.kandagatla@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Родитель
10ee3e07d3
Коммит
19c5d1f6a0
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@ -88,6 +88,19 @@ struct wcd_clsh_ctrl {
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#define WCD9XXX_CLASSH_CTRL_CCL_1_DELTA_IPEAK_50MA 0x50
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#define WCD9XXX_CLASSH_CTRL_CCL_1_DELTA_IPEAK_30MA 0x30
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#define WCD9XXX_BASE_ADDRESS 0x3000
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#define WCD9XXX_ANA_RX_SUPPLIES (WCD9XXX_BASE_ADDRESS+0x008)
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#define WCD9XXX_ANA_HPH (WCD9XXX_BASE_ADDRESS+0x009)
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#define WCD9XXX_CLASSH_MODE_2 (WCD9XXX_BASE_ADDRESS+0x098)
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#define WCD9XXX_CLASSH_MODE_3 (WCD9XXX_BASE_ADDRESS+0x099)
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#define WCD9XXX_FLYBACK_VNEG_CTRL_1 (WCD9XXX_BASE_ADDRESS+0x0A5)
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#define WCD9XXX_FLYBACK_VNEG_CTRL_4 (WCD9XXX_BASE_ADDRESS+0x0A8)
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#define WCD9XXX_FLYBACK_VNEGDAC_CTRL_2 (WCD9XXX_BASE_ADDRESS+0x0AF)
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#define WCD9XXX_RX_BIAS_HPH_LOWPOWER (WCD9XXX_BASE_ADDRESS+0x0BF)
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#define WCD9XXX_V3_RX_BIAS_FLYB_BUFF (WCD9XXX_BASE_ADDRESS+0x0C7)
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#define WCD9XXX_HPH_PA_CTL1 (WCD9XXX_BASE_ADDRESS+0x0D1)
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#define WCD9XXX_HPH_NEW_INT_PA_MISC2 (WCD9XXX_BASE_ADDRESS+0x138)
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#define CLSH_REQ_ENABLE true
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#define CLSH_REQ_DISABLE false
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#define WCD_USLEEP_RANGE 50
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@ -137,6 +150,20 @@ static inline void wcd_clsh_set_buck_mode(struct snd_soc_component *comp,
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WCD9XXX_A_ANA_RX_VPOS_PWR_LVL_DEFAULT);
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}
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static void wcd_clsh_v3_set_buck_mode(struct snd_soc_component *component,
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int mode)
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{
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if (mode == CLS_H_HIFI || mode == CLS_H_LOHIFI ||
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mode == CLS_AB_HIFI || mode == CLS_AB_LOHIFI)
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snd_soc_component_update_bits(component,
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WCD9XXX_ANA_RX_SUPPLIES,
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0x08, 0x08); /* set to HIFI */
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else
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snd_soc_component_update_bits(component,
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WCD9XXX_ANA_RX_SUPPLIES,
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0x08, 0x00); /* set to default */
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}
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static inline void wcd_clsh_set_flyback_mode(struct snd_soc_component *comp,
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int mode)
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{
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@ -170,6 +197,36 @@ static void wcd_clsh_buck_ctrl(struct wcd_clsh_ctrl *ctrl,
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usleep_range(500, 500 + WCD_USLEEP_RANGE);
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}
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static void wcd_clsh_v3_buck_ctrl(struct snd_soc_component *component,
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struct wcd_clsh_ctrl *ctrl,
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int mode,
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bool enable)
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{
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/* enable/disable buck */
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if ((enable && (++ctrl->buck_users == 1)) ||
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(!enable && (--ctrl->buck_users == 0))) {
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snd_soc_component_update_bits(component,
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WCD9XXX_ANA_RX_SUPPLIES,
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(1 << 7), (enable << 7));
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/*
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* 500us sleep is required after buck enable/disable
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* as per HW requirement
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*/
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usleep_range(500, 510);
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if (mode == CLS_H_LOHIFI || mode == CLS_H_ULP ||
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mode == CLS_H_HIFI || mode == CLS_H_LP)
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snd_soc_component_update_bits(component,
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WCD9XXX_CLASSH_MODE_3,
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0x02, 0x00);
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snd_soc_component_update_bits(component,
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WCD9XXX_CLASSH_MODE_2,
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0xFF, 0x3A);
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/* 500usec delay is needed as per HW requirement */
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usleep_range(500, 500 + WCD_USLEEP_RANGE);
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}
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}
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static void wcd_clsh_flyback_ctrl(struct wcd_clsh_ctrl *ctrl,
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int mode,
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bool enable)
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@ -219,8 +276,7 @@ static void wcd_clsh_set_gain_path(struct wcd_clsh_ctrl *ctrl, int mode)
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val);
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}
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static void wcd_clsh_set_hph_mode(struct snd_soc_component *comp,
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int mode)
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static void wcd_clsh_v2_set_hph_mode(struct snd_soc_component *comp, int mode)
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{
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int val = 0, gain = 0, res_val;
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int ipeak = WCD9XXX_CLASSH_CTRL_CCL_1_DELTA_IPEAK_50MA;
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@ -264,6 +320,48 @@ static void wcd_clsh_set_hph_mode(struct snd_soc_component *comp,
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ipeak);
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}
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static void wcd_clsh_v3_set_hph_mode(struct snd_soc_component *component,
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int mode)
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{
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u8 val;
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switch (mode) {
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case CLS_H_NORMAL:
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val = 0x00;
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break;
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case CLS_AB:
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case CLS_H_ULP:
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val = 0x0C;
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break;
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case CLS_AB_HIFI:
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case CLS_H_HIFI:
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val = 0x08;
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break;
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case CLS_H_LP:
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case CLS_H_LOHIFI:
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case CLS_AB_LP:
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case CLS_AB_LOHIFI:
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val = 0x04;
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break;
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default:
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dev_err(component->dev, "%s:Invalid mode %d\n", __func__, mode);
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return;
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}
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snd_soc_component_update_bits(component, WCD9XXX_ANA_HPH, 0x0C, val);
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}
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void wcd_clsh_set_hph_mode(struct wcd_clsh_ctrl *ctrl, int mode)
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{
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struct snd_soc_component *comp = ctrl->comp;
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if (ctrl->codec_version >= WCD937X)
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wcd_clsh_v3_set_hph_mode(comp, mode);
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else
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wcd_clsh_v2_set_hph_mode(comp, mode);
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}
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static void wcd_clsh_set_flyback_current(struct snd_soc_component *comp,
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int mode)
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{
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@ -289,6 +387,130 @@ static void wcd_clsh_set_buck_regulator_mode(struct snd_soc_component *comp,
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WCD9XXX_A_ANA_RX_REGULATOR_MODE_CLS_H);
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}
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static void wcd_clsh_v3_set_buck_regulator_mode(struct snd_soc_component *component,
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int mode)
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{
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snd_soc_component_update_bits(component, WCD9XXX_ANA_RX_SUPPLIES,
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0x02, 0x00);
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}
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static void wcd_clsh_v3_set_flyback_mode(struct snd_soc_component *component,
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int mode)
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{
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if (mode == CLS_H_HIFI || mode == CLS_H_LOHIFI ||
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mode == CLS_AB_HIFI || mode == CLS_AB_LOHIFI) {
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snd_soc_component_update_bits(component,
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WCD9XXX_ANA_RX_SUPPLIES,
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0x04, 0x04);
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snd_soc_component_update_bits(component,
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WCD9XXX_FLYBACK_VNEG_CTRL_4,
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0xF0, 0x80);
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} else {
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snd_soc_component_update_bits(component,
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WCD9XXX_ANA_RX_SUPPLIES,
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0x04, 0x00); /* set to Default */
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snd_soc_component_update_bits(component,
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WCD9XXX_FLYBACK_VNEG_CTRL_4,
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0xF0, 0x70);
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}
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}
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static void wcd_clsh_v3_force_iq_ctl(struct snd_soc_component *component,
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int mode, bool enable)
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{
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if (enable) {
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snd_soc_component_update_bits(component,
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WCD9XXX_FLYBACK_VNEGDAC_CTRL_2,
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0xE0, 0xA0);
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/* 100usec delay is needed as per HW requirement */
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usleep_range(100, 110);
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snd_soc_component_update_bits(component,
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WCD9XXX_CLASSH_MODE_3,
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0x02, 0x02);
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snd_soc_component_update_bits(component,
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WCD9XXX_CLASSH_MODE_2,
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0xFF, 0x1C);
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if (mode == CLS_H_LOHIFI || mode == CLS_AB_LOHIFI) {
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snd_soc_component_update_bits(component,
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WCD9XXX_HPH_NEW_INT_PA_MISC2,
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0x20, 0x20);
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snd_soc_component_update_bits(component,
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WCD9XXX_RX_BIAS_HPH_LOWPOWER,
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0xF0, 0xC0);
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snd_soc_component_update_bits(component,
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WCD9XXX_HPH_PA_CTL1,
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0x0E, 0x02);
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}
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} else {
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snd_soc_component_update_bits(component,
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WCD9XXX_HPH_NEW_INT_PA_MISC2,
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0x20, 0x00);
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snd_soc_component_update_bits(component,
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WCD9XXX_RX_BIAS_HPH_LOWPOWER,
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0xF0, 0x80);
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snd_soc_component_update_bits(component,
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WCD9XXX_HPH_PA_CTL1,
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0x0E, 0x06);
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}
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}
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static void wcd_clsh_v3_flyback_ctrl(struct snd_soc_component *component,
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struct wcd_clsh_ctrl *ctrl,
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int mode,
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bool enable)
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{
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/* enable/disable flyback */
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if ((enable && (++ctrl->flyback_users == 1)) ||
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(!enable && (--ctrl->flyback_users == 0))) {
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snd_soc_component_update_bits(component,
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WCD9XXX_FLYBACK_VNEG_CTRL_1,
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0xE0, 0xE0);
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snd_soc_component_update_bits(component,
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WCD9XXX_ANA_RX_SUPPLIES,
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(1 << 6), (enable << 6));
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/*
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* 100us sleep is required after flyback enable/disable
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* as per HW requirement
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*/
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usleep_range(100, 110);
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snd_soc_component_update_bits(component,
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WCD9XXX_FLYBACK_VNEGDAC_CTRL_2,
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0xE0, 0xE0);
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/* 500usec delay is needed as per HW requirement */
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usleep_range(500, 500 + WCD_USLEEP_RANGE);
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}
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}
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static void wcd_clsh_v3_set_flyback_current(struct snd_soc_component *component,
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int mode)
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{
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snd_soc_component_update_bits(component, WCD9XXX_V3_RX_BIAS_FLYB_BUFF,
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0x0F, 0x0A);
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snd_soc_component_update_bits(component, WCD9XXX_V3_RX_BIAS_FLYB_BUFF,
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0xF0, 0xA0);
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/* Sleep needed to avoid click and pop as per HW requirement */
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usleep_range(100, 110);
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}
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static void wcd_clsh_v3_state_aux(struct wcd_clsh_ctrl *ctrl, int req_state,
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bool is_enable, int mode)
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{
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struct snd_soc_component *component = ctrl->comp;
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if (is_enable) {
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wcd_clsh_v3_set_buck_mode(component, mode);
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wcd_clsh_v3_set_flyback_mode(component, mode);
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wcd_clsh_v3_flyback_ctrl(component, ctrl, mode, true);
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wcd_clsh_v3_set_flyback_current(component, mode);
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wcd_clsh_v3_buck_ctrl(component, ctrl, mode, true);
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} else {
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wcd_clsh_v3_buck_ctrl(component, ctrl, mode, false);
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wcd_clsh_v3_flyback_ctrl(component, ctrl, mode, false);
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wcd_clsh_v3_set_flyback_mode(component, CLS_H_NORMAL);
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wcd_clsh_v3_set_buck_mode(component, CLS_H_NORMAL);
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}
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}
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static void wcd_clsh_state_lo(struct wcd_clsh_ctrl *ctrl, int req_state,
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bool is_enable, int mode)
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{
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@ -316,6 +538,38 @@ static void wcd_clsh_state_lo(struct wcd_clsh_ctrl *ctrl, int req_state,
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}
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}
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static void wcd_clsh_v3_state_hph_r(struct wcd_clsh_ctrl *ctrl, int req_state,
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bool is_enable, int mode)
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{
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struct snd_soc_component *component = ctrl->comp;
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if (mode == CLS_H_NORMAL) {
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dev_dbg(component->dev, "%s: Normal mode not applicable for hph_r\n",
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__func__);
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return;
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}
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if (is_enable) {
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wcd_clsh_v3_set_buck_regulator_mode(component, mode);
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wcd_clsh_v3_set_flyback_mode(component, mode);
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wcd_clsh_v3_force_iq_ctl(component, mode, true);
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wcd_clsh_v3_flyback_ctrl(component, ctrl, mode, true);
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wcd_clsh_v3_set_flyback_current(component, mode);
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wcd_clsh_v3_set_buck_mode(component, mode);
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wcd_clsh_v3_buck_ctrl(component, ctrl, mode, true);
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wcd_clsh_v3_set_hph_mode(component, mode);
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} else {
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wcd_clsh_v3_set_hph_mode(component, CLS_H_NORMAL);
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/* buck and flyback set to default mode and disable */
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wcd_clsh_v3_flyback_ctrl(component, ctrl, CLS_H_NORMAL, false);
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wcd_clsh_v3_buck_ctrl(component, ctrl, CLS_H_NORMAL, false);
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wcd_clsh_v3_force_iq_ctl(component, CLS_H_NORMAL, false);
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wcd_clsh_v3_set_flyback_mode(component, CLS_H_NORMAL);
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wcd_clsh_v3_set_buck_mode(component, CLS_H_NORMAL);
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}
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}
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static void wcd_clsh_state_hph_r(struct wcd_clsh_ctrl *ctrl, int req_state,
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bool is_enable, int mode)
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{
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@ -353,10 +607,10 @@ static void wcd_clsh_state_hph_r(struct wcd_clsh_ctrl *ctrl, int req_state,
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wcd_clsh_set_flyback_current(comp, mode);
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wcd_clsh_set_buck_mode(comp, mode);
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wcd_clsh_buck_ctrl(ctrl, mode, true);
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wcd_clsh_set_hph_mode(comp, mode);
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wcd_clsh_v2_set_hph_mode(comp, mode);
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wcd_clsh_set_gain_path(ctrl, mode);
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} else {
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wcd_clsh_set_hph_mode(comp, CLS_H_NORMAL);
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wcd_clsh_v2_set_hph_mode(comp, CLS_H_NORMAL);
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if (mode != CLS_AB) {
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snd_soc_component_update_bits(comp,
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@ -374,6 +628,38 @@ static void wcd_clsh_state_hph_r(struct wcd_clsh_ctrl *ctrl, int req_state,
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}
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}
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static void wcd_clsh_v3_state_hph_l(struct wcd_clsh_ctrl *ctrl, int req_state,
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bool is_enable, int mode)
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{
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struct snd_soc_component *component = ctrl->comp;
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if (mode == CLS_H_NORMAL) {
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dev_dbg(component->dev, "%s: Normal mode not applicable for hph_l\n",
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__func__);
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return;
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}
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if (is_enable) {
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wcd_clsh_v3_set_buck_regulator_mode(component, mode);
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wcd_clsh_v3_set_flyback_mode(component, mode);
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wcd_clsh_v3_force_iq_ctl(component, mode, true);
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wcd_clsh_v3_flyback_ctrl(component, ctrl, mode, true);
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wcd_clsh_v3_set_flyback_current(component, mode);
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wcd_clsh_v3_set_buck_mode(component, mode);
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wcd_clsh_v3_buck_ctrl(component, ctrl, mode, true);
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wcd_clsh_v3_set_hph_mode(component, mode);
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} else {
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wcd_clsh_v3_set_hph_mode(component, CLS_H_NORMAL);
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/* set buck and flyback to Default Mode */
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wcd_clsh_v3_flyback_ctrl(component, ctrl, CLS_H_NORMAL, false);
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wcd_clsh_v3_buck_ctrl(component, ctrl, CLS_H_NORMAL, false);
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wcd_clsh_v3_force_iq_ctl(component, CLS_H_NORMAL, false);
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wcd_clsh_v3_set_flyback_mode(component, CLS_H_NORMAL);
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wcd_clsh_v3_set_buck_mode(component, CLS_H_NORMAL);
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}
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}
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static void wcd_clsh_state_hph_l(struct wcd_clsh_ctrl *ctrl, int req_state,
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bool is_enable, int mode)
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{
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@ -411,10 +697,10 @@ static void wcd_clsh_state_hph_l(struct wcd_clsh_ctrl *ctrl, int req_state,
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wcd_clsh_set_flyback_current(comp, mode);
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wcd_clsh_set_buck_mode(comp, mode);
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wcd_clsh_buck_ctrl(ctrl, mode, true);
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wcd_clsh_set_hph_mode(comp, mode);
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wcd_clsh_v2_set_hph_mode(comp, mode);
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wcd_clsh_set_gain_path(ctrl, mode);
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} else {
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wcd_clsh_set_hph_mode(comp, CLS_H_NORMAL);
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wcd_clsh_v2_set_hph_mode(comp, CLS_H_NORMAL);
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if (mode != CLS_AB) {
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snd_soc_component_update_bits(comp,
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@ -432,6 +718,32 @@ static void wcd_clsh_state_hph_l(struct wcd_clsh_ctrl *ctrl, int req_state,
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}
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}
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static void wcd_clsh_v3_state_ear(struct wcd_clsh_ctrl *ctrl, int req_state,
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bool is_enable, int mode)
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{
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struct snd_soc_component *component = ctrl->comp;
|
||||
|
||||
if (is_enable) {
|
||||
wcd_clsh_v3_set_buck_regulator_mode(component, mode);
|
||||
wcd_clsh_v3_set_flyback_mode(component, mode);
|
||||
wcd_clsh_v3_force_iq_ctl(component, mode, true);
|
||||
wcd_clsh_v3_flyback_ctrl(component, ctrl, mode, true);
|
||||
wcd_clsh_v3_set_flyback_current(component, mode);
|
||||
wcd_clsh_v3_set_buck_mode(component, mode);
|
||||
wcd_clsh_v3_buck_ctrl(component, ctrl, mode, true);
|
||||
wcd_clsh_v3_set_hph_mode(component, mode);
|
||||
} else {
|
||||
wcd_clsh_v3_set_hph_mode(component, CLS_H_NORMAL);
|
||||
|
||||
/* set buck and flyback to Default Mode */
|
||||
wcd_clsh_v3_flyback_ctrl(component, ctrl, CLS_H_NORMAL, false);
|
||||
wcd_clsh_v3_buck_ctrl(component, ctrl, CLS_H_NORMAL, false);
|
||||
wcd_clsh_v3_force_iq_ctl(component, CLS_H_NORMAL, false);
|
||||
wcd_clsh_v3_set_flyback_mode(component, CLS_H_NORMAL);
|
||||
wcd_clsh_v3_set_buck_mode(component, CLS_H_NORMAL);
|
||||
}
|
||||
}
|
||||
|
||||
static void wcd_clsh_state_ear(struct wcd_clsh_ctrl *ctrl, int req_state,
|
||||
bool is_enable, int mode)
|
||||
{
|
||||
|
@ -472,16 +784,30 @@ static int _wcd_clsh_ctrl_set_state(struct wcd_clsh_ctrl *ctrl, int req_state,
|
|||
{
|
||||
switch (req_state) {
|
||||
case WCD_CLSH_STATE_EAR:
|
||||
wcd_clsh_state_ear(ctrl, req_state, is_enable, mode);
|
||||
if (ctrl->codec_version >= WCD937X)
|
||||
wcd_clsh_v3_state_ear(ctrl, req_state, is_enable, mode);
|
||||
else
|
||||
wcd_clsh_state_ear(ctrl, req_state, is_enable, mode);
|
||||
break;
|
||||
case WCD_CLSH_STATE_HPHL:
|
||||
wcd_clsh_state_hph_l(ctrl, req_state, is_enable, mode);
|
||||
if (ctrl->codec_version >= WCD937X)
|
||||
wcd_clsh_v3_state_hph_l(ctrl, req_state, is_enable, mode);
|
||||
else
|
||||
wcd_clsh_state_hph_l(ctrl, req_state, is_enable, mode);
|
||||
break;
|
||||
case WCD_CLSH_STATE_HPHR:
|
||||
wcd_clsh_state_hph_r(ctrl, req_state, is_enable, mode);
|
||||
if (ctrl->codec_version >= WCD937X)
|
||||
wcd_clsh_v3_state_hph_r(ctrl, req_state, is_enable, mode);
|
||||
else
|
||||
wcd_clsh_state_hph_r(ctrl, req_state, is_enable, mode);
|
||||
break;
|
||||
case WCD_CLSH_STATE_LO:
|
||||
wcd_clsh_state_lo(ctrl, req_state, is_enable, mode);
|
||||
if (ctrl->codec_version < WCD937X)
|
||||
wcd_clsh_state_lo(ctrl, req_state, is_enable, mode);
|
||||
break;
|
||||
case WCD_CLSH_STATE_AUX:
|
||||
if (ctrl->codec_version >= WCD937X)
|
||||
wcd_clsh_v3_state_aux(ctrl, req_state, is_enable, mode);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
|
@ -504,6 +830,7 @@ static bool wcd_clsh_is_state_valid(int state)
|
|||
case WCD_CLSH_STATE_HPHL:
|
||||
case WCD_CLSH_STATE_HPHR:
|
||||
case WCD_CLSH_STATE_LO:
|
||||
case WCD_CLSH_STATE_AUX:
|
||||
return true;
|
||||
default:
|
||||
return false;
|
||||
|
@ -565,6 +892,7 @@ struct wcd_clsh_ctrl *wcd_clsh_ctrl_alloc(struct snd_soc_component *comp,
|
|||
|
||||
ctrl->state = WCD_CLSH_STATE_IDLE;
|
||||
ctrl->comp = comp;
|
||||
ctrl->codec_version = version;
|
||||
|
||||
return ctrl;
|
||||
}
|
||||
|
|
|
@ -22,8 +22,11 @@ enum wcd_clsh_event {
|
|||
#define WCD_CLSH_STATE_HPHL BIT(1)
|
||||
#define WCD_CLSH_STATE_HPHR BIT(2)
|
||||
#define WCD_CLSH_STATE_LO BIT(3)
|
||||
#define WCD_CLSH_STATE_AUX BIT(4)
|
||||
#define WCD_CLSH_STATE_MAX 4
|
||||
#define WCD_CLSH_V3_STATE_MAX 5
|
||||
#define NUM_CLSH_STATES_V2 BIT(WCD_CLSH_STATE_MAX)
|
||||
#define NUM_CLSH_STATES_V3 BIT(WCD_CLSH_V3_STATE_MAX)
|
||||
|
||||
enum wcd_clsh_mode {
|
||||
CLS_H_NORMAL = 0, /* Class-H Default */
|
||||
|
@ -31,9 +34,20 @@ enum wcd_clsh_mode {
|
|||
CLS_H_LP, /* Class-H Low Power */
|
||||
CLS_AB, /* Class-AB */
|
||||
CLS_H_LOHIFI, /* LoHIFI */
|
||||
CLS_H_ULP, /* Ultra Low power */
|
||||
CLS_AB_HIFI, /* Class-AB */
|
||||
CLS_AB_LP, /* Class-AB Low Power */
|
||||
CLS_AB_LOHIFI, /* Class-AB Low HIFI */
|
||||
CLS_NONE, /* None of the above modes */
|
||||
};
|
||||
|
||||
enum wcd_codec_version {
|
||||
WCD9335 = 0,
|
||||
WCD934X = 1,
|
||||
/* New CLSH after this */
|
||||
WCD937X = 2,
|
||||
WCD938X = 3,
|
||||
};
|
||||
struct wcd_clsh_ctrl;
|
||||
|
||||
extern struct wcd_clsh_ctrl *wcd_clsh_ctrl_alloc(
|
||||
|
@ -45,5 +59,7 @@ extern int wcd_clsh_ctrl_set_state(struct wcd_clsh_ctrl *ctrl,
|
|||
enum wcd_clsh_event clsh_event,
|
||||
int nstate,
|
||||
enum wcd_clsh_mode mode);
|
||||
extern void wcd_clsh_set_hph_mode(struct wcd_clsh_ctrl *ctrl,
|
||||
int mode);
|
||||
|
||||
#endif /* _WCD_CLSH_V2_H_ */
|
||||
|
|
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