powerpc/ptrace: Enable support for NT_PPC_CFPR
This patch enables support for TM checkpointed FPR register set ELF core note NT_PPC_CFPR based ptrace requests through PTRACE_GETREGSET, PTRACE_SETREGSET calls. This is achieved through adding a register set REGSET_CFPR in powerpc corresponding to the ELF core note section added. It implements the get, set and active functions for this new register set added. Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com> Signed-off-by: Simon Guo <wei.guo.simon@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Коммит
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@ -1032,6 +1032,121 @@ static int tm_cgpr_set(struct task_struct *target,
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return ret;
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return ret;
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}
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}
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/**
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* tm_cfpr_active - get active number of registers in CFPR
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* @target: The target task.
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* @regset: The user regset structure.
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*
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* This function checks for the active number of available
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* regisers in transaction checkpointed FPR category.
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*/
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static int tm_cfpr_active(struct task_struct *target,
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const struct user_regset *regset)
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{
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if (!cpu_has_feature(CPU_FTR_TM))
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return -ENODEV;
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if (!MSR_TM_ACTIVE(target->thread.regs->msr))
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return 0;
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return regset->n;
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}
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/**
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* tm_cfpr_get - get CFPR registers
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* @target: The target task.
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* @regset: The user regset structure.
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* @pos: The buffer position.
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* @count: Number of bytes to copy.
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* @kbuf: Kernel buffer to copy from.
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* @ubuf: User buffer to copy into.
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*
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* This function gets in transaction checkpointed FPR registers.
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*
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* When the transaction is active 'fp_state' holds the checkpointed
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* values for the current transaction to fall back on if it aborts
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* in between. This function gets those checkpointed FPR registers.
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* The userspace interface buffer layout is as follows.
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*
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* struct data {
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* u64 fpr[32];
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* u64 fpscr;
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*};
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*/
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static int tm_cfpr_get(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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void *kbuf, void __user *ubuf)
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{
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u64 buf[33];
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int i;
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if (!cpu_has_feature(CPU_FTR_TM))
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return -ENODEV;
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if (!MSR_TM_ACTIVE(target->thread.regs->msr))
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return -ENODATA;
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flush_fp_to_thread(target);
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flush_altivec_to_thread(target);
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flush_tmregs_to_thread(target);
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/* copy to local buffer then write that out */
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for (i = 0; i < 32 ; i++)
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buf[i] = target->thread.TS_FPR(i);
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buf[32] = target->thread.fp_state.fpscr;
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return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
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}
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/**
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* tm_cfpr_set - set CFPR registers
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* @target: The target task.
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* @regset: The user regset structure.
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* @pos: The buffer position.
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* @count: Number of bytes to copy.
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* @kbuf: Kernel buffer to copy into.
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* @ubuf: User buffer to copy from.
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*
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* This function sets in transaction checkpointed FPR registers.
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*
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* When the transaction is active 'fp_state' holds the checkpointed
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* FPR register values for the current transaction to fall back on
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* if it aborts in between. This function sets these checkpointed
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* FPR registers. The userspace interface buffer layout is as follows.
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*
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* struct data {
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* u64 fpr[32];
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* u64 fpscr;
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*};
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*/
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static int tm_cfpr_set(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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const void *kbuf, const void __user *ubuf)
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{
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u64 buf[33];
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int i;
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if (!cpu_has_feature(CPU_FTR_TM))
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return -ENODEV;
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if (!MSR_TM_ACTIVE(target->thread.regs->msr))
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return -ENODATA;
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flush_fp_to_thread(target);
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flush_altivec_to_thread(target);
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flush_tmregs_to_thread(target);
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/* copy to local buffer then write that out */
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i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
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if (i)
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return i;
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for (i = 0; i < 32 ; i++)
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target->thread.TS_FPR(i) = buf[i];
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target->thread.fp_state.fpscr = buf[32];
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return 0;
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}
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#endif
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#endif
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/*
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/*
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@ -1051,6 +1166,7 @@ enum powerpc_regset {
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#endif
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#endif
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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REGSET_TM_CGPR, /* TM checkpointed GPR registers */
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REGSET_TM_CGPR, /* TM checkpointed GPR registers */
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REGSET_TM_CFPR, /* TM checkpointed FPR registers */
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#endif
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#endif
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};
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};
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@ -1092,6 +1208,11 @@ static const struct user_regset native_regsets[] = {
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.size = sizeof(long), .align = sizeof(long),
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.size = sizeof(long), .align = sizeof(long),
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.active = tm_cgpr_active, .get = tm_cgpr_get, .set = tm_cgpr_set
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.active = tm_cgpr_active, .get = tm_cgpr_get, .set = tm_cgpr_set
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},
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},
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[REGSET_TM_CFPR] = {
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.core_note_type = NT_PPC_TM_CFPR, .n = ELF_NFPREG,
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.size = sizeof(double), .align = sizeof(double),
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.active = tm_cfpr_active, .get = tm_cfpr_get, .set = tm_cfpr_set
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},
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#endif
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#endif
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};
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};
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@ -1324,6 +1445,11 @@ static const struct user_regset compat_regsets[] = {
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.active = tm_cgpr_active,
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.active = tm_cgpr_active,
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.get = tm_cgpr32_get, .set = tm_cgpr32_set
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.get = tm_cgpr32_get, .set = tm_cgpr32_set
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},
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},
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[REGSET_TM_CFPR] = {
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.core_note_type = NT_PPC_TM_CFPR, .n = ELF_NFPREG,
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.size = sizeof(double), .align = sizeof(double),
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.active = tm_cfpr_active, .get = tm_cfpr_get, .set = tm_cfpr_set
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},
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#endif
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#endif
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};
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};
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