[PATCH] powerpc: create a new arch/powerpc/platforms/cell/smp.c
During the conversion to the merge tree, the Cell specific SMP initialization was removed from the pSeries code. This creates a new Cell specific SMP implementation file. Signed-off-by: Arnd Bergmann <arndb@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
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@ -11,3 +11,4 @@ obj-$(CONFIG_85xx) += 85xx/
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obj-$(CONFIG_PPC_PSERIES) += pseries/
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obj-$(CONFIG_PPC_ISERIES) += iseries/
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obj-$(CONFIG_PPC_MAPLE) += maple/
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obj-$(CONFIG_PPC_CELL) += cell/
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@ -0,0 +1 @@
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obj-$(CONFIG_SMP) += smp.o
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@ -0,0 +1,230 @@
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/*
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* SMP support for BPA machines.
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*
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* Dave Engebretsen, Peter Bergner, and
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* Mike Corrigan {engebret|bergner|mikec}@us.ibm.com
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*
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* Plus various changes from other IBM teams...
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#undef DEBUG
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#include <linux/config.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/smp.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/spinlock.h>
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#include <linux/cache.h>
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#include <linux/err.h>
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#include <linux/sysdev.h>
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#include <linux/cpu.h>
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#include <asm/ptrace.h>
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#include <asm/atomic.h>
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#include <asm/irq.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/io.h>
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#include <asm/prom.h>
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#include <asm/smp.h>
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#include <asm/paca.h>
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#include <asm/time.h>
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#include <asm/machdep.h>
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#include <asm/cputable.h>
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#include <asm/firmware.h>
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#include <asm/system.h>
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#include <asm/rtas.h>
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#include "interrupt.h"
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#ifdef DEBUG
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#define DBG(fmt...) udbg_printf(fmt)
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#else
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#define DBG(fmt...)
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#endif
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/*
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* The primary thread of each non-boot processor is recorded here before
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* smp init.
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*/
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static cpumask_t of_spin_map;
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extern void pSeries_secondary_smp_init(unsigned long);
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/**
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* smp_startup_cpu() - start the given cpu
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*
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* At boot time, there is nothing to do for primary threads which were
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* started from Open Firmware. For anything else, call RTAS with the
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* appropriate start location.
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*
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* Returns:
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* 0 - failure
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* 1 - success
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*/
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static inline int __devinit smp_startup_cpu(unsigned int lcpu)
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{
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int status;
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unsigned long start_here = __pa((u32)*((unsigned long *)
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pSeries_secondary_smp_init));
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unsigned int pcpu;
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int start_cpu;
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if (cpu_isset(lcpu, of_spin_map))
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/* Already started by OF and sitting in spin loop */
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return 1;
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pcpu = get_hard_smp_processor_id(lcpu);
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/* Fixup atomic count: it exited inside IRQ handler. */
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paca[lcpu].__current->thread_info->preempt_count = 0;
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/*
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* If the RTAS start-cpu token does not exist then presume the
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* cpu is already spinning.
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*/
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start_cpu = rtas_token("start-cpu");
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if (start_cpu == RTAS_UNKNOWN_SERVICE)
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return 1;
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status = rtas_call(start_cpu, 3, 1, NULL, pcpu, start_here, lcpu);
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if (status != 0) {
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printk(KERN_ERR "start-cpu failed: %i\n", status);
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return 0;
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}
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return 1;
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}
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static void smp_iic_message_pass(int target, int msg)
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{
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unsigned int i;
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if (target < NR_CPUS) {
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iic_cause_IPI(target, msg);
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} else {
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for_each_online_cpu(i) {
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if (target == MSG_ALL_BUT_SELF
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&& i == smp_processor_id())
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continue;
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iic_cause_IPI(i, msg);
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}
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}
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}
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static int __init smp_iic_probe(void)
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{
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iic_request_IPIs();
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return cpus_weight(cpu_possible_map);
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}
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static void __devinit smp_iic_setup_cpu(int cpu)
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{
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if (cpu != boot_cpuid)
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iic_setup_cpu();
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}
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static DEFINE_SPINLOCK(timebase_lock);
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static unsigned long timebase = 0;
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static void __devinit cell_give_timebase(void)
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{
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spin_lock(&timebase_lock);
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rtas_call(rtas_token("freeze-time-base"), 0, 1, NULL);
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timebase = get_tb();
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spin_unlock(&timebase_lock);
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while (timebase)
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barrier();
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rtas_call(rtas_token("thaw-time-base"), 0, 1, NULL);
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}
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static void __devinit cell_take_timebase(void)
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{
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while (!timebase)
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barrier();
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spin_lock(&timebase_lock);
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set_tb(timebase >> 32, timebase & 0xffffffff);
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timebase = 0;
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spin_unlock(&timebase_lock);
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}
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static void __devinit smp_cell_kick_cpu(int nr)
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{
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BUG_ON(nr < 0 || nr >= NR_CPUS);
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if (!smp_startup_cpu(nr))
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return;
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/*
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* The processor is currently spinning, waiting for the
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* cpu_start field to become non-zero After we set cpu_start,
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* the processor will continue on to secondary_start
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*/
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paca[nr].cpu_start = 1;
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}
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static int smp_cell_cpu_bootable(unsigned int nr)
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{
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/* Special case - we inhibit secondary thread startup
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* during boot if the user requests it. Odd-numbered
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* cpus are assumed to be secondary threads.
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*/
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if (system_state < SYSTEM_RUNNING &&
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cpu_has_feature(CPU_FTR_SMT) &&
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!smt_enabled_at_boot && nr % 2 != 0)
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return 0;
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return 1;
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}
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static struct smp_ops_t bpa_iic_smp_ops = {
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.message_pass = smp_iic_message_pass,
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.probe = smp_iic_probe,
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.kick_cpu = smp_cell_kick_cpu,
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.setup_cpu = smp_iic_setup_cpu,
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.cpu_bootable = smp_cell_cpu_bootable,
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};
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/* This is called very early */
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void __init smp_init_cell(void)
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{
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int i;
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DBG(" -> smp_init_cell()\n");
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smp_ops = &bpa_iic_smp_ops;
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/* Mark threads which are still spinning in hold loops. */
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if (cpu_has_feature(CPU_FTR_SMT)) {
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for_each_present_cpu(i) {
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if (i % 2 == 0)
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/*
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* Even-numbered logical cpus correspond to
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* primary threads.
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*/
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cpu_set(i, of_spin_map);
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}
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} else {
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of_spin_map = cpu_present_map;
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}
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cpu_clear(boot_cpuid, of_spin_map);
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/* Non-lpar has additional take/give timebase */
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if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE) {
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smp_ops->give_timebase = cell_give_timebase;
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smp_ops->take_timebase = cell_take_timebase;
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}
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DBG(" <- smp_init_cell()\n");
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}
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@ -64,6 +64,7 @@ extern cpumask_t cpu_sibling_map[NR_CPUS];
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void smp_init_iSeries(void);
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void smp_init_pSeries(void);
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void smp_init_cell(void);
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extern int __cpu_disable(void);
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extern void __cpu_die(unsigned int cpu);
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