ASoC: cs35l35: Correct errata handling
Currently the check of errata_chk will always evaluate to false since the values tested don't come under the mask used. A shift of the field is missing, add this. Also there is an error in the values tested, they don't match the comment and the value 0x3 is not a valid value for the field in question. Update the value to match the comment. Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20210510131357.17170-7-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -496,10 +496,10 @@ static int cs35l35_hw_params(struct snd_pcm_substream *substream,
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* the Class H algorithm does not enable weak-drive operation for
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* nonzero values of CH_WKFET_DELAY if SP_RATE = 01 or 10
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*/
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errata_chk = clk_ctl & CS35L35_SP_RATE_MASK;
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errata_chk = (clk_ctl & CS35L35_SP_RATE_MASK) >> CS35L35_SP_RATE_SHIFT;
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if (classh->classh_wk_fet_disable == 0x00 &&
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(errata_chk == 0x01 || errata_chk == 0x03)) {
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(errata_chk == 0x01 || errata_chk == 0x02)) {
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ret = regmap_update_bits(cs35l35->regmap,
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CS35L35_CLASS_H_FET_DRIVE_CTL,
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CS35L35_CH_WKFET_DEL_MASK,
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@ -168,6 +168,7 @@
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#define CS35L35_SP_SCLKS_48FS 0x0B
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#define CS35L35_SP_SCLKS_64FS 0x0F
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#define CS35L35_SP_RATE_MASK 0xC0
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#define CS35L35_SP_RATE_SHIFT 6
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#define CS35L35_PDN_BST_MASK 0x06
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#define CS35L35_PDN_BST_FETON_SHIFT 1
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