OMAP: devices: Modify McSPI device to adapt to hwmod framework
Cleans up all base address definitions for omap_mcspi and adapts the device registration and driver to hwmod framework. Changes involves: 1) Removing all base address macro defines. 2) Using omap-device layer to register device and utilizing data from hwmod data file for base address, dma channel number, Irq_number, device attribute(number of chipselect). 3) Appending base address with pdata reg_offset for omap4 boards. For omap4 all regs used in driver deviate with reg_offset_macros defined with an value of 0x100. So pass this offset through pdata and append the same to base address retrieved from hwmod data file and we are not mapping *_HL_* regs which are not used in driver. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Reviewed-by: Partha Basak <p-basak2@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Charulatha V
Tony Lindgren
Родитель
0f616a4e17
Коммит
1a5d81905a
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@ -15,6 +15,7 @@
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#include <linux/io.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/slab.h>
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#include <mach/hardware.h>
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#include <mach/irqs.h>
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@ -279,163 +280,55 @@ static inline void omap_init_audio(void) {}
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#include <plat/mcspi.h>
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#define OMAP2_MCSPI1_BASE 0x48098000
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#define OMAP2_MCSPI2_BASE 0x4809a000
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#define OMAP2_MCSPI3_BASE 0x480b8000
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#define OMAP2_MCSPI4_BASE 0x480ba000
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#define OMAP4_MCSPI1_BASE 0x48098100
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#define OMAP4_MCSPI2_BASE 0x4809a100
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#define OMAP4_MCSPI3_BASE 0x480b8100
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#define OMAP4_MCSPI4_BASE 0x480ba100
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static struct omap2_mcspi_platform_config omap2_mcspi1_config = {
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.num_cs = 4,
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};
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static struct resource omap2_mcspi1_resources[] = {
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{
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.start = OMAP2_MCSPI1_BASE,
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.end = OMAP2_MCSPI1_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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struct omap_device_pm_latency omap_mcspi_latency[] = {
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[0] = {
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.deactivate_func = omap_device_idle_hwmods,
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.activate_func = omap_device_enable_hwmods,
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.flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
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},
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};
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static struct platform_device omap2_mcspi1 = {
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.name = "omap2_mcspi",
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.id = 1,
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.num_resources = ARRAY_SIZE(omap2_mcspi1_resources),
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.resource = omap2_mcspi1_resources,
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.dev = {
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.platform_data = &omap2_mcspi1_config,
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},
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};
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static struct omap2_mcspi_platform_config omap2_mcspi2_config = {
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.num_cs = 2,
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};
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static struct resource omap2_mcspi2_resources[] = {
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{
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.start = OMAP2_MCSPI2_BASE,
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.end = OMAP2_MCSPI2_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device omap2_mcspi2 = {
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.name = "omap2_mcspi",
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.id = 2,
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.num_resources = ARRAY_SIZE(omap2_mcspi2_resources),
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.resource = omap2_mcspi2_resources,
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.dev = {
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.platform_data = &omap2_mcspi2_config,
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},
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};
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#if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
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defined(CONFIG_ARCH_OMAP4)
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static struct omap2_mcspi_platform_config omap2_mcspi3_config = {
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.num_cs = 2,
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};
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static struct resource omap2_mcspi3_resources[] = {
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{
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.start = OMAP2_MCSPI3_BASE,
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.end = OMAP2_MCSPI3_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device omap2_mcspi3 = {
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.name = "omap2_mcspi",
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.id = 3,
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.num_resources = ARRAY_SIZE(omap2_mcspi3_resources),
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.resource = omap2_mcspi3_resources,
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.dev = {
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.platform_data = &omap2_mcspi3_config,
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},
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};
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#endif
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#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
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static struct omap2_mcspi_platform_config omap2_mcspi4_config = {
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.num_cs = 1,
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};
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static struct resource omap2_mcspi4_resources[] = {
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{
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.start = OMAP2_MCSPI4_BASE,
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.end = OMAP2_MCSPI4_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device omap2_mcspi4 = {
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.name = "omap2_mcspi",
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.id = 4,
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.num_resources = ARRAY_SIZE(omap2_mcspi4_resources),
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.resource = omap2_mcspi4_resources,
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.dev = {
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.platform_data = &omap2_mcspi4_config,
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},
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};
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#endif
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#ifdef CONFIG_ARCH_OMAP4
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static inline void omap4_mcspi_fixup(void)
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static int omap_mcspi_init(struct omap_hwmod *oh, void *unused)
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{
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omap2_mcspi1_resources[0].start = OMAP4_MCSPI1_BASE;
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omap2_mcspi1_resources[0].end = OMAP4_MCSPI1_BASE + 0xff;
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omap2_mcspi2_resources[0].start = OMAP4_MCSPI2_BASE;
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omap2_mcspi2_resources[0].end = OMAP4_MCSPI2_BASE + 0xff;
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omap2_mcspi3_resources[0].start = OMAP4_MCSPI3_BASE;
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omap2_mcspi3_resources[0].end = OMAP4_MCSPI3_BASE + 0xff;
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omap2_mcspi4_resources[0].start = OMAP4_MCSPI4_BASE;
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omap2_mcspi4_resources[0].end = OMAP4_MCSPI4_BASE + 0xff;
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}
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#else
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static inline void omap4_mcspi_fixup(void)
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{
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}
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#endif
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struct omap_device *od;
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char *name = "omap2_mcspi";
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struct omap2_mcspi_platform_config *pdata;
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static int spi_num;
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struct omap2_mcspi_dev_attr *mcspi_attrib = oh->dev_attr;
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#if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
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defined(CONFIG_ARCH_OMAP4)
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static inline void omap2_mcspi3_init(void)
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{
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platform_device_register(&omap2_mcspi3);
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}
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#else
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static inline void omap2_mcspi3_init(void)
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{
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}
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#endif
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pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
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if (!pdata) {
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pr_err("Memory allocation for McSPI device failed\n");
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return -ENOMEM;
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}
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#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
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static inline void omap2_mcspi4_init(void)
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{
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platform_device_register(&omap2_mcspi4);
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pdata->num_cs = mcspi_attrib->num_chipselect;
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switch (oh->class->rev) {
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case OMAP2_MCSPI_REV:
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case OMAP3_MCSPI_REV:
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pdata->regs_offset = 0;
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break;
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case OMAP4_MCSPI_REV:
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pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET;
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break;
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default:
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pr_err("Invalid McSPI Revision value\n");
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return -EINVAL;
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}
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spi_num++;
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od = omap_device_build(name, spi_num, oh, pdata,
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sizeof(*pdata), omap_mcspi_latency,
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ARRAY_SIZE(omap_mcspi_latency), 0);
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WARN(IS_ERR(od), "Cant build omap_device for %s:%s\n",
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name, oh->name);
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kfree(pdata);
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return 0;
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}
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#else
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static inline void omap2_mcspi4_init(void)
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{
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}
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#endif
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static void omap_init_mcspi(void)
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{
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if (cpu_is_omap44xx())
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omap4_mcspi_fixup();
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platform_device_register(&omap2_mcspi1);
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platform_device_register(&omap2_mcspi2);
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if (cpu_is_omap2430() || cpu_is_omap343x() || cpu_is_omap44xx())
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omap2_mcspi3_init();
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if (cpu_is_omap343x() || cpu_is_omap44xx())
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omap2_mcspi4_init();
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omap_hwmod_for_each_by_class("mcspi", omap_mcspi_init, NULL);
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}
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#else
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@ -5,8 +5,11 @@
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#define OMAP3_MCSPI_REV 1
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#define OMAP4_MCSPI_REV 2
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#define OMAP4_MCSPI_REG_OFFSET 0x100
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struct omap2_mcspi_platform_config {
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unsigned short num_cs;
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unsigned int regs_offset;
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};
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struct omap2_mcspi_dev_attr {
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@ -3,7 +3,7 @@
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*
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* Copyright (C) 2005, 2006 Nokia Corporation
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* Author: Samuel Ortiz <samuel.ortiz@nokia.com> and
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* Juha Yrjölä <juha.yrjola@nokia.com>
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* Juha Yrj<EFBFBD>l<EFBFBD> <juha.yrjola@nokia.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -1087,91 +1087,14 @@ static int __init omap2_mcspi_reset(struct omap2_mcspi *mcspi)
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return 0;
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}
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static u8 __initdata spi1_rxdma_id [] = {
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OMAP24XX_DMA_SPI1_RX0,
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OMAP24XX_DMA_SPI1_RX1,
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OMAP24XX_DMA_SPI1_RX2,
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OMAP24XX_DMA_SPI1_RX3,
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};
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static u8 __initdata spi1_txdma_id [] = {
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OMAP24XX_DMA_SPI1_TX0,
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OMAP24XX_DMA_SPI1_TX1,
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OMAP24XX_DMA_SPI1_TX2,
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OMAP24XX_DMA_SPI1_TX3,
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};
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static u8 __initdata spi2_rxdma_id[] = {
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OMAP24XX_DMA_SPI2_RX0,
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OMAP24XX_DMA_SPI2_RX1,
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};
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static u8 __initdata spi2_txdma_id[] = {
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OMAP24XX_DMA_SPI2_TX0,
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OMAP24XX_DMA_SPI2_TX1,
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};
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#if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_ARCH_OMAP3) \
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|| defined(CONFIG_ARCH_OMAP4)
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static u8 __initdata spi3_rxdma_id[] = {
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OMAP24XX_DMA_SPI3_RX0,
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OMAP24XX_DMA_SPI3_RX1,
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};
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static u8 __initdata spi3_txdma_id[] = {
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OMAP24XX_DMA_SPI3_TX0,
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OMAP24XX_DMA_SPI3_TX1,
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};
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#endif
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#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
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static u8 __initdata spi4_rxdma_id[] = {
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OMAP34XX_DMA_SPI4_RX0,
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};
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static u8 __initdata spi4_txdma_id[] = {
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OMAP34XX_DMA_SPI4_TX0,
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};
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#endif
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static int __init omap2_mcspi_probe(struct platform_device *pdev)
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{
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struct spi_master *master;
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struct omap2_mcspi_platform_config *pdata = pdev->dev.platform_data;
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struct omap2_mcspi *mcspi;
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struct resource *r;
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int status = 0, i;
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const u8 *rxdma_id, *txdma_id;
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unsigned num_chipselect;
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switch (pdev->id) {
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case 1:
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rxdma_id = spi1_rxdma_id;
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txdma_id = spi1_txdma_id;
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num_chipselect = 4;
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break;
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case 2:
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rxdma_id = spi2_rxdma_id;
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txdma_id = spi2_txdma_id;
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num_chipselect = 2;
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break;
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#if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_ARCH_OMAP3) \
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|| defined(CONFIG_ARCH_OMAP4)
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case 3:
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rxdma_id = spi3_rxdma_id;
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txdma_id = spi3_txdma_id;
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num_chipselect = 2;
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break;
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#endif
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#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
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case 4:
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rxdma_id = spi4_rxdma_id;
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txdma_id = spi4_txdma_id;
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num_chipselect = 1;
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break;
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#endif
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default:
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return -EINVAL;
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}
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master = spi_alloc_master(&pdev->dev, sizeof *mcspi);
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if (master == NULL) {
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@ -1188,7 +1111,7 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
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master->setup = omap2_mcspi_setup;
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master->transfer = omap2_mcspi_transfer;
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master->cleanup = omap2_mcspi_cleanup;
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master->num_chipselect = num_chipselect;
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master->num_chipselect = pdata->num_cs;
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dev_set_drvdata(&pdev->dev, master);
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@ -1206,6 +1129,8 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
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goto err1;
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}
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r->start += pdata->regs_offset;
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r->end += pdata->regs_offset;
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mcspi->phys = r->start;
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mcspi->base = ioremap(r->start, r->end - r->start + 1);
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if (!mcspi->base) {
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@ -1240,11 +1165,32 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
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if (mcspi->dma_channels == NULL)
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goto err3;
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for (i = 0; i < num_chipselect; i++) {
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for (i = 0; i < master->num_chipselect; i++) {
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char dma_ch_name[14];
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struct resource *dma_res;
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sprintf(dma_ch_name, "rx%d", i);
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dma_res = platform_get_resource_byname(pdev, IORESOURCE_DMA,
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dma_ch_name);
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if (!dma_res) {
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dev_dbg(&pdev->dev, "cannot get DMA RX channel\n");
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status = -ENODEV;
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break;
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}
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mcspi->dma_channels[i].dma_rx_channel = -1;
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mcspi->dma_channels[i].dma_rx_sync_dev = rxdma_id[i];
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mcspi->dma_channels[i].dma_rx_sync_dev = dma_res->start;
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sprintf(dma_ch_name, "tx%d", i);
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dma_res = platform_get_resource_byname(pdev, IORESOURCE_DMA,
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dma_ch_name);
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if (!dma_res) {
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dev_dbg(&pdev->dev, "cannot get DMA TX channel\n");
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status = -ENODEV;
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break;
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}
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mcspi->dma_channels[i].dma_tx_channel = -1;
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mcspi->dma_channels[i].dma_tx_sync_dev = txdma_id[i];
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mcspi->dma_channels[i].dma_tx_sync_dev = dma_res->start;
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}
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if (omap2_mcspi_reset(mcspi) < 0)
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