dt-bindings: display: bridge: renesas,lvds: Convert binding to YAML
Convert the Renesas R-Car LVDS encoder text binding to YAML. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20200514214211.9036-1-laurent.pinchart+renesas@ideasonboard.com
This commit is contained in:
Laurent Pinchart
Sam Ravnborg
Родитель
7e4e589db7
Коммит
1a6922ee0f
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Renesas R-Car LVDS Encoder
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==========================
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These DT bindings describe the LVDS encoder embedded in the Renesas R-Car
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Gen2, R-Car Gen3 and RZ/G SoCs.
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Required properties:
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- compatible : Shall contain one of
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- "renesas,r8a7743-lvds" for R8A7743 (RZ/G1M) compatible LVDS encoders
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- "renesas,r8a7744-lvds" for R8A7744 (RZ/G1N) compatible LVDS encoders
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- "renesas,r8a774a1-lvds" for R8A774A1 (RZ/G2M) compatible LVDS encoders
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- "renesas,r8a774b1-lvds" for R8A774B1 (RZ/G2N) compatible LVDS encoders
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- "renesas,r8a774c0-lvds" for R8A774C0 (RZ/G2E) compatible LVDS encoders
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- "renesas,r8a7790-lvds" for R8A7790 (R-Car H2) compatible LVDS encoders
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- "renesas,r8a7791-lvds" for R8A7791 (R-Car M2-W) compatible LVDS encoders
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- "renesas,r8a7793-lvds" for R8A7793 (R-Car M2-N) compatible LVDS encoders
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- "renesas,r8a7795-lvds" for R8A7795 (R-Car H3) compatible LVDS encoders
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- "renesas,r8a7796-lvds" for R8A7796 (R-Car M3-W) compatible LVDS encoders
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- "renesas,r8a77965-lvds" for R8A77965 (R-Car M3-N) compatible LVDS encoders
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- "renesas,r8a77970-lvds" for R8A77970 (R-Car V3M) compatible LVDS encoders
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- "renesas,r8a77980-lvds" for R8A77980 (R-Car V3H) compatible LVDS encoders
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- "renesas,r8a77990-lvds" for R8A77990 (R-Car E3) compatible LVDS encoders
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- "renesas,r8a77995-lvds" for R8A77995 (R-Car D3) compatible LVDS encoders
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- reg: Base address and length for the memory-mapped registers
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- clocks: A list of phandles + clock-specifier pairs, one for each entry in
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the clock-names property.
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- clock-names: Name of the clocks. This property is model-dependent.
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- The functional clock, which mandatory for all models, shall be listed
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first, and shall be named "fck".
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- On R8A77990, R8A77995 and R8A774C0, the LVDS encoder can use the EXTAL or
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DU_DOTCLKINx clocks. Those clocks are optional. When supplied they must be
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named "extal" and "dclkin.x" respectively, with "x" being the DU_DOTCLKIN
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numerical index.
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- When the clocks property only contains the functional clock, the
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clock-names property may be omitted.
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- resets: A phandle + reset specifier for the module reset
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Required nodes:
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The LVDS encoder has two video ports. Their connections are modelled using the
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OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.
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- Video port 0 corresponds to the parallel RGB input
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- Video port 1 corresponds to the LVDS output
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Each port shall have a single endpoint.
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Optional properties:
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- renesas,companion : phandle to the companion LVDS encoder. This property is
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mandatory for the first LVDS encoder on D3 and E3 SoCs, and shall point to
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the second encoder to be used as a companion in dual-link mode. It shall not
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be set for any other LVDS encoder.
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Example:
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lvds0: lvds@feb90000 {
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compatible = "renesas,r8a77990-lvds";
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reg = <0 0xfeb90000 0 0x20>;
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clocks = <&cpg CPG_MOD 727>;
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power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
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resets = <&cpg 727>;
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renesas,companion = <&lvds1>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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lvds0_in: endpoint {
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remote-endpoint = <&du_out_lvds0>;
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};
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};
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port@1 {
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reg = <1>;
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lvds0_out: endpoint {
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};
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};
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};
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};
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@ -0,0 +1,248 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/bridge/renesas,lvds.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas R-Car LVDS Encoder
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maintainers:
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- Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
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description: |
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These DT bindings describe the LVDS encoder embedded in the Renesas R-Car
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Gen2, R-Car Gen3, RZ/G1 and RZ/G2 SoCs.
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properties:
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compatible:
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enum:
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- renesas,r8a7743-lvds # for RZ/G1M compatible LVDS encoders
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- renesas,r8a7744-lvds # for RZ/G1N compatible LVDS encoders
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- renesas,r8a774a1-lvds # for RZ/G2M compatible LVDS encoders
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- renesas,r8a774b1-lvds # for RZ/G2N compatible LVDS encoders
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- renesas,r8a774c0-lvds # for RZ/G2E compatible LVDS encoders
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- renesas,r8a7790-lvds # for R-Car H2 compatible LVDS encoders
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- renesas,r8a7791-lvds # for R-Car M2-W compatible LVDS encoders
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- renesas,r8a7793-lvds # for R-Car M2-N compatible LVDS encoders
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- renesas,r8a7795-lvds # for R-Car H3 compatible LVDS encoders
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- renesas,r8a7796-lvds # for R-Car M3-W compatible LVDS encoders
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- renesas,r8a77965-lvds # for R-Car M3-N compatible LVDS encoders
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- renesas,r8a77970-lvds # for R-Car V3M compatible LVDS encoders
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- renesas,r8a77980-lvds # for R-Car V3H compatible LVDS encoders
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- renesas,r8a77990-lvds # for R-Car E3 compatible LVDS encoders
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- renesas,r8a77995-lvds # for R-Car D3 compatible LVDS encoders
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reg:
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maxItems: 1
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clocks:
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minItems: 1
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maxItems: 4
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clock-names:
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minItems: 1
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maxItems: 4
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resets:
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maxItems: 1
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ports:
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type: object
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description: |
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This device has two video ports. Their connections are modelled using the
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OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.
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Each port shall have a single endpoint.
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properties:
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'#address-cells':
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const: 1
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'#size-cells':
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const: 0
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port@0:
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type: object
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description: Parallel RGB input port
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port@1:
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type: object
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description: LVDS output port
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required:
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- port@0
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- port@1
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additionalProperties: false
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power-domains:
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maxItems: 1
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renesas,companion:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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phandle to the companion LVDS encoder. This property is mandatory
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for the first LVDS encoder on D3 and E3 SoCs, and shall point to
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the second encoder to be used as a companion in dual-link mode. It
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shall not be set for any other LVDS encoder.
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required:
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- compatible
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- reg
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- clocks
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- power-domains
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- resets
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- ports
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if:
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properties:
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compatible:
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enum:
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- renesas,r8a774c0-lvds
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- renesas,r8a77990-lvds
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- renesas,r8a77995-lvds
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then:
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properties:
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clocks:
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minItems: 1
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maxItems: 4
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items:
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- description: Functional clock
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- description: EXTAL input clock
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- description: DU_DOTCLKIN0 input clock
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- description: DU_DOTCLKIN1 input clock
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clock-names:
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minItems: 1
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maxItems: 4
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items:
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- const: fck
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# The LVDS encoder can use the EXTAL or DU_DOTCLKINx clocks.
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# These clocks are optional.
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- enum:
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- extal
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- dclkin.0
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- dclkin.1
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- enum:
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- extal
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- dclkin.0
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- dclkin.1
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- enum:
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- extal
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- dclkin.0
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- dclkin.1
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required:
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- clock-names
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else:
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properties:
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clocks:
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maxItems: 1
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items:
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- description: Functional clock
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clock-names:
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maxItems: 1
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items:
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- const: fck
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renesas,companion: false
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/renesas-cpg-mssr.h>
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#include <dt-bindings/power/r8a7795-sysc.h>
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lvds@feb90000 {
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compatible = "renesas,r8a7795-lvds";
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reg = <0xfeb90000 0x14>;
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clocks = <&cpg CPG_MOD 727>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 727>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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lvds_in: endpoint {
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remote-endpoint = <&du_out_lvds0>;
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};
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};
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port@1 {
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reg = <1>;
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lvds_out: endpoint {
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remote-endpoint = <&panel_in>;
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};
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};
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};
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};
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- |
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#include <dt-bindings/clock/renesas-cpg-mssr.h>
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#include <dt-bindings/power/r8a77990-sysc.h>
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lvds0: lvds@feb90000 {
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compatible = "renesas,r8a77990-lvds";
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reg = <0xfeb90000 0x20>;
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clocks = <&cpg CPG_MOD 727>,
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<&x13_clk>,
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<&extal_clk>;
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clock-names = "fck", "dclkin.0", "extal";
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power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
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resets = <&cpg 727>;
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renesas,companion = <&lvds1>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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lvds0_in: endpoint {
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remote-endpoint = <&du_out_lvds0>;
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};
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};
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port@1 {
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reg = <1>;
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lvds0_out: endpoint {
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remote-endpoint = <&panel_in1>;
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};
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};
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};
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};
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lvds1: lvds@feb90100 {
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compatible = "renesas,r8a77990-lvds";
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reg = <0xfeb90100 0x20>;
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clocks = <&cpg CPG_MOD 727>,
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<&x13_clk>,
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<&extal_clk>;
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clock-names = "fck", "dclkin.0", "extal";
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power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
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resets = <&cpg 726>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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lvds1_in: endpoint {
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remote-endpoint = <&du_out_lvds1>;
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};
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};
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port@1 {
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reg = <1>;
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lvds1_out: endpoint {
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remote-endpoint = <&panel_in2>;
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};
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};
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};
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};
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...
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