mmc, sh: Correct value for reset
This resolves a regression that I introduced in "mmc, sh: Move constants to sh_mmcif.h". Having examined the manual and tested the code on an AP4EVB board it seems that the correct sequence is. 1) Write 1 to bit 31 and zeros to all other bits 2) Write zero to all bits Cc: Yusuke Goda <yusuke.goda.sx@renesas.com> Cc: Magnus Damm <magnus.damm@gmail.com> Signed-off-by: Simon Horman <horms@verge.net.au> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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7211a1bae6
Коммит
1ae0affedc
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@ -80,7 +80,7 @@ struct sh_mmcif_plat_data {
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/* CE_VERSION */
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/* CE_VERSION */
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#define SOFT_RST_ON (1 << 31)
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#define SOFT_RST_ON (1 << 31)
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#define SOFT_RST_OFF ~SOFT_RST_ON
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#define SOFT_RST_OFF 0
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static inline u32 sh_mmcif_readl(void __iomem *addr, int reg)
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static inline u32 sh_mmcif_readl(void __iomem *addr, int reg)
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{
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{
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@ -168,12 +168,9 @@ static inline int sh_mmcif_boot_do_read(void __iomem *base,
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static inline void sh_mmcif_boot_init(void __iomem *base)
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static inline void sh_mmcif_boot_init(void __iomem *base)
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{
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{
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unsigned long tmp;
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/* reset */
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/* reset */
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tmp = sh_mmcif_readl(base, MMCIF_CE_VERSION);
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sh_mmcif_writel(base, MMCIF_CE_VERSION, SOFT_RST_ON);
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sh_mmcif_writel(base, MMCIF_CE_VERSION, tmp | SOFT_RST_ON);
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sh_mmcif_writel(base, MMCIF_CE_VERSION, SOFT_RST_OFF);
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sh_mmcif_writel(base, MMCIF_CE_VERSION, tmp & SOFT_RST_OFF);
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/* byte swap */
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/* byte swap */
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sh_mmcif_writel(base, MMCIF_CE_BUF_ACC, BUF_ACC_ATYP);
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sh_mmcif_writel(base, MMCIF_CE_BUF_ACC, BUF_ACC_ATYP);
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