ASoC: SOF: Intel: tgl: unify core_put on IPC3 & IPC4 path
Firmware may do context saving before powering off primary core, so driver needs to send ipc msg by set_core_state. In IPC4 path, firmware needs to save current context to IMR before powering off primary core. Firmware does nothing for set_core_state message in IPC3 path. So IPC4 and IPC3 can share the same operation sequence. Signed-off-by: Rander Wang <rander.wang@intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com> Link: https://lore.kernel.org/r/20230523103217.20412-4-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -39,14 +39,18 @@ static int tgl_dsp_core_get(struct snd_sof_dev *sdev, int core)
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static int tgl_dsp_core_put(struct snd_sof_dev *sdev, int core)
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{
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const struct sof_ipc_pm_ops *pm_ops = sdev->ipc->ops->pm;
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int ret;
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if (pm_ops->set_core_state) {
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ret = pm_ops->set_core_state(sdev, core, false);
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if (ret < 0)
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return ret;
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}
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/* power down primary core and return */
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if (core == SOF_DSP_PRIMARY_CORE)
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return hda_dsp_core_reset_power_down(sdev, BIT(core));
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if (pm_ops->set_core_state)
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return pm_ops->set_core_state(sdev, core, false);
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return 0;
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}
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