Merge branch 'irq' into for-next
This commit is contained in:
James Bottomley
Коммит
1c0f647690
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@ -15,6 +15,7 @@ config PARISC
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select HAVE_GENERIC_HARDIRQS
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select GENERIC_IRQ_PROBE
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select IRQ_PER_CPU
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select GENERIC_HARDIRQS_NO_DEPRECATED
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help
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The PA-RISC microprocessor is designed by Hewlett-Packard and used
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@ -32,15 +32,10 @@ static __inline__ int irq_canonicalize(int irq)
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}
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struct irq_chip;
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struct irq_data;
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/*
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* Some useful "we don't have to do anything here" handlers. Should
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* probably be provided by the generic code.
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*/
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void no_ack_irq(unsigned int irq);
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void no_end_irq(unsigned int irq);
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void cpu_ack_irq(unsigned int irq);
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void cpu_eoi_irq(unsigned int irq);
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void cpu_ack_irq(struct irq_data *d);
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void cpu_eoi_irq(struct irq_data *d);
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extern int txn_alloc_irq(unsigned int nbits);
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extern int txn_claim_irq(int);
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@ -49,7 +44,7 @@ extern unsigned long txn_alloc_addr(unsigned int);
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extern unsigned long txn_affinity_addr(unsigned int irq, int cpu);
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extern int cpu_claim_irq(unsigned int irq, struct irq_chip *, void *);
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extern int cpu_check_affinity(unsigned int irq, const struct cpumask *dest);
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extern int cpu_check_affinity(struct irq_data *d, const struct cpumask *dest);
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/* soft power switch support (power.c) */
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extern struct tasklet_struct power_tasklet;
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@ -52,9 +52,9 @@ static volatile unsigned long cpu_eiem = 0;
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*/
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static DEFINE_PER_CPU(unsigned long, local_ack_eiem) = ~0UL;
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static void cpu_mask_irq(unsigned int irq)
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static void cpu_mask_irq(struct irq_data *d)
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{
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unsigned long eirr_bit = EIEM_MASK(irq);
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unsigned long eirr_bit = EIEM_MASK(d->irq);
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cpu_eiem &= ~eirr_bit;
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/* Do nothing on the other CPUs. If they get this interrupt,
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@ -63,7 +63,7 @@ static void cpu_mask_irq(unsigned int irq)
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* then gets disabled */
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}
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static void cpu_unmask_irq(unsigned int irq)
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static void __cpu_unmask_irq(unsigned int irq)
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{
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unsigned long eirr_bit = EIEM_MASK(irq);
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@ -75,9 +75,14 @@ static void cpu_unmask_irq(unsigned int irq)
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smp_send_all_nop();
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}
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void cpu_ack_irq(unsigned int irq)
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static void cpu_unmask_irq(struct irq_data *d)
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{
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unsigned long mask = EIEM_MASK(irq);
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__cpu_unmask_irq(d->irq);
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}
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void cpu_ack_irq(struct irq_data *d)
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{
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unsigned long mask = EIEM_MASK(d->irq);
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int cpu = smp_processor_id();
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/* Clear in EIEM so we can no longer process */
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@ -90,9 +95,9 @@ void cpu_ack_irq(unsigned int irq)
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mtctl(mask, 23);
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}
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void cpu_eoi_irq(unsigned int irq)
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void cpu_eoi_irq(struct irq_data *d)
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{
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unsigned long mask = EIEM_MASK(irq);
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unsigned long mask = EIEM_MASK(d->irq);
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int cpu = smp_processor_id();
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/* set it in the eiems---it's no longer in process */
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@ -103,15 +108,16 @@ void cpu_eoi_irq(unsigned int irq)
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}
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#ifdef CONFIG_SMP
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int cpu_check_affinity(unsigned int irq, const struct cpumask *dest)
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int cpu_check_affinity(struct irq_data *d, const struct cpumask *dest)
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{
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int cpu_dest;
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/* timer and ipi have to always be received on all CPUs */
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if (CHECK_IRQ_PER_CPU(irq_to_desc(irq)->status)) {
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if (CHECK_IRQ_PER_CPU(irq_to_desc(d->irq)->status)) {
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/* Bad linux design decision. The mask has already
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* been set; we must reset it */
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cpumask_setall(irq_desc[irq].affinity);
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* been set; we must reset it. Will fix - tglx
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*/
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cpumask_setall(d->affinity);
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return -EINVAL;
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}
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@ -121,33 +127,34 @@ int cpu_check_affinity(unsigned int irq, const struct cpumask *dest)
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return cpu_dest;
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}
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static int cpu_set_affinity_irq(unsigned int irq, const struct cpumask *dest)
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static int cpu_set_affinity_irq(struct irq_data *d, const struct cpumask *dest,
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bool force)
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{
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int cpu_dest;
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cpu_dest = cpu_check_affinity(irq, dest);
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cpu_dest = cpu_check_affinity(d, dest);
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if (cpu_dest < 0)
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return -1;
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cpumask_copy(irq_desc[irq].affinity, dest);
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cpumask_copy(d->affinity, dest);
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return 0;
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}
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#endif
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static struct irq_chip cpu_interrupt_type = {
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.name = "CPU",
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.mask = cpu_mask_irq,
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.unmask = cpu_unmask_irq,
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.ack = cpu_ack_irq,
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.eoi = cpu_eoi_irq,
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.name = "CPU",
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.irq_mask = cpu_mask_irq,
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.irq_unmask = cpu_unmask_irq,
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.irq_ack = cpu_ack_irq,
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.irq_eoi = cpu_eoi_irq,
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#ifdef CONFIG_SMP
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.set_affinity = cpu_set_affinity_irq,
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.irq_set_affinity = cpu_set_affinity_irq,
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#endif
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/* XXX: Needs to be written. We managed without it so far, but
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* we really ought to write it.
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*/
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.retrigger = NULL,
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.irq_retrigger = NULL,
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};
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int show_interrupts(struct seq_file *p, void *v)
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@ -181,7 +188,7 @@ int show_interrupts(struct seq_file *p, void *v)
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seq_printf(p, "%10u ", kstat_irqs(i));
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#endif
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seq_printf(p, " %14s", irq_desc[i].chip->name);
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seq_printf(p, " %14s", irq_desc[i].irq_data.chip->name);
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#ifndef PARISC_IRQ_CR16_COUNTS
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seq_printf(p, " %s", action->name);
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@ -233,14 +240,14 @@ int cpu_claim_irq(unsigned int irq, struct irq_chip *type, void *data)
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{
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if (irq_desc[irq].action)
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return -EBUSY;
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if (irq_desc[irq].chip != &cpu_interrupt_type)
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if (get_irq_chip(irq) != &cpu_interrupt_type)
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return -EBUSY;
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/* for iosapic interrupts */
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if (type) {
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set_irq_chip_and_handler(irq, type, handle_percpu_irq);
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set_irq_chip_data(irq, data);
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cpu_unmask_irq(irq);
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__cpu_unmask_irq(irq);
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}
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return 0;
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}
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@ -289,7 +296,8 @@ int txn_alloc_irq(unsigned int bits_wide)
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unsigned long txn_affinity_addr(unsigned int irq, int cpu)
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{
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#ifdef CONFIG_SMP
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cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu));
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struct irq_data *d = irq_get_irq_data(irq);
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cpumask_copy(d->affinity, cpumask_of(cpu));
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#endif
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return per_cpu(cpu_data, cpu).txn_addr;
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@ -333,6 +341,7 @@ void do_cpu_irq_mask(struct pt_regs *regs)
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unsigned long eirr_val;
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int irq, cpu = smp_processor_id();
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#ifdef CONFIG_SMP
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struct irq_desc *desc;
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cpumask_t dest;
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#endif
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@ -346,8 +355,9 @@ void do_cpu_irq_mask(struct pt_regs *regs)
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irq = eirr_to_irq(eirr_val);
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#ifdef CONFIG_SMP
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cpumask_copy(&dest, irq_desc[irq].affinity);
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if (CHECK_IRQ_PER_CPU(irq_desc[irq].status) &&
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desc = irq_to_desc(irq);
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cpumask_copy(&dest, desc->irq_data.affinity);
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if (CHECK_IRQ_PER_CPU(desc->status) &&
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!cpu_isset(smp_processor_id(), dest)) {
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int cpu = first_cpu(dest);
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@ -296,25 +296,25 @@ static struct pci_port_ops dino_port_ops = {
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.outl = dino_out32
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};
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static void dino_mask_irq(unsigned int irq)
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static void dino_mask_irq(struct irq_data *d)
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{
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struct dino_device *dino_dev = get_irq_chip_data(irq);
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int local_irq = gsc_find_local_irq(irq, dino_dev->global_irq, DINO_LOCAL_IRQS);
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struct dino_device *dino_dev = irq_data_get_irq_chip_data(d);
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int local_irq = gsc_find_local_irq(d->irq, dino_dev->global_irq, DINO_LOCAL_IRQS);
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DBG(KERN_WARNING "%s(0x%p, %d)\n", __func__, dino_dev, irq);
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DBG(KERN_WARNING "%s(0x%p, %d)\n", __func__, dino_dev, d->irq);
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/* Clear the matching bit in the IMR register */
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dino_dev->imr &= ~(DINO_MASK_IRQ(local_irq));
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__raw_writel(dino_dev->imr, dino_dev->hba.base_addr+DINO_IMR);
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}
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static void dino_unmask_irq(unsigned int irq)
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static void dino_unmask_irq(struct irq_data *d)
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{
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struct dino_device *dino_dev = get_irq_chip_data(irq);
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int local_irq = gsc_find_local_irq(irq, dino_dev->global_irq, DINO_LOCAL_IRQS);
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struct dino_device *dino_dev = irq_data_get_irq_chip_data(d);
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int local_irq = gsc_find_local_irq(d->irq, dino_dev->global_irq, DINO_LOCAL_IRQS);
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u32 tmp;
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DBG(KERN_WARNING "%s(0x%p, %d)\n", __func__, dino_dev, irq);
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DBG(KERN_WARNING "%s(0x%p, %d)\n", __func__, dino_dev, d->irq);
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/*
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** clear pending IRQ bits
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@ -346,9 +346,9 @@ static void dino_unmask_irq(unsigned int irq)
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}
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static struct irq_chip dino_interrupt_type = {
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.name = "GSC-PCI",
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.unmask = dino_unmask_irq,
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.mask = dino_mask_irq,
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.name = "GSC-PCI",
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.irq_unmask = dino_unmask_irq,
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.irq_mask = dino_mask_irq,
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};
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@ -144,8 +144,9 @@ static unsigned int eisa_irq_level __read_mostly; /* default to edge triggered *
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/* called by free irq */
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static void eisa_mask_irq(unsigned int irq)
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static void eisa_mask_irq(struct irq_data *d)
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{
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unsigned int irq = d->irq;
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unsigned long flags;
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EISA_DBG("disable irq %d\n", irq);
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@ -164,8 +165,9 @@ static void eisa_mask_irq(unsigned int irq)
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}
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/* called by request irq */
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static void eisa_unmask_irq(unsigned int irq)
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static void eisa_unmask_irq(struct irq_data *d)
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{
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unsigned int irq = d->irq;
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unsigned long flags;
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EISA_DBG("enable irq %d\n", irq);
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@ -183,9 +185,9 @@ static void eisa_unmask_irq(unsigned int irq)
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}
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static struct irq_chip eisa_interrupt_type = {
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.name = "EISA",
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.unmask = eisa_unmask_irq,
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.mask = eisa_mask_irq,
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.name = "EISA",
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.irq_unmask = eisa_unmask_irq,
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.irq_mask = eisa_mask_irq,
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};
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static irqreturn_t eisa_irq(int wax_irq, void *intr_dev)
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@ -105,13 +105,13 @@ int gsc_find_local_irq(unsigned int irq, int *global_irqs, int limit)
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return NO_IRQ;
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}
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static void gsc_asic_mask_irq(unsigned int irq)
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static void gsc_asic_mask_irq(struct irq_data *d)
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{
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struct gsc_asic *irq_dev = get_irq_chip_data(irq);
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int local_irq = gsc_find_local_irq(irq, irq_dev->global_irq, 32);
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struct gsc_asic *irq_dev = irq_data_get_irq_chip_data(d);
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int local_irq = gsc_find_local_irq(d->irq, irq_dev->global_irq, 32);
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u32 imr;
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DEBPRINTK(KERN_DEBUG "%s(%d) %s: IMR 0x%x\n", __func__, irq,
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DEBPRINTK(KERN_DEBUG "%s(%d) %s: IMR 0x%x\n", __func__, d->irq,
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irq_dev->name, imr);
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/* Disable the IRQ line by clearing the bit in the IMR */
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@ -120,13 +120,13 @@ static void gsc_asic_mask_irq(unsigned int irq)
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gsc_writel(imr, irq_dev->hpa + OFFSET_IMR);
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}
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static void gsc_asic_unmask_irq(unsigned int irq)
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static void gsc_asic_unmask_irq(struct irq_data *d)
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{
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struct gsc_asic *irq_dev = get_irq_chip_data(irq);
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int local_irq = gsc_find_local_irq(irq, irq_dev->global_irq, 32);
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struct gsc_asic *irq_dev = irq_data_get_irq_chip_data(d);
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int local_irq = gsc_find_local_irq(d->irq, irq_dev->global_irq, 32);
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u32 imr;
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DEBPRINTK(KERN_DEBUG "%s(%d) %s: IMR 0x%x\n", __func__, irq,
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DEBPRINTK(KERN_DEBUG "%s(%d) %s: IMR 0x%x\n", __func__, d->irq,
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irq_dev->name, imr);
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/* Enable the IRQ line by setting the bit in the IMR */
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@ -140,9 +140,9 @@ static void gsc_asic_unmask_irq(unsigned int irq)
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}
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static struct irq_chip gsc_asic_interrupt_type = {
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.name = "GSC-ASIC",
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.unmask = gsc_asic_unmask_irq,
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.mask = gsc_asic_mask_irq,
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.name = "GSC-ASIC",
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.irq_unmask = gsc_asic_unmask_irq,
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.irq_mask = gsc_asic_mask_irq,
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};
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int gsc_assign_irq(struct irq_chip *type, void *data)
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|
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@ -615,10 +615,10 @@ iosapic_set_irt_data( struct vector_info *vi, u32 *dp0, u32 *dp1)
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}
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static void iosapic_mask_irq(unsigned int irq)
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static void iosapic_mask_irq(struct irq_data *d)
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{
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unsigned long flags;
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struct vector_info *vi = get_irq_chip_data(irq);
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struct vector_info *vi = irq_data_get_irq_chip_data(d);
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u32 d0, d1;
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spin_lock_irqsave(&iosapic_lock, flags);
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|
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@ -628,9 +628,9 @@ static void iosapic_mask_irq(unsigned int irq)
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spin_unlock_irqrestore(&iosapic_lock, flags);
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}
|
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|
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static void iosapic_unmask_irq(unsigned int irq)
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static void iosapic_unmask_irq(struct irq_data *d)
|
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{
|
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struct vector_info *vi = get_irq_chip_data(irq);
|
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struct vector_info *vi = irq_data_get_irq_chip_data(d);
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u32 d0, d1;
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/* data is initialized by fixup_irq */
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|
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@ -666,34 +666,34 @@ printk("\n");
|
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* enables their IRQ. It can lead to "interesting" race conditions
|
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* in the driver initialization sequence.
|
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*/
|
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DBG(KERN_DEBUG "enable_irq(%d): eoi(%p, 0x%x)\n", irq,
|
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DBG(KERN_DEBUG "enable_irq(%d): eoi(%p, 0x%x)\n", d->irq,
|
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vi->eoi_addr, vi->eoi_data);
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iosapic_eoi(vi->eoi_addr, vi->eoi_data);
|
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}
|
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|
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static void iosapic_eoi_irq(unsigned int irq)
|
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static void iosapic_eoi_irq(struct irq_data *d)
|
||||
{
|
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struct vector_info *vi = get_irq_chip_data(irq);
|
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struct vector_info *vi = irq_data_get_irq_chip_data(d);
|
||||
|
||||
iosapic_eoi(vi->eoi_addr, vi->eoi_data);
|
||||
cpu_eoi_irq(irq);
|
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cpu_eoi_irq(d);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
static int iosapic_set_affinity_irq(unsigned int irq,
|
||||
const struct cpumask *dest)
|
||||
static int iosapic_set_affinity_irq(struct irq_data *d,
|
||||
const struct cpumask *dest, bool force)
|
||||
{
|
||||
struct vector_info *vi = get_irq_chip_data(irq);
|
||||
struct vector_info *vi = irq_data_get_irq_chip_data(d);
|
||||
u32 d0, d1, dummy_d0;
|
||||
unsigned long flags;
|
||||
int dest_cpu;
|
||||
|
||||
dest_cpu = cpu_check_affinity(irq, dest);
|
||||
dest_cpu = cpu_check_affinity(d, dest);
|
||||
if (dest_cpu < 0)
|
||||
return -1;
|
||||
|
||||
cpumask_copy(irq_desc[irq].affinity, cpumask_of(dest_cpu));
|
||||
vi->txn_addr = txn_affinity_addr(irq, dest_cpu);
|
||||
cpumask_copy(d->affinity, cpumask_of(dest_cpu));
|
||||
vi->txn_addr = txn_affinity_addr(d->irq, dest_cpu);
|
||||
|
||||
spin_lock_irqsave(&iosapic_lock, flags);
|
||||
/* d1 contains the destination CPU, so only want to set that
|
||||
|
|
@ -708,13 +708,13 @@ static int iosapic_set_affinity_irq(unsigned int irq,
|
|||
#endif
|
||||
|
||||
static struct irq_chip iosapic_interrupt_type = {
|
||||
.name = "IO-SAPIC-level",
|
||||
.unmask = iosapic_unmask_irq,
|
||||
.mask = iosapic_mask_irq,
|
||||
.ack = cpu_ack_irq,
|
||||
.eoi = iosapic_eoi_irq,
|
||||
.name = "IO-SAPIC-level",
|
||||
.irq_unmask = iosapic_unmask_irq,
|
||||
.irq_mask = iosapic_mask_irq,
|
||||
.irq_ack = cpu_ack_irq,
|
||||
.irq_eoi = iosapic_eoi_irq,
|
||||
#ifdef CONFIG_SMP
|
||||
.set_affinity = iosapic_set_affinity_irq,
|
||||
.irq_set_affinity = iosapic_set_affinity_irq,
|
||||
#endif
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -286,8 +286,9 @@ superio_init(struct pci_dev *pcidev)
|
|||
}
|
||||
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO, superio_init);
|
||||
|
||||
static void superio_mask_irq(unsigned int irq)
|
||||
static void superio_mask_irq(struct irq_data *d)
|
||||
{
|
||||
unsigned int irq = d->irq;
|
||||
u8 r8;
|
||||
|
||||
if ((irq < 1) || (irq == 2) || (irq > 7)) {
|
||||
|
|
@ -303,8 +304,9 @@ static void superio_mask_irq(unsigned int irq)
|
|||
outb (r8,IC_PIC1+1);
|
||||
}
|
||||
|
||||
static void superio_unmask_irq(unsigned int irq)
|
||||
static void superio_unmask_irq(struct irq_data *d)
|
||||
{
|
||||
unsigned int irq = d->irq;
|
||||
u8 r8;
|
||||
|
||||
if ((irq < 1) || (irq == 2) || (irq > 7)) {
|
||||
|
|
@ -320,9 +322,9 @@ static void superio_unmask_irq(unsigned int irq)
|
|||
}
|
||||
|
||||
static struct irq_chip superio_interrupt_type = {
|
||||
.name = SUPERIO,
|
||||
.unmask = superio_unmask_irq,
|
||||
.mask = superio_mask_irq,
|
||||
.name = SUPERIO,
|
||||
.irq_unmask = superio_unmask_irq,
|
||||
.irq_mask = superio_mask_irq,
|
||||
};
|
||||
|
||||
#ifdef DEBUG_SUPERIO_INIT
|
||||
|
|
|
|||
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Ссылка в новой задаче