Merge remote-tracking branches 'asoc/fix/arizona', 'asoc/fix/dpcm', 'asoc/fix/dwc', 'asoc/fix/fsl-ssi' and 'asoc/fix/hdmi-codec' into asoc-linus
This commit is contained in:
Коммит
1c681a1921
|
@ -36,10 +36,10 @@ struct hdmi_codec_daifmt {
|
|||
HDMI_AC97,
|
||||
HDMI_SPDIF,
|
||||
} fmt;
|
||||
int bit_clk_inv:1;
|
||||
int frame_clk_inv:1;
|
||||
int bit_clk_master:1;
|
||||
int frame_clk_master:1;
|
||||
unsigned int bit_clk_inv:1;
|
||||
unsigned int frame_clk_inv:1;
|
||||
unsigned int bit_clk_master:1;
|
||||
unsigned int frame_clk_master:1;
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
|
@ -1551,7 +1551,7 @@ static int wm_adsp_load(struct wm_adsp *dsp)
|
|||
const struct wmfw_region *region;
|
||||
const struct wm_adsp_region *mem;
|
||||
const char *region_name;
|
||||
char *file, *text;
|
||||
char *file, *text = NULL;
|
||||
struct wm_adsp_buf *buf;
|
||||
unsigned int reg;
|
||||
int regions = 0;
|
||||
|
@ -1700,10 +1700,21 @@ static int wm_adsp_load(struct wm_adsp *dsp)
|
|||
regions, le32_to_cpu(region->len), offset,
|
||||
region_name);
|
||||
|
||||
if ((pos + le32_to_cpu(region->len) + sizeof(*region)) >
|
||||
firmware->size) {
|
||||
adsp_err(dsp,
|
||||
"%s.%d: %s region len %d bytes exceeds file length %zu\n",
|
||||
file, regions, region_name,
|
||||
le32_to_cpu(region->len), firmware->size);
|
||||
ret = -EINVAL;
|
||||
goto out_fw;
|
||||
}
|
||||
|
||||
if (text) {
|
||||
memcpy(text, region->data, le32_to_cpu(region->len));
|
||||
adsp_info(dsp, "%s: %s\n", file, text);
|
||||
kfree(text);
|
||||
text = NULL;
|
||||
}
|
||||
|
||||
if (reg) {
|
||||
|
@ -1748,6 +1759,7 @@ out_fw:
|
|||
regmap_async_complete(regmap);
|
||||
wm_adsp_buf_free(&buf_list);
|
||||
release_firmware(firmware);
|
||||
kfree(text);
|
||||
out:
|
||||
kfree(file);
|
||||
|
||||
|
@ -2233,6 +2245,17 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp)
|
|||
}
|
||||
|
||||
if (reg) {
|
||||
if ((pos + le32_to_cpu(blk->len) + sizeof(*blk)) >
|
||||
firmware->size) {
|
||||
adsp_err(dsp,
|
||||
"%s.%d: %s region len %d bytes exceeds file length %zu\n",
|
||||
file, blocks, region_name,
|
||||
le32_to_cpu(blk->len),
|
||||
firmware->size);
|
||||
ret = -EINVAL;
|
||||
goto out_fw;
|
||||
}
|
||||
|
||||
buf = wm_adsp_buf_alloc(blk->data,
|
||||
le32_to_cpu(blk->len),
|
||||
&buf_list);
|
||||
|
|
|
@ -681,22 +681,19 @@ static int dw_i2s_probe(struct platform_device *pdev)
|
|||
}
|
||||
|
||||
if (!pdata) {
|
||||
ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
|
||||
if (ret == -EPROBE_DEFER) {
|
||||
dev_err(&pdev->dev,
|
||||
"failed to register PCM, deferring probe\n");
|
||||
return ret;
|
||||
} else if (ret) {
|
||||
dev_err(&pdev->dev,
|
||||
"Could not register DMA PCM: %d\n"
|
||||
"falling back to PIO mode\n", ret);
|
||||
if (irq >= 0) {
|
||||
ret = dw_pcm_register(pdev);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev,
|
||||
"Could not register PIO PCM: %d\n",
|
||||
dev->use_pio = true;
|
||||
} else {
|
||||
ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL,
|
||||
0);
|
||||
dev->use_pio = false;
|
||||
}
|
||||
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "could not register pcm: %d\n",
|
||||
ret);
|
||||
goto err_clk_disable;
|
||||
}
|
||||
goto err_clk_disable;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -224,6 +224,12 @@ struct fsl_ssi_soc_data {
|
|||
* @dbg_stats: Debugging statistics
|
||||
*
|
||||
* @soc: SoC specific data
|
||||
*
|
||||
* @fifo_watermark: the FIFO watermark setting. Notifies DMA when
|
||||
* there are @fifo_watermark or fewer words in TX fifo or
|
||||
* @fifo_watermark or more empty words in RX fifo.
|
||||
* @dma_maxburst: max number of words to transfer in one go. So far,
|
||||
* this is always the same as fifo_watermark.
|
||||
*/
|
||||
struct fsl_ssi_private {
|
||||
struct regmap *regs;
|
||||
|
@ -263,6 +269,9 @@ struct fsl_ssi_private {
|
|||
|
||||
const struct fsl_ssi_soc_data *soc;
|
||||
struct device *dev;
|
||||
|
||||
u32 fifo_watermark;
|
||||
u32 dma_maxburst;
|
||||
};
|
||||
|
||||
/*
|
||||
|
@ -1051,21 +1060,7 @@ static int _fsl_ssi_set_dai_fmt(struct device *dev,
|
|||
regmap_write(regs, CCSR_SSI_SRCR, srcr);
|
||||
regmap_write(regs, CCSR_SSI_SCR, scr);
|
||||
|
||||
/*
|
||||
* Set the watermark for transmit FIFI 0 and receive FIFO 0. We don't
|
||||
* use FIFO 1. We program the transmit water to signal a DMA transfer
|
||||
* if there are only two (or fewer) elements left in the FIFO. Two
|
||||
* elements equals one frame (left channel, right channel). This value,
|
||||
* however, depends on the depth of the transmit buffer.
|
||||
*
|
||||
* We set the watermark on the same level as the DMA burstsize. For
|
||||
* fiq it is probably better to use the biggest possible watermark
|
||||
* size.
|
||||
*/
|
||||
if (ssi_private->use_dma)
|
||||
wm = ssi_private->fifo_depth - 2;
|
||||
else
|
||||
wm = ssi_private->fifo_depth;
|
||||
wm = ssi_private->fifo_watermark;
|
||||
|
||||
regmap_write(regs, CCSR_SSI_SFCSR,
|
||||
CCSR_SSI_SFCSR_TFWM0(wm) | CCSR_SSI_SFCSR_RFWM0(wm) |
|
||||
|
@ -1373,12 +1368,8 @@ static int fsl_ssi_imx_probe(struct platform_device *pdev,
|
|||
dev_dbg(&pdev->dev, "could not get baud clock: %ld\n",
|
||||
PTR_ERR(ssi_private->baudclk));
|
||||
|
||||
/*
|
||||
* We have burstsize be "fifo_depth - 2" to match the SSI
|
||||
* watermark setting in fsl_ssi_startup().
|
||||
*/
|
||||
ssi_private->dma_params_tx.maxburst = ssi_private->fifo_depth - 2;
|
||||
ssi_private->dma_params_rx.maxburst = ssi_private->fifo_depth - 2;
|
||||
ssi_private->dma_params_tx.maxburst = ssi_private->dma_maxburst;
|
||||
ssi_private->dma_params_rx.maxburst = ssi_private->dma_maxburst;
|
||||
ssi_private->dma_params_tx.addr = ssi_private->ssi_phys + CCSR_SSI_STX0;
|
||||
ssi_private->dma_params_rx.addr = ssi_private->ssi_phys + CCSR_SSI_SRX0;
|
||||
|
||||
|
@ -1543,6 +1534,47 @@ static int fsl_ssi_probe(struct platform_device *pdev)
|
|||
/* Older 8610 DTs didn't have the fifo-depth property */
|
||||
ssi_private->fifo_depth = 8;
|
||||
|
||||
/*
|
||||
* Set the watermark for transmit FIFO 0 and receive FIFO 0. We don't
|
||||
* use FIFO 1 but set the watermark appropriately nontheless.
|
||||
* We program the transmit water to signal a DMA transfer
|
||||
* if there are N elements left in the FIFO. For chips with 15-deep
|
||||
* FIFOs, set watermark to 8. This allows the SSI to operate at a
|
||||
* high data rate without channel slipping. Behavior is unchanged
|
||||
* for the older chips with a fifo depth of only 8. A value of 4
|
||||
* might be appropriate for the older chips, but is left at
|
||||
* fifo_depth-2 until sombody has a chance to test.
|
||||
*
|
||||
* We set the watermark on the same level as the DMA burstsize. For
|
||||
* fiq it is probably better to use the biggest possible watermark
|
||||
* size.
|
||||
*/
|
||||
switch (ssi_private->fifo_depth) {
|
||||
case 15:
|
||||
/*
|
||||
* 2 samples is not enough when running at high data
|
||||
* rates (like 48kHz @ 16 bits/channel, 16 channels)
|
||||
* 8 seems to split things evenly and leave enough time
|
||||
* for the DMA to fill the FIFO before it's over/under
|
||||
* run.
|
||||
*/
|
||||
ssi_private->fifo_watermark = 8;
|
||||
ssi_private->dma_maxburst = 8;
|
||||
break;
|
||||
case 8:
|
||||
default:
|
||||
/*
|
||||
* maintain old behavior for older chips.
|
||||
* Keeping it the same because I don't have an older
|
||||
* board to test with.
|
||||
* I suspect this could be changed to be something to
|
||||
* leave some more space in the fifo.
|
||||
*/
|
||||
ssi_private->fifo_watermark = ssi_private->fifo_depth - 2;
|
||||
ssi_private->dma_maxburst = ssi_private->fifo_depth - 2;
|
||||
break;
|
||||
}
|
||||
|
||||
dev_set_drvdata(&pdev->dev, ssi_private);
|
||||
|
||||
if (ssi_private->soc->imx) {
|
||||
|
|
|
@ -2184,9 +2184,11 @@ static int dpcm_fe_dai_do_trigger(struct snd_pcm_substream *substream, int cmd)
|
|||
break;
|
||||
case SNDRV_PCM_TRIGGER_STOP:
|
||||
case SNDRV_PCM_TRIGGER_SUSPEND:
|
||||
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
|
||||
fe->dpcm[stream].state = SND_SOC_DPCM_STATE_STOP;
|
||||
break;
|
||||
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
|
||||
fe->dpcm[stream].state = SND_SOC_DPCM_STATE_PAUSED;
|
||||
break;
|
||||
}
|
||||
|
||||
out:
|
||||
|
|
Загрузка…
Ссылка в новой задаче