Xtensa updates for v6.2
- fix kernel build with gcc-13 - various minor fixes -----BEGIN PGP SIGNATURE----- iQJHBAABCgAxFiEEK2eFS5jlMn3N6xfYUfnMkfg/oEQFAmOYnzsTHGpjbXZia2Jj QGdtYWlsLmNvbQAKCRBR+cyR+D+gRKoPD/4iKR+jfW6FJhPydpqDOz9OvSqo8Nz6 miw6O83e7z2vD9AEDyPwTpd6zMqwZwCgFttkTkraivEmYyNyp+c7cNHkwgJo7IEZ jTCctvSM1kLBVbblyKr+Nu/ENrSv3WFCJj8kaBdlRj1lbZm3TNRUqos1oNW1gTf7 QFjHZcOE3qTMzBNhrOl4dyCYlJJQCQPXYUUhFZ9wTPf5LfAFlJJdrqgQU/70I7J2 lVzlXsLeD8WarApSt6QvlESx6nVPlahTCS2LOWvKV2fo7+VPGDCzNUPv6mWIlYbI id3o0geu9avpv4OIKRoC5BKTnXgaAdNoFp6u9De6X64SZ8Coa59QkDnsVlsVYlyQ ExlgBVElIZ+Z4/Z6NmqgBaNmHM30kmUfBxvp0Xcn6JGWfu2dvKCT1O2YDDYCHoTS jUvec01Tnru3fTbLzyNo+59m+n7h9nOJiK4WwvJV0ac2+mHj/qOFHcSVN0HAuTEW 8wm3Wvog0x3DrXJTxOGBMCRNV1uwx6CvWuMOqh/LM7jmLJmLAu31uanhiij8a1Nt Czxnt9mte1lZhgmCXWO1vUUcbOshTglQY+KsuvGH9bJVqqI+Twe7v/nNqDl0NHAt TGWGpxD9rKD5S91jQZGy9stelStWImAbx3bxOyifYBISQU3bfkUzfOby6Dj1HECl wx9KaG9Ru8bKKw== =qcsK -----END PGP SIGNATURE----- Merge tag 'xtensa-20221213' of https://github.com/jcmvbkbc/linux-xtensa Pull Xtensa updates from Max Filippov: - fix kernel build with gcc-13 - various minor fixes * tag 'xtensa-20221213' of https://github.com/jcmvbkbc/linux-xtensa: xtensa: add __umulsidi3 helper xtensa: update config files MAINTAINERS: update the 'T:' entry for xtensa
This commit is contained in:
Коммит
1ca06f1c1a
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@ -20478,7 +20478,7 @@ M: Chris Zankel <chris@zankel.net>
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M: Max Filippov <jcmvbkbc@gmail.com>
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L: linux-xtensa@linux-xtensa.org
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S: Maintained
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T: git git://github.com/czankel/xtensa-linux.git
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T: git https://github.com/jcmvbkbc/linux-xtensa.git
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F: arch/xtensa/
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F: drivers/irqchip/irq-xtensa-*
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@ -125,7 +125,6 @@ CONFIG_MAGIC_SYSRQ=y
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CONFIG_LOCKUP_DETECTOR=y
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# CONFIG_SCHED_DEBUG is not set
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CONFIG_SCHEDSTATS=y
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CONFIG_TIMER_STATS=y
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CONFIG_DEBUG_RT_MUTEXES=y
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CONFIG_DEBUG_SPINLOCK=y
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CONFIG_DEBUG_MUTEXES=y
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@ -48,9 +48,6 @@ CONFIG_IP_PNP=y
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CONFIG_IP_PNP_DHCP=y
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CONFIG_IP_PNP_BOOTP=y
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CONFIG_IP_PNP_RARP=y
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# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
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# CONFIG_INET_XFRM_MODE_TUNNEL is not set
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# CONFIG_INET_XFRM_MODE_BEET is not set
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# CONFIG_INET_DIAG is not set
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# CONFIG_IPV6 is not set
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# CONFIG_WIRELESS is not set
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@ -105,7 +102,6 @@ CONFIG_MAGIC_SYSRQ=y
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CONFIG_LOCKUP_DETECTOR=y
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# CONFIG_SCHED_DEBUG is not set
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CONFIG_SCHEDSTATS=y
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CONFIG_TIMER_STATS=y
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CONFIG_DEBUG_RT_MUTEXES=y
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CONFIG_PROVE_LOCKING=y
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CONFIG_DEBUG_ATOMIC_SLEEP=y
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@ -112,7 +112,6 @@ CONFIG_MAGIC_SYSRQ=y
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CONFIG_LOCKUP_DETECTOR=y
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# CONFIG_SCHED_DEBUG is not set
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CONFIG_SCHEDSTATS=y
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CONFIG_TIMER_STATS=y
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CONFIG_DEBUG_RT_MUTEXES=y
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CONFIG_DEBUG_SPINLOCK=y
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CONFIG_DEBUG_MUTEXES=y
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@ -113,7 +113,6 @@ CONFIG_DEBUG_NOMMU_REGIONS=y
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CONFIG_DEBUG_SHIRQ=y
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CONFIG_LOCKUP_DETECTOR=y
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CONFIG_SCHEDSTATS=y
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CONFIG_TIMER_STATS=y
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CONFIG_DEBUG_RT_MUTEXES=y
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CONFIG_DEBUG_SPINLOCK=y
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CONFIG_DEBUG_MUTEXES=y
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@ -116,7 +116,6 @@ CONFIG_MAGIC_SYSRQ=y
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CONFIG_DEBUG_VM=y
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CONFIG_LOCKUP_DETECTOR=y
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CONFIG_SCHEDSTATS=y
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CONFIG_TIMER_STATS=y
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CONFIG_DEBUG_RT_MUTEXES=y
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CONFIG_DEBUG_SPINLOCK=y
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CONFIG_DEBUG_MUTEXES=y
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@ -55,7 +55,6 @@ CONFIG_SCSI=y
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CONFIG_BLK_DEV_SD=y
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CONFIG_NETDEVICES=y
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# CONFIG_NET_VENDOR_ARC is not set
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# CONFIG_NET_VENDOR_AURORA is not set
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# CONFIG_NET_VENDOR_BROADCOM is not set
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# CONFIG_NET_VENDOR_INTEL is not set
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# CONFIG_NET_VENDOR_MARVELL is not set
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@ -62,6 +62,7 @@ extern int __modsi3(int, int);
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extern int __mulsi3(int, int);
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extern unsigned int __udivsi3(unsigned int, unsigned int);
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extern unsigned int __umodsi3(unsigned int, unsigned int);
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extern unsigned long long __umulsidi3(unsigned int, unsigned int);
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EXPORT_SYMBOL(__ashldi3);
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EXPORT_SYMBOL(__ashrdi3);
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@ -71,6 +72,7 @@ EXPORT_SYMBOL(__modsi3);
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EXPORT_SYMBOL(__mulsi3);
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EXPORT_SYMBOL(__udivsi3);
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EXPORT_SYMBOL(__umodsi3);
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EXPORT_SYMBOL(__umulsidi3);
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unsigned int __sync_fetch_and_and_4(volatile void *p, unsigned int v)
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{
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@ -5,7 +5,7 @@
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lib-y += memcopy.o memset.o checksum.o \
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ashldi3.o ashrdi3.o lshrdi3.o \
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divsi3.o udivsi3.o modsi3.o umodsi3.o mulsi3.o \
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divsi3.o udivsi3.o modsi3.o umodsi3.o mulsi3.o umulsidi3.o \
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usercopy.o strncpy_user.o strnlen_user.o
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lib-$(CONFIG_PCI) += pci-auto.o
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lib-$(CONFIG_KCSAN) += kcsan-stubs.o
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@ -0,0 +1,230 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later WITH GCC-exception-2.0 */
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#include <linux/linkage.h>
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#include <asm/asmmacro.h>
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#include <asm/core.h>
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#if !XCHAL_HAVE_MUL16 && !XCHAL_HAVE_MUL32 && !XCHAL_HAVE_MAC16
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#define XCHAL_NO_MUL 1
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#endif
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ENTRY(__umulsidi3)
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#ifdef __XTENSA_CALL0_ABI__
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abi_entry(32)
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s32i a12, sp, 16
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s32i a13, sp, 20
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s32i a14, sp, 24
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s32i a15, sp, 28
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#elif XCHAL_NO_MUL
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/* This is not really a leaf function; allocate enough stack space
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to allow CALL12s to a helper function. */
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abi_entry(32)
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#else
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abi_entry_default
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#endif
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#ifdef __XTENSA_EB__
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#define wh a2
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#define wl a3
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#else
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#define wh a3
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#define wl a2
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#endif /* __XTENSA_EB__ */
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/* This code is taken from the mulsf3 routine in ieee754-sf.S.
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See more comments there. */
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#if XCHAL_HAVE_MUL32_HIGH
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mull a6, a2, a3
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muluh wh, a2, a3
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mov wl, a6
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#else /* ! MUL32_HIGH */
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#if defined(__XTENSA_CALL0_ABI__) && XCHAL_NO_MUL
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/* a0 and a8 will be clobbered by calling the multiply function
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but a8 is not used here and need not be saved. */
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s32i a0, sp, 0
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#endif
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#if XCHAL_HAVE_MUL16 || XCHAL_HAVE_MUL32
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#define a2h a4
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#define a3h a5
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/* Get the high halves of the inputs into registers. */
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srli a2h, a2, 16
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srli a3h, a3, 16
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#define a2l a2
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#define a3l a3
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#if XCHAL_HAVE_MUL32 && !XCHAL_HAVE_MUL16
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/* Clear the high halves of the inputs. This does not matter
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for MUL16 because the high bits are ignored. */
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extui a2, a2, 0, 16
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extui a3, a3, 0, 16
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#endif
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#endif /* MUL16 || MUL32 */
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#if XCHAL_HAVE_MUL16
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#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
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mul16u dst, xreg ## xhalf, yreg ## yhalf
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#elif XCHAL_HAVE_MUL32
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#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
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mull dst, xreg ## xhalf, yreg ## yhalf
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#elif XCHAL_HAVE_MAC16
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/* The preprocessor insists on inserting a space when concatenating after
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a period in the definition of do_mul below. These macros are a workaround
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using underscores instead of periods when doing the concatenation. */
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#define umul_aa_ll umul.aa.ll
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#define umul_aa_lh umul.aa.lh
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#define umul_aa_hl umul.aa.hl
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#define umul_aa_hh umul.aa.hh
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#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
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umul_aa_ ## xhalf ## yhalf xreg, yreg; \
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rsr dst, ACCLO
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#else /* no multiply hardware */
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#define set_arg_l(dst, src) \
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extui dst, src, 0, 16
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#define set_arg_h(dst, src) \
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srli dst, src, 16
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#ifdef __XTENSA_CALL0_ABI__
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#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
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set_arg_ ## xhalf (a13, xreg); \
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set_arg_ ## yhalf (a14, yreg); \
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call0 .Lmul_mulsi3; \
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mov dst, a12
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#else
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#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
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set_arg_ ## xhalf (a14, xreg); \
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set_arg_ ## yhalf (a15, yreg); \
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call12 .Lmul_mulsi3; \
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mov dst, a14
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#endif /* __XTENSA_CALL0_ABI__ */
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#endif /* no multiply hardware */
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/* Add pp1 and pp2 into a6 with carry-out in a9. */
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do_mul(a6, a2, l, a3, h) /* pp 1 */
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do_mul(a11, a2, h, a3, l) /* pp 2 */
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movi a9, 0
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add a6, a6, a11
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bgeu a6, a11, 1f
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addi a9, a9, 1
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1:
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/* Shift the high half of a9/a6 into position in a9. Note that
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this value can be safely incremented without any carry-outs. */
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ssai 16
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src a9, a9, a6
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/* Compute the low word into a6. */
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do_mul(a11, a2, l, a3, l) /* pp 0 */
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sll a6, a6
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add a6, a6, a11
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bgeu a6, a11, 1f
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addi a9, a9, 1
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1:
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/* Compute the high word into wh. */
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do_mul(wh, a2, h, a3, h) /* pp 3 */
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add wh, wh, a9
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mov wl, a6
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#endif /* !MUL32_HIGH */
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#if defined(__XTENSA_CALL0_ABI__) && XCHAL_NO_MUL
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/* Restore the original return address. */
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l32i a0, sp, 0
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#endif
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#ifdef __XTENSA_CALL0_ABI__
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l32i a12, sp, 16
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l32i a13, sp, 20
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l32i a14, sp, 24
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l32i a15, sp, 28
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abi_ret(32)
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#else
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abi_ret_default
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#endif
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#if XCHAL_NO_MUL
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.macro do_addx2 dst, as, at, tmp
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#if XCHAL_HAVE_ADDX
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addx2 \dst, \as, \at
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#else
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slli \tmp, \as, 1
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add \dst, \tmp, \at
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#endif
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.endm
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.macro do_addx4 dst, as, at, tmp
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#if XCHAL_HAVE_ADDX
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addx4 \dst, \as, \at
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#else
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slli \tmp, \as, 2
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add \dst, \tmp, \at
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#endif
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.endm
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.macro do_addx8 dst, as, at, tmp
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#if XCHAL_HAVE_ADDX
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addx8 \dst, \as, \at
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#else
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slli \tmp, \as, 3
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add \dst, \tmp, \at
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#endif
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.endm
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/* For Xtensa processors with no multiply hardware, this simplified
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version of _mulsi3 is used for multiplying 16-bit chunks of
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the floating-point mantissas. When using CALL0, this function
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uses a custom ABI: the inputs are passed in a13 and a14, the
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result is returned in a12, and a8 and a15 are clobbered. */
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.align 4
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.Lmul_mulsi3:
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abi_entry_default
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.macro mul_mulsi3_body dst, src1, src2, tmp1, tmp2
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movi \dst, 0
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1: add \tmp1, \src2, \dst
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extui \tmp2, \src1, 0, 1
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movnez \dst, \tmp1, \tmp2
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do_addx2 \tmp1, \src2, \dst, \tmp1
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extui \tmp2, \src1, 1, 1
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movnez \dst, \tmp1, \tmp2
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do_addx4 \tmp1, \src2, \dst, \tmp1
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extui \tmp2, \src1, 2, 1
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movnez \dst, \tmp1, \tmp2
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do_addx8 \tmp1, \src2, \dst, \tmp1
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extui \tmp2, \src1, 3, 1
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movnez \dst, \tmp1, \tmp2
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srli \src1, \src1, 4
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slli \src2, \src2, 4
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bnez \src1, 1b
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.endm
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#ifdef __XTENSA_CALL0_ABI__
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mul_mulsi3_body a12, a13, a14, a15, a8
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#else
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/* The result will be written into a2, so save that argument in a4. */
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mov a4, a2
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mul_mulsi3_body a2, a4, a3, a5, a6
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#endif
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abi_ret_default
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#endif /* XCHAL_NO_MUL */
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ENDPROC(__umulsidi3)
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