drm/gma500: remove trailing whitespaces
Remove trailing whitespaces. No functional change. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20210419081807.68000-2-krzysztof.kozlowski@canonical.com
This commit is contained in:
Krzysztof Kozlowski
Daniel Vetter
Родитель
866604bbfc
Коммит
1ce1af8454
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@ -42,7 +42,7 @@ void gma_backlight_disable(struct drm_device *dev)
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dev_priv->backlight_device->props.brightness = 0;
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do_gma_backlight_set(dev);
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}
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#endif
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#endif
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}
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void gma_backlight_set(struct drm_device *dev, int v)
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@ -54,7 +54,7 @@ void gma_backlight_set(struct drm_device *dev, int v)
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dev_priv->backlight_device->props.brightness = v;
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do_gma_backlight_set(dev);
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}
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#endif
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#endif
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}
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int gma_backlight_init(struct drm_device *dev)
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@ -245,7 +245,7 @@ i2c_dp_aux_add_bus(struct i2c_adapter *adapter)
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if (W && !in_dbg_master()) msleep(W); \
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} \
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ret__; \
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})
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})
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#define wait_for(COND, MS) _wait_for(COND, MS, 1)
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@ -386,7 +386,7 @@ static void cdv_intel_edp_panel_vdd_on(struct gma_encoder *intel_encoder)
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if (intel_dp->panel_on) {
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DRM_DEBUG_KMS("Skip VDD on because of panel on\n");
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return;
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}
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}
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DRM_DEBUG_KMS("\n");
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pp = REG_READ(PP_CONTROL);
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@ -433,7 +433,7 @@ static bool cdv_intel_edp_panel_on(struct gma_encoder *intel_encoder)
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DRM_DEBUG_KMS("Error in Powering up eDP panel, status %x\n", REG_READ(PP_STATUS));
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intel_dp->panel_on = false;
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} else
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intel_dp->panel_on = true;
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intel_dp->panel_on = true;
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msleep(intel_dp->panel_power_up_delay);
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return false;
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@ -449,7 +449,7 @@ static void cdv_intel_edp_panel_off (struct gma_encoder *intel_encoder)
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pp = REG_READ(PP_CONTROL);
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if ((pp & POWER_TARGET_ON) == 0)
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if ((pp & POWER_TARGET_ON) == 0)
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return;
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intel_dp->panel_on = false;
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@ -464,7 +464,7 @@ static void cdv_intel_edp_panel_off (struct gma_encoder *intel_encoder)
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DRM_DEBUG_KMS("PP_STATUS %x\n", REG_READ(PP_STATUS));
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if (wait_for((REG_READ(PP_STATUS) & idle_off_mask) == 0, 1000)) {
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DRM_DEBUG_KMS("Error in turning off Panel\n");
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DRM_DEBUG_KMS("Error in turning off Panel\n");
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}
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msleep(intel_dp->panel_power_cycle_delay);
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@ -535,7 +535,7 @@ cdv_intel_dp_mode_valid(struct drm_connector *connector,
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if (cdv_intel_dp_link_required(mode->clock, 24)
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> cdv_intel_dp_max_data_rate(max_link_clock, max_lanes))
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return MODE_CLOCK_HIGH;
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}
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if (mode->clock < 10000)
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return MODE_CLOCK_LOW;
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@ -606,7 +606,7 @@ cdv_intel_dp_aux_ch(struct gma_encoder *encoder,
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for (i = 0; i < send_bytes; i += 4)
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REG_WRITE(ch_data + i,
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pack_aux(send + i, send_bytes - i));
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/* Send the command and wait for it to complete */
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REG_WRITE(ch_ctl,
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DP_AUX_CH_CTL_SEND_BUSY |
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@ -623,7 +623,7 @@ cdv_intel_dp_aux_ch(struct gma_encoder *encoder,
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break;
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udelay(100);
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}
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/* Clear done status and any errors */
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REG_WRITE(ch_ctl,
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status |
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@ -659,7 +659,7 @@ cdv_intel_dp_aux_ch(struct gma_encoder *encoder,
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DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT);
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if (recv_bytes > recv_size)
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recv_bytes = recv_size;
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for (i = 0; i < recv_bytes; i += 4)
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unpack_aux(REG_READ(ch_data + i),
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recv + i, recv_bytes - i);
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@ -870,7 +870,7 @@ cdv_intel_dp_i2c_init(struct gma_connector *connector,
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ret = i2c_dp_aux_add_bus(&intel_dp->adapter);
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if (is_edp(encoder))
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cdv_intel_edp_panel_vdd_off(encoder);
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return ret;
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}
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@ -1291,13 +1291,13 @@ cdv_intel_get_adjust_train(struct gma_encoder *encoder)
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if (this_p > p)
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p = this_p;
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}
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if (v >= CDV_DP_VOLTAGE_MAX)
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v = CDV_DP_VOLTAGE_MAX | DP_TRAIN_MAX_SWING_REACHED;
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if (p == DP_TRAIN_PRE_EMPHASIS_MASK)
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p |= DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
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for (lane = 0; lane < 4; lane++)
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intel_dp->train_set[lane] = v | p;
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}
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@ -1358,7 +1358,6 @@ cdv_intel_dp_set_link_train(struct gma_encoder *encoder,
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uint32_t dp_reg_value,
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uint8_t dp_train_pat)
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{
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struct drm_device *dev = encoder->base.dev;
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int ret;
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struct cdv_intel_dp *intel_dp = encoder->dev_priv;
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@ -1384,7 +1383,6 @@ static bool
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cdv_intel_dplink_set_level(struct gma_encoder *encoder,
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uint8_t dp_train_pat)
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{
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int ret;
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struct cdv_intel_dp *intel_dp = encoder->dev_priv;
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@ -1462,7 +1460,7 @@ cdv_intel_dp_set_vswing_premph(struct gma_encoder *encoder, uint8_t signal_level
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/* ;gfx_dpio_set_reg(0x8124, 0x00004000) */
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index = 2 * premph + 1;
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cdv_sb_write(dev, ddi_reg->PreEmph2, dp_vswing_premph_table[index]);
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return;
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return;
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}
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@ -1481,8 +1479,8 @@ cdv_intel_dp_start_link_train(struct gma_encoder *encoder)
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DP |= DP_PORT_EN;
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DP &= ~DP_LINK_TRAIN_MASK;
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reg = DP;
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reg = DP;
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reg |= DP_LINK_TRAIN_PAT_1;
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/* Enable output, wait for it to become active */
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REG_WRITE(intel_dp->output_reg, reg);
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@ -1556,7 +1554,7 @@ cdv_intel_dp_start_link_train(struct gma_encoder *encoder)
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if (!clock_recovery) {
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DRM_DEBUG_KMS("failure in DP patter 1 training, train set %x\n", intel_dp->train_set[0]);
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}
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intel_dp->DP = DP;
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}
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@ -1747,7 +1745,7 @@ static int cdv_intel_dp_get_modes(struct drm_connector *connector)
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if (is_edp(intel_encoder)) {
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struct drm_device *dev = connector->dev;
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struct drm_psb_private *dev_priv = dev->dev_private;
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cdv_intel_edp_panel_vdd_off(intel_encoder);
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if (ret) {
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if (edp && !intel_dp->panel_fixed_mode) {
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@ -1942,11 +1940,11 @@ static void cdv_disable_intel_clock_gating(struct drm_device *dev)
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DPCUNIT_CLOCK_GATE_DISABLE |
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DPLSUNIT_CLOCK_GATE_DISABLE |
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DPOUNIT_CLOCK_GATE_DISABLE |
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DPIOUNIT_CLOCK_GATE_DISABLE);
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DPIOUNIT_CLOCK_GATE_DISABLE);
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REG_WRITE(DSPCLK_GATE_D, reg_value);
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udelay(500);
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udelay(500);
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}
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void
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@ -1990,7 +1988,7 @@ cdv_intel_dp_init(struct drm_device *dev, struct psb_intel_mode_device *mode_dev
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gma_encoder->dev_priv=intel_dp;
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intel_dp->encoder = gma_encoder;
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intel_dp->output_reg = output_reg;
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drm_encoder_helper_add(encoder, &cdv_intel_dp_helper_funcs);
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drm_connector_helper_add(connector, &cdv_intel_dp_connector_helper_funcs);
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@ -2027,7 +2025,7 @@ cdv_intel_dp_init(struct drm_device *dev, struct psb_intel_mode_device *mode_dev
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pp_on = REG_READ(PP_CONTROL);
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pp_on &= ~PANEL_UNLOCK_MASK;
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pp_on |= PANEL_UNLOCK_REGS;
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REG_WRITE(PP_CONTROL, pp_on);
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pwm_ctrl = REG_READ(BLC_PWM_CTL2);
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@ -2037,7 +2035,7 @@ cdv_intel_dp_init(struct drm_device *dev, struct psb_intel_mode_device *mode_dev
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pp_on = REG_READ(PP_ON_DELAYS);
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pp_off = REG_READ(PP_OFF_DELAYS);
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pp_div = REG_READ(PP_DIVISOR);
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/* Pull timing values out of registers */
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cur.t1_t3 = (pp_on & PANEL_POWER_UP_DELAY_MASK) >>
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PANEL_POWER_UP_DELAY_SHIFT;
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@ -2085,9 +2083,9 @@ cdv_intel_dp_init(struct drm_device *dev, struct psb_intel_mode_device *mode_dev
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goto err_connector;
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} else {
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DRM_DEBUG_KMS("DPCD: Rev=%x LN_Rate=%x LN_CNT=%x LN_DOWNSP=%x\n",
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intel_dp->dpcd[0], intel_dp->dpcd[1],
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intel_dp->dpcd[0], intel_dp->dpcd[1],
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intel_dp->dpcd[2], intel_dp->dpcd[3]);
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}
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/* The CDV reference driver moves pnale backlight setup into the displays that
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have a backlight: this is a good idea and one we should probably adopt, however
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