KVM: x86: do not go through ctxt->ops when emulating rsm
Now that RSM is implemented in a single emulator callback, there is no point in going through other callbacks for the sake of modifying processor state. Just invoke KVM's own internal functions directly, and remove the callbacks that were only used by em_rsm; the only substantial difference is in the handling of the segment registers and descriptor cache, which have to be parsed into a struct kvm_segment instead of a struct desc_struct. This also fixes a bug where emulator_set_segment was shifting the limit left by 12 if the G bit is set, but the limit had not been shifted right upon entry to SMM. The emulator context is still used to restore EIP and the general purpose registers. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com> Message-Id: <20220929172016.319443-5-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini
Родитель
f1554150d3
Коммит
1d0da94cda
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@ -116,16 +116,6 @@ struct x86_emulate_ops {
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unsigned int bytes,
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struct x86_exception *fault, bool system);
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/*
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* read_phys: Read bytes of standard (non-emulated/special) memory.
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* Used for descriptor reading.
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* @addr: [IN ] Physical address from which to read.
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* @val: [OUT] Value read from memory.
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* @bytes: [IN ] Number of bytes to read from memory.
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*/
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int (*read_phys)(struct x86_emulate_ctxt *ctxt, unsigned long addr,
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void *val, unsigned int bytes);
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/*
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* write_std: Write bytes of standard (non-emulated/special) memory.
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* Used for descriptor writing.
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@ -209,11 +199,8 @@ struct x86_emulate_ops {
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int (*cpl)(struct x86_emulate_ctxt *ctxt);
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void (*get_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong *dest);
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int (*set_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong value);
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u64 (*get_smbase)(struct x86_emulate_ctxt *ctxt);
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void (*set_smbase)(struct x86_emulate_ctxt *ctxt, u64 smbase);
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int (*set_msr_with_filter)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 data);
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int (*get_msr_with_filter)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata);
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int (*set_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 data);
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int (*get_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata);
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int (*check_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc);
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int (*read_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc, u64 *pdata);
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@ -271,71 +271,59 @@ void enter_smm(struct kvm_vcpu *vcpu)
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kvm_mmu_reset_context(vcpu);
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}
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static int emulator_has_longmode(struct x86_emulate_ctxt *ctxt)
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{
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#ifdef CONFIG_X86_64
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return ctxt->ops->guest_has_long_mode(ctxt);
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#else
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return false;
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#endif
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}
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static void rsm_set_desc_flags(struct desc_struct *desc, u32 flags)
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static void rsm_set_desc_flags(struct kvm_segment *desc, u32 flags)
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{
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desc->g = (flags >> 23) & 1;
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desc->d = (flags >> 22) & 1;
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desc->db = (flags >> 22) & 1;
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desc->l = (flags >> 21) & 1;
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desc->avl = (flags >> 20) & 1;
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desc->p = (flags >> 15) & 1;
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desc->present = (flags >> 15) & 1;
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desc->dpl = (flags >> 13) & 3;
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desc->s = (flags >> 12) & 1;
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desc->type = (flags >> 8) & 15;
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desc->unusable = !desc->present;
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desc->padding = 0;
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}
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static int rsm_load_seg_32(struct x86_emulate_ctxt *ctxt, const char *smstate,
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static int rsm_load_seg_32(struct kvm_vcpu *vcpu, const char *smstate,
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int n)
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{
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struct desc_struct desc;
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struct kvm_segment desc;
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int offset;
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u16 selector;
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selector = GET_SMSTATE(u32, smstate, 0x7fa8 + n * 4);
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if (n < 3)
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offset = 0x7f84 + n * 12;
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else
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offset = 0x7f2c + (n - 3) * 12;
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set_desc_base(&desc, GET_SMSTATE(u32, smstate, offset + 8));
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set_desc_limit(&desc, GET_SMSTATE(u32, smstate, offset + 4));
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desc.selector = GET_SMSTATE(u32, smstate, 0x7fa8 + n * 4);
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desc.base = GET_SMSTATE(u32, smstate, offset + 8);
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desc.limit = GET_SMSTATE(u32, smstate, offset + 4);
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rsm_set_desc_flags(&desc, GET_SMSTATE(u32, smstate, offset));
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ctxt->ops->set_segment(ctxt, selector, &desc, 0, n);
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kvm_set_segment(vcpu, &desc, n);
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return X86EMUL_CONTINUE;
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}
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#ifdef CONFIG_X86_64
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static int rsm_load_seg_64(struct x86_emulate_ctxt *ctxt, const char *smstate,
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static int rsm_load_seg_64(struct kvm_vcpu *vcpu, const char *smstate,
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int n)
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{
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struct desc_struct desc;
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struct kvm_segment desc;
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int offset;
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u16 selector;
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u32 base3;
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offset = 0x7e00 + n * 16;
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selector = GET_SMSTATE(u16, smstate, offset);
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desc.selector = GET_SMSTATE(u16, smstate, offset);
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rsm_set_desc_flags(&desc, GET_SMSTATE(u16, smstate, offset + 2) << 8);
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set_desc_limit(&desc, GET_SMSTATE(u32, smstate, offset + 4));
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set_desc_base(&desc, GET_SMSTATE(u32, smstate, offset + 8));
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base3 = GET_SMSTATE(u32, smstate, offset + 12);
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ctxt->ops->set_segment(ctxt, selector, &desc, base3, n);
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desc.limit = GET_SMSTATE(u32, smstate, offset + 4);
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desc.base = GET_SMSTATE(u64, smstate, offset + 8);
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kvm_set_segment(vcpu, &desc, n);
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return X86EMUL_CONTINUE;
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}
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#endif
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static int rsm_enter_protected_mode(struct x86_emulate_ctxt *ctxt,
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static int rsm_enter_protected_mode(struct kvm_vcpu *vcpu,
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u64 cr0, u64 cr3, u64 cr4)
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{
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int bad;
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@ -348,7 +336,7 @@ static int rsm_enter_protected_mode(struct x86_emulate_ctxt *ctxt,
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cr3 &= ~0xfff;
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}
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bad = ctxt->ops->set_cr(ctxt, 3, cr3);
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bad = kvm_set_cr3(vcpu, cr3);
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if (bad)
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return X86EMUL_UNHANDLEABLE;
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@ -357,20 +345,20 @@ static int rsm_enter_protected_mode(struct x86_emulate_ctxt *ctxt,
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* Then enable protected mode. However, PCID cannot be enabled
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* if EFER.LMA=0, so set it separately.
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*/
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bad = ctxt->ops->set_cr(ctxt, 4, cr4 & ~X86_CR4_PCIDE);
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bad = kvm_set_cr4(vcpu, cr4 & ~X86_CR4_PCIDE);
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if (bad)
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return X86EMUL_UNHANDLEABLE;
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bad = ctxt->ops->set_cr(ctxt, 0, cr0);
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bad = kvm_set_cr0(vcpu, cr0);
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if (bad)
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return X86EMUL_UNHANDLEABLE;
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if (cr4 & X86_CR4_PCIDE) {
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bad = ctxt->ops->set_cr(ctxt, 4, cr4);
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bad = kvm_set_cr4(vcpu, cr4);
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if (bad)
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return X86EMUL_UNHANDLEABLE;
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if (pcid) {
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bad = ctxt->ops->set_cr(ctxt, 3, cr3 | pcid);
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bad = kvm_set_cr3(vcpu, cr3 | pcid);
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if (bad)
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return X86EMUL_UNHANDLEABLE;
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}
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@ -383,9 +371,9 @@ static int rsm_enter_protected_mode(struct x86_emulate_ctxt *ctxt,
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static int rsm_load_state_32(struct x86_emulate_ctxt *ctxt,
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const char *smstate)
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{
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struct desc_struct desc;
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struct kvm_vcpu *vcpu = ctxt->vcpu;
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struct kvm_segment desc;
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struct desc_ptr dt;
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u16 selector;
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u32 val, cr0, cr3, cr4;
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int i;
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@ -399,56 +387,55 @@ static int rsm_load_state_32(struct x86_emulate_ctxt *ctxt,
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val = GET_SMSTATE(u32, smstate, 0x7fcc);
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if (ctxt->ops->set_dr(ctxt, 6, val))
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if (kvm_set_dr(vcpu, 6, val))
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return X86EMUL_UNHANDLEABLE;
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val = GET_SMSTATE(u32, smstate, 0x7fc8);
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if (ctxt->ops->set_dr(ctxt, 7, val))
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if (kvm_set_dr(vcpu, 7, val))
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return X86EMUL_UNHANDLEABLE;
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selector = GET_SMSTATE(u32, smstate, 0x7fc4);
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set_desc_base(&desc, GET_SMSTATE(u32, smstate, 0x7f64));
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set_desc_limit(&desc, GET_SMSTATE(u32, smstate, 0x7f60));
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desc.selector = GET_SMSTATE(u32, smstate, 0x7fc4);
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desc.base = GET_SMSTATE(u32, smstate, 0x7f64);
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desc.limit = GET_SMSTATE(u32, smstate, 0x7f60);
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rsm_set_desc_flags(&desc, GET_SMSTATE(u32, smstate, 0x7f5c));
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ctxt->ops->set_segment(ctxt, selector, &desc, 0, VCPU_SREG_TR);
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kvm_set_segment(vcpu, &desc, VCPU_SREG_TR);
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selector = GET_SMSTATE(u32, smstate, 0x7fc0);
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set_desc_base(&desc, GET_SMSTATE(u32, smstate, 0x7f80));
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set_desc_limit(&desc, GET_SMSTATE(u32, smstate, 0x7f7c));
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desc.selector = GET_SMSTATE(u32, smstate, 0x7fc0);
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desc.base = GET_SMSTATE(u32, smstate, 0x7f80);
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desc.limit = GET_SMSTATE(u32, smstate, 0x7f7c);
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rsm_set_desc_flags(&desc, GET_SMSTATE(u32, smstate, 0x7f78));
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ctxt->ops->set_segment(ctxt, selector, &desc, 0, VCPU_SREG_LDTR);
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kvm_set_segment(vcpu, &desc, VCPU_SREG_LDTR);
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dt.address = GET_SMSTATE(u32, smstate, 0x7f74);
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dt.size = GET_SMSTATE(u32, smstate, 0x7f70);
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ctxt->ops->set_gdt(ctxt, &dt);
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static_call(kvm_x86_set_gdt)(vcpu, &dt);
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dt.address = GET_SMSTATE(u32, smstate, 0x7f58);
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dt.size = GET_SMSTATE(u32, smstate, 0x7f54);
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ctxt->ops->set_idt(ctxt, &dt);
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static_call(kvm_x86_set_idt)(vcpu, &dt);
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for (i = 0; i < 6; i++) {
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int r = rsm_load_seg_32(ctxt, smstate, i);
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int r = rsm_load_seg_32(vcpu, smstate, i);
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if (r != X86EMUL_CONTINUE)
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return r;
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}
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cr4 = GET_SMSTATE(u32, smstate, 0x7f14);
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ctxt->ops->set_smbase(ctxt, GET_SMSTATE(u32, smstate, 0x7ef8));
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vcpu->arch.smbase = GET_SMSTATE(u32, smstate, 0x7ef8);
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return rsm_enter_protected_mode(ctxt, cr0, cr3, cr4);
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return rsm_enter_protected_mode(vcpu, cr0, cr3, cr4);
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}
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#ifdef CONFIG_X86_64
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static int rsm_load_state_64(struct x86_emulate_ctxt *ctxt,
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const char *smstate)
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{
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struct desc_struct desc;
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struct kvm_vcpu *vcpu = ctxt->vcpu;
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struct kvm_segment desc;
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struct desc_ptr dt;
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u64 val, cr0, cr3, cr4;
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u32 base3;
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u16 selector;
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int i, r;
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for (i = 0; i < 16; i++)
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@ -459,51 +446,49 @@ static int rsm_load_state_64(struct x86_emulate_ctxt *ctxt,
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val = GET_SMSTATE(u64, smstate, 0x7f68);
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if (ctxt->ops->set_dr(ctxt, 6, val))
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if (kvm_set_dr(vcpu, 6, val))
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return X86EMUL_UNHANDLEABLE;
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val = GET_SMSTATE(u64, smstate, 0x7f60);
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if (ctxt->ops->set_dr(ctxt, 7, val))
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if (kvm_set_dr(vcpu, 7, val))
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return X86EMUL_UNHANDLEABLE;
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cr0 = GET_SMSTATE(u64, smstate, 0x7f58);
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cr3 = GET_SMSTATE(u64, smstate, 0x7f50);
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cr4 = GET_SMSTATE(u64, smstate, 0x7f48);
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ctxt->ops->set_smbase(ctxt, GET_SMSTATE(u32, smstate, 0x7f00));
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vcpu->arch.smbase = GET_SMSTATE(u32, smstate, 0x7f00);
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val = GET_SMSTATE(u64, smstate, 0x7ed0);
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if (ctxt->ops->set_msr(ctxt, MSR_EFER, val & ~EFER_LMA))
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if (kvm_set_msr(vcpu, MSR_EFER, val & ~EFER_LMA))
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return X86EMUL_UNHANDLEABLE;
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selector = GET_SMSTATE(u32, smstate, 0x7e90);
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desc.selector = GET_SMSTATE(u32, smstate, 0x7e90);
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rsm_set_desc_flags(&desc, GET_SMSTATE(u32, smstate, 0x7e92) << 8);
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set_desc_limit(&desc, GET_SMSTATE(u32, smstate, 0x7e94));
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set_desc_base(&desc, GET_SMSTATE(u32, smstate, 0x7e98));
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base3 = GET_SMSTATE(u32, smstate, 0x7e9c);
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ctxt->ops->set_segment(ctxt, selector, &desc, base3, VCPU_SREG_TR);
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desc.limit = GET_SMSTATE(u32, smstate, 0x7e94);
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desc.base = GET_SMSTATE(u64, smstate, 0x7e98);
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kvm_set_segment(vcpu, &desc, VCPU_SREG_TR);
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dt.size = GET_SMSTATE(u32, smstate, 0x7e84);
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dt.address = GET_SMSTATE(u64, smstate, 0x7e88);
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ctxt->ops->set_idt(ctxt, &dt);
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static_call(kvm_x86_set_idt)(vcpu, &dt);
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selector = GET_SMSTATE(u32, smstate, 0x7e70);
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desc.selector = GET_SMSTATE(u32, smstate, 0x7e70);
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rsm_set_desc_flags(&desc, GET_SMSTATE(u32, smstate, 0x7e72) << 8);
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set_desc_limit(&desc, GET_SMSTATE(u32, smstate, 0x7e74));
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set_desc_base(&desc, GET_SMSTATE(u32, smstate, 0x7e78));
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base3 = GET_SMSTATE(u32, smstate, 0x7e7c);
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ctxt->ops->set_segment(ctxt, selector, &desc, base3, VCPU_SREG_LDTR);
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desc.limit = GET_SMSTATE(u32, smstate, 0x7e74);
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desc.base = GET_SMSTATE(u64, smstate, 0x7e78);
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kvm_set_segment(vcpu, &desc, VCPU_SREG_LDTR);
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dt.size = GET_SMSTATE(u32, smstate, 0x7e64);
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dt.address = GET_SMSTATE(u64, smstate, 0x7e68);
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ctxt->ops->set_gdt(ctxt, &dt);
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static_call(kvm_x86_set_gdt)(vcpu, &dt);
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r = rsm_enter_protected_mode(ctxt, cr0, cr3, cr4);
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r = rsm_enter_protected_mode(vcpu, cr0, cr3, cr4);
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if (r != X86EMUL_CONTINUE)
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return r;
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for (i = 0; i < 6; i++) {
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r = rsm_load_seg_64(ctxt, smstate, i);
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r = rsm_load_seg_64(vcpu, smstate, i);
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if (r != X86EMUL_CONTINUE)
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return r;
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}
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@ -515,19 +500,19 @@ static int rsm_load_state_64(struct x86_emulate_ctxt *ctxt,
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int emulator_leave_smm(struct x86_emulate_ctxt *ctxt)
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{
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struct kvm_vcpu *vcpu = ctxt->vcpu;
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unsigned long cr0, cr4, efer;
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unsigned long cr0;
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char buf[512];
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u64 smbase;
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int ret;
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smbase = ctxt->ops->get_smbase(ctxt);
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smbase = vcpu->arch.smbase;
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ret = ctxt->ops->read_phys(ctxt, smbase + 0xfe00, buf, sizeof(buf));
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if (ret != X86EMUL_CONTINUE)
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ret = kvm_vcpu_read_guest(vcpu, smbase + 0xfe00, buf, sizeof(buf));
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if (ret < 0)
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return X86EMUL_UNHANDLEABLE;
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if ((ctxt->ops->get_hflags(ctxt) & X86EMUL_SMM_INSIDE_NMI_MASK) == 0)
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ctxt->ops->set_nmi_mask(ctxt, false);
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if ((vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK) == 0)
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static_call(kvm_x86_set_nmi_mask)(vcpu, false);
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kvm_smm_changed(vcpu, false);
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@ -535,41 +520,44 @@ int emulator_leave_smm(struct x86_emulate_ctxt *ctxt)
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* Get back to real mode, to prepare a safe state in which to load
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* CR0/CR3/CR4/EFER. It's all a bit more complicated if the vCPU
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* supports long mode.
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*
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* The ctxt->ops callbacks will handle all side effects when writing
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* writing MSRs and CRs, e.g. MMU context resets, CPUID
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* runtime updates, etc.
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*/
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if (emulator_has_longmode(ctxt)) {
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struct desc_struct cs_desc;
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#ifdef CONFIG_X86_64
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if (guest_cpuid_has(vcpu, X86_FEATURE_LM)) {
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struct kvm_segment cs_desc;
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unsigned long cr4;
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/* Zero CR4.PCIDE before CR0.PG. */
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cr4 = ctxt->ops->get_cr(ctxt, 4);
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cr4 = kvm_read_cr4(vcpu);
|
||||
if (cr4 & X86_CR4_PCIDE)
|
||||
ctxt->ops->set_cr(ctxt, 4, cr4 & ~X86_CR4_PCIDE);
|
||||
kvm_set_cr4(vcpu, cr4 & ~X86_CR4_PCIDE);
|
||||
|
||||
/* A 32-bit code segment is required to clear EFER.LMA. */
|
||||
memset(&cs_desc, 0, sizeof(cs_desc));
|
||||
cs_desc.type = 0xb;
|
||||
cs_desc.s = cs_desc.g = cs_desc.p = 1;
|
||||
ctxt->ops->set_segment(ctxt, 0, &cs_desc, 0, VCPU_SREG_CS);
|
||||
cs_desc.s = cs_desc.g = cs_desc.present = 1;
|
||||
kvm_set_segment(vcpu, &cs_desc, VCPU_SREG_CS);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* For the 64-bit case, this will clear EFER.LMA. */
|
||||
cr0 = ctxt->ops->get_cr(ctxt, 0);
|
||||
cr0 = kvm_read_cr0(vcpu);
|
||||
if (cr0 & X86_CR0_PE)
|
||||
ctxt->ops->set_cr(ctxt, 0, cr0 & ~(X86_CR0_PG | X86_CR0_PE));
|
||||
kvm_set_cr0(vcpu, cr0 & ~(X86_CR0_PG | X86_CR0_PE));
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
if (guest_cpuid_has(vcpu, X86_FEATURE_LM)) {
|
||||
unsigned long cr4, efer;
|
||||
|
||||
if (emulator_has_longmode(ctxt)) {
|
||||
/* Clear CR4.PAE before clearing EFER.LME. */
|
||||
cr4 = ctxt->ops->get_cr(ctxt, 4);
|
||||
cr4 = kvm_read_cr4(vcpu);
|
||||
if (cr4 & X86_CR4_PAE)
|
||||
ctxt->ops->set_cr(ctxt, 4, cr4 & ~X86_CR4_PAE);
|
||||
kvm_set_cr4(vcpu, cr4 & ~X86_CR4_PAE);
|
||||
|
||||
/* And finally go back to 32-bit mode. */
|
||||
efer = 0;
|
||||
ctxt->ops->set_msr(ctxt, MSR_EFER, efer);
|
||||
kvm_set_msr(vcpu, MSR_EFER, efer);
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Give leave_smm() a chance to make ISA-specific changes to the vCPU
|
||||
|
|
@ -580,7 +568,7 @@ int emulator_leave_smm(struct x86_emulate_ctxt *ctxt)
|
|||
return X86EMUL_UNHANDLEABLE;
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
if (emulator_has_longmode(ctxt))
|
||||
if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
|
||||
return rsm_load_state_64(ctxt, buf);
|
||||
else
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -7256,15 +7256,6 @@ static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
|
|||
return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
|
||||
}
|
||||
|
||||
static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
|
||||
unsigned long addr, void *val, unsigned int bytes)
|
||||
{
|
||||
struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
|
||||
int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
|
||||
|
||||
return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
|
||||
}
|
||||
|
||||
static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
|
||||
struct kvm_vcpu *vcpu, u64 access,
|
||||
struct x86_exception *exception)
|
||||
|
|
@ -8056,26 +8047,6 @@ static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
|
|||
return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
|
||||
}
|
||||
|
||||
static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
|
||||
u32 msr_index, u64 data)
|
||||
{
|
||||
return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
|
||||
}
|
||||
|
||||
static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
|
||||
{
|
||||
struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
|
||||
|
||||
return vcpu->arch.smbase;
|
||||
}
|
||||
|
||||
static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
|
||||
{
|
||||
struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
|
||||
|
||||
vcpu->arch.smbase = smbase;
|
||||
}
|
||||
|
||||
static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
|
||||
u32 pmc)
|
||||
{
|
||||
|
|
@ -8174,7 +8145,6 @@ static const struct x86_emulate_ops emulate_ops = {
|
|||
.write_gpr = emulator_write_gpr,
|
||||
.read_std = emulator_read_std,
|
||||
.write_std = emulator_write_std,
|
||||
.read_phys = kvm_read_guest_phys_system,
|
||||
.fetch = kvm_fetch_guest_virt,
|
||||
.read_emulated = emulator_read_emulated,
|
||||
.write_emulated = emulator_write_emulated,
|
||||
|
|
@ -8194,11 +8164,8 @@ static const struct x86_emulate_ops emulate_ops = {
|
|||
.cpl = emulator_get_cpl,
|
||||
.get_dr = emulator_get_dr,
|
||||
.set_dr = emulator_set_dr,
|
||||
.get_smbase = emulator_get_smbase,
|
||||
.set_smbase = emulator_set_smbase,
|
||||
.set_msr_with_filter = emulator_set_msr_with_filter,
|
||||
.get_msr_with_filter = emulator_get_msr_with_filter,
|
||||
.set_msr = emulator_set_msr,
|
||||
.get_msr = emulator_get_msr,
|
||||
.check_pmc = emulator_check_pmc,
|
||||
.read_pmc = emulator_read_pmc,
|
||||
|
|
|
|||
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