PCI: Add Intel Thunderbolt device IDs
Intel Gen 1 and 2 chips use the same ID for NHI, bridges and switch. Gen 3 chips and onward use a distinct ID for the NHI. No functional change intended. Signed-off-by: Lukas Wunner <lukas@wunner.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Andreas Noever <andreas.noever@gmail.com>
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1d111406c6
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@ -3232,7 +3232,8 @@ static void quirk_apple_poweroff_thunderbolt(struct pci_dev *dev)
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acpi_execute_simple_method(SXIO, NULL, 0);
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acpi_execute_simple_method(SXLV, NULL, 0);
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}
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DECLARE_PCI_FIXUP_SUSPEND_LATE(PCI_VENDOR_ID_INTEL, 0x1547,
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DECLARE_PCI_FIXUP_SUSPEND_LATE(PCI_VENDOR_ID_INTEL,
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PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C,
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quirk_apple_poweroff_thunderbolt);
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/*
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@ -3266,9 +3267,10 @@ static void quirk_apple_wait_for_thunderbolt(struct pci_dev *dev)
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if (!nhi)
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goto out;
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if (nhi->vendor != PCI_VENDOR_ID_INTEL
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|| (nhi->device != 0x1547 && nhi->device != 0x156c)
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|| nhi->subsystem_vendor != 0x2222
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|| nhi->subsystem_device != 0x1111)
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|| (nhi->device != PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C &&
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nhi->device != PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_NHI)
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|| nhi->subsystem_vendor != 0x2222
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|| nhi->subsystem_device != 0x1111)
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goto out;
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dev_info(&dev->dev, "quirk: waiting for thunderbolt to reestablish PCI tunnels...\n");
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device_pm_wait_for_dev(&dev->dev, &nhi->dev);
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@ -3276,9 +3278,11 @@ out:
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pci_dev_put(nhi);
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pci_dev_put(sibling);
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}
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DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_INTEL, 0x1547,
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DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_INTEL,
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PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C,
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quirk_apple_wait_for_thunderbolt);
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DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_INTEL, 0x156d,
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DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_INTEL,
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PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_BRIDGE,
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quirk_apple_wait_for_thunderbolt);
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#endif
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@ -633,16 +633,18 @@ static const struct dev_pm_ops nhi_pm_ops = {
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static struct pci_device_id nhi_ids[] = {
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/*
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* We have to specify class, the TB bridges use the same device and
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* vendor (sub)id.
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* vendor (sub)id on gen 1 and gen 2 controllers.
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*/
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{
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.class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
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.vendor = PCI_VENDOR_ID_INTEL, .device = 0x1547,
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.vendor = PCI_VENDOR_ID_INTEL,
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.device = PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C,
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.subvendor = 0x2222, .subdevice = 0x1111,
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},
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{
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.class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
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.vendor = PCI_VENDOR_ID_INTEL, .device = 0x156c,
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.vendor = PCI_VENDOR_ID_INTEL,
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.device = PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_NHI,
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.subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID,
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},
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{ 0,}
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@ -293,9 +293,9 @@ static int tb_plug_events_active(struct tb_switch *sw, bool active)
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if (active) {
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data = data & 0xFFFFFF83;
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switch (sw->config.device_id) {
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case 0x1513:
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case 0x151a:
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case 0x1549:
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case PCI_DEVICE_ID_INTEL_LIGHT_RIDGE:
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case PCI_DEVICE_ID_INTEL_EAGLE_RIDGE:
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case PCI_DEVICE_ID_INTEL_PORT_RIDGE:
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break;
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default:
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data |= 4;
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@ -370,7 +370,8 @@ struct tb_switch *tb_switch_alloc(struct tb *tb, u64 route)
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tb_sw_warn(sw, "unknown switch vendor id %#x\n",
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sw->config.vendor_id);
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if (sw->config.device_id != 0x1547 && sw->config.device_id != 0x1549)
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if (sw->config.device_id != PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C &&
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sw->config.device_id != PCI_DEVICE_ID_INTEL_PORT_RIDGE)
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tb_sw_warn(sw, "unsupported switch device id %#x\n",
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sw->config.device_id);
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@ -2604,6 +2604,24 @@
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#define PCI_DEVICE_ID_INTEL_82441 0x1237
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#define PCI_DEVICE_ID_INTEL_82380FB 0x124b
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#define PCI_DEVICE_ID_INTEL_82439 0x1250
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#define PCI_DEVICE_ID_INTEL_LIGHT_RIDGE 0x1513 /* Tbt 1 Gen 1 */
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#define PCI_DEVICE_ID_INTEL_EAGLE_RIDGE 0x151a
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#define PCI_DEVICE_ID_INTEL_LIGHT_PEAK 0x151b
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#define PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C 0x1547 /* Tbt 1 Gen 2 */
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#define PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_2C 0x1548
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#define PCI_DEVICE_ID_INTEL_PORT_RIDGE 0x1549
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#define PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_2C_NHI 0x1566 /* Tbt 1 Gen 3 */
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#define PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_2C_BRIDGE 0x1567
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#define PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_4C_NHI 0x1568
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#define PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_4C_BRIDGE 0x1569
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#define PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_NHI 0x156a /* Thunderbolt 2 */
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#define PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_BRIDGE 0x156b
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#define PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_NHI 0x156c
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#define PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_BRIDGE 0x156d
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#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_NHI 0x1575 /* Thunderbolt 3 */
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#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_BRIDGE 0x1576
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#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_NHI 0x1577
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#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_BRIDGE 0x1578
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#define PCI_DEVICE_ID_INTEL_80960_RP 0x1960
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#define PCI_DEVICE_ID_INTEL_82840_HB 0x1a21
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#define PCI_DEVICE_ID_INTEL_82845_HB 0x1a30
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