drivers/tty/serial: add LiteUART driver
This commit adds driver for the FPGA-based LiteUART serial controller from LiteX SoC builder. The current implementation supports LiteUART configured for 32 bit data width and 8 bit CSR bus width. It does not support IRQ. Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stafford Horne <shorne@gmail.com>
This commit is contained in:
Filip Kokosinski
Stafford Horne
Родитель
79c5ef07d9
Коммит
1da81e5562
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@ -10178,6 +10178,7 @@ M: Mateusz Holenko <mholenko@antmicro.com>
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S: Maintained
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F: Documentation/devicetree/bindings/*/litex,*.yaml
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F: drivers/soc/litex/litex_soc_ctrl.c
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F: drivers/tty/serial/liteuart.c
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F: include/linux/litex.h
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LIVE PATCHING
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@ -1582,6 +1582,38 @@ config SERIAL_MILBEAUT_USIO_CONSOLE
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receives all kernel messages and warnings and which allows logins in
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single user mode).
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config SERIAL_LITEUART
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tristate "LiteUART serial port support"
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depends on HAS_IOMEM
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depends on OF || COMPILE_TEST
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depends on LITEX
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select SERIAL_CORE
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help
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This driver is for the FPGA-based LiteUART serial controller from LiteX
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SoC builder.
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Say 'Y' or 'M' here if you wish to use the LiteUART serial controller.
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Otherwise, say 'N'.
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config SERIAL_LITEUART_MAX_PORTS
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int "Maximum number of LiteUART ports"
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depends on SERIAL_LITEUART
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default "1"
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help
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Set this to the maximum number of serial ports you want the driver
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to support.
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config SERIAL_LITEUART_CONSOLE
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bool "LiteUART serial port console support"
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depends on SERIAL_LITEUART=y
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select SERIAL_CORE_CONSOLE
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help
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Say 'Y' or 'M' here if you wish to use the FPGA-based LiteUART serial
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controller from LiteX SoC builder as the system console
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(the system console is the device which receives all kernel messages
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and warnings and which allows logins in single user mode).
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Otherwise, say 'N'.
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endmenu
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config SERIAL_MCTRL_GPIO
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@ -90,6 +90,7 @@ obj-$(CONFIG_SERIAL_OWL) += owl-uart.o
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obj-$(CONFIG_SERIAL_RDA) += rda-uart.o
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obj-$(CONFIG_SERIAL_MILBEAUT_USIO) += milbeaut_usio.o
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obj-$(CONFIG_SERIAL_SIFIVE) += sifive.o
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obj-$(CONFIG_SERIAL_LITEUART) += liteuart.o
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# GPIOLIB helpers for modem control lines
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obj-$(CONFIG_SERIAL_MCTRL_GPIO) += serial_mctrl_gpio.o
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@ -0,0 +1,404 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* LiteUART serial controller (LiteX) Driver
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*
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* Copyright (C) 2019-2020 Antmicro <www.antmicro.com>
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*/
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#include <linux/console.h>
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#include <linux/litex.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/serial.h>
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#include <linux/serial_core.h>
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#include <linux/slab.h>
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#include <linux/timer.h>
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#include <linux/tty_flip.h>
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#include <linux/xarray.h>
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/*
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* CSRs definitions (base address offsets + width)
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*
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* The definitions below are true for LiteX SoC configured for 8-bit CSR Bus,
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* 32-bit aligned.
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*
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* Supporting other configurations might require new definitions or a more
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* generic way of indexing the LiteX CSRs.
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*
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* For more details on how CSRs are defined and handled in LiteX, see comments
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* in the LiteX SoC Driver: drivers/soc/litex/litex_soc_ctrl.c
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*/
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#define OFF_RXTX 0x00
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#define OFF_TXFULL 0x04
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#define OFF_RXEMPTY 0x08
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#define OFF_EV_STATUS 0x0c
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#define OFF_EV_PENDING 0x10
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#define OFF_EV_ENABLE 0x14
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/* events */
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#define EV_TX 0x1
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#define EV_RX 0x2
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struct liteuart_port {
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struct uart_port port;
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struct timer_list timer;
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u32 id;
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};
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#define to_liteuart_port(port) container_of(port, struct liteuart_port, port)
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static DEFINE_XARRAY_FLAGS(liteuart_array, XA_FLAGS_ALLOC);
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#ifdef CONFIG_SERIAL_LITEUART_CONSOLE
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static struct console liteuart_console;
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#endif
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static struct uart_driver liteuart_driver = {
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.owner = THIS_MODULE,
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.driver_name = "liteuart",
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.dev_name = "ttyLXU",
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.major = 0,
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.minor = 0,
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.nr = CONFIG_SERIAL_LITEUART_MAX_PORTS,
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#ifdef CONFIG_SERIAL_LITEUART_CONSOLE
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.cons = &liteuart_console,
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#endif
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};
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static void liteuart_timer(struct timer_list *t)
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{
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struct liteuart_port *uart = from_timer(uart, t, timer);
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struct uart_port *port = &uart->port;
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unsigned char __iomem *membase = port->membase;
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unsigned int flg = TTY_NORMAL;
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int ch;
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unsigned long status;
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while ((status = !litex_read8(membase + OFF_RXEMPTY)) == 1) {
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ch = litex_read8(membase + OFF_RXTX);
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port->icount.rx++;
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/* necessary for RXEMPTY to refresh its value */
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litex_write8(membase + OFF_EV_PENDING, EV_TX | EV_RX);
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/* no overflow bits in status */
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if (!(uart_handle_sysrq_char(port, ch)))
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uart_insert_char(port, status, 0, ch, flg);
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tty_flip_buffer_push(&port->state->port);
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}
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mod_timer(&uart->timer, jiffies + uart_poll_timeout(port));
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}
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static void liteuart_putchar(struct uart_port *port, int ch)
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{
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while (litex_read8(port->membase + OFF_TXFULL))
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cpu_relax();
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litex_write8(port->membase + OFF_RXTX, ch);
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}
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static unsigned int liteuart_tx_empty(struct uart_port *port)
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{
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/* not really tx empty, just checking if tx is not full */
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if (!litex_read8(port->membase + OFF_TXFULL))
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return TIOCSER_TEMT;
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return 0;
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}
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static void liteuart_set_mctrl(struct uart_port *port, unsigned int mctrl)
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{
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/* modem control register is not present in LiteUART */
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}
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static unsigned int liteuart_get_mctrl(struct uart_port *port)
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{
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return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
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}
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static void liteuart_stop_tx(struct uart_port *port)
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{
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}
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static void liteuart_start_tx(struct uart_port *port)
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{
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struct circ_buf *xmit = &port->state->xmit;
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unsigned char ch;
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if (unlikely(port->x_char)) {
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litex_write8(port->membase + OFF_RXTX, port->x_char);
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port->icount.tx++;
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port->x_char = 0;
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} else if (!uart_circ_empty(xmit)) {
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while (xmit->head != xmit->tail) {
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ch = xmit->buf[xmit->tail];
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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port->icount.tx++;
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liteuart_putchar(port, ch);
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}
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}
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(port);
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}
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static void liteuart_stop_rx(struct uart_port *port)
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{
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struct liteuart_port *uart = to_liteuart_port(port);
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/* just delete timer */
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del_timer(&uart->timer);
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}
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static void liteuart_break_ctl(struct uart_port *port, int break_state)
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{
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/* LiteUART doesn't support sending break signal */
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}
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static int liteuart_startup(struct uart_port *port)
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{
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struct liteuart_port *uart = to_liteuart_port(port);
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/* disable events */
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litex_write8(port->membase + OFF_EV_ENABLE, 0);
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/* prepare timer for polling */
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timer_setup(&uart->timer, liteuart_timer, 0);
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mod_timer(&uart->timer, jiffies + uart_poll_timeout(port));
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return 0;
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}
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static void liteuart_shutdown(struct uart_port *port)
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{
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}
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static void liteuart_set_termios(struct uart_port *port, struct ktermios *new,
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struct ktermios *old)
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{
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unsigned int baud;
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unsigned long flags;
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spin_lock_irqsave(&port->lock, flags);
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/* update baudrate */
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baud = uart_get_baud_rate(port, new, old, 0, 460800);
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uart_update_timeout(port, new->c_cflag, baud);
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static const char *liteuart_type(struct uart_port *port)
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{
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return "liteuart";
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}
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static void liteuart_release_port(struct uart_port *port)
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{
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}
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static int liteuart_request_port(struct uart_port *port)
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{
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return 0;
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}
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static void liteuart_config_port(struct uart_port *port, int flags)
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{
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/*
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* Driver core for serial ports forces a non-zero value for port type.
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* Write an arbitrary value here to accommodate the serial core driver,
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* as ID part of UAPI is redundant.
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*/
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port->type = 1;
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}
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static int liteuart_verify_port(struct uart_port *port,
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struct serial_struct *ser)
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{
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if (port->type != PORT_UNKNOWN && ser->type != 1)
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return -EINVAL;
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return 0;
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}
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static const struct uart_ops liteuart_ops = {
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.tx_empty = liteuart_tx_empty,
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.set_mctrl = liteuart_set_mctrl,
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.get_mctrl = liteuart_get_mctrl,
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.stop_tx = liteuart_stop_tx,
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.start_tx = liteuart_start_tx,
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.stop_rx = liteuart_stop_rx,
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.break_ctl = liteuart_break_ctl,
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.startup = liteuart_startup,
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.shutdown = liteuart_shutdown,
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.set_termios = liteuart_set_termios,
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.type = liteuart_type,
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.release_port = liteuart_release_port,
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.request_port = liteuart_request_port,
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.config_port = liteuart_config_port,
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.verify_port = liteuart_verify_port,
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};
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static int liteuart_probe(struct platform_device *pdev)
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{
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struct liteuart_port *uart;
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struct uart_port *port;
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struct xa_limit limit;
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int dev_id, ret;
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/* look for aliases; auto-enumerate for free index if not found */
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dev_id = of_alias_get_id(pdev->dev.of_node, "serial");
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if (dev_id < 0)
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limit = XA_LIMIT(0, CONFIG_SERIAL_LITEUART_MAX_PORTS);
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else
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limit = XA_LIMIT(dev_id, dev_id);
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uart = devm_kzalloc(&pdev->dev, sizeof(struct liteuart_port), GFP_KERNEL);
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if (!uart)
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return -ENOMEM;
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ret = xa_alloc(&liteuart_array, &dev_id, uart, limit, GFP_KERNEL);
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if (ret)
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return ret;
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uart->id = dev_id;
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port = &uart->port;
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/* get membase */
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port->membase = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
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if (!port->membase)
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return -ENXIO;
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/* values not from device tree */
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port->dev = &pdev->dev;
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port->iotype = UPIO_MEM;
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port->flags = UPF_BOOT_AUTOCONF;
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port->ops = &liteuart_ops;
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port->regshift = 2;
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port->fifosize = 16;
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port->iobase = 1;
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port->type = PORT_UNKNOWN;
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port->line = dev_id;
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spin_lock_init(&port->lock);
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return uart_add_one_port(&liteuart_driver, &uart->port);
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}
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static int liteuart_remove(struct platform_device *pdev)
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{
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struct uart_port *port = platform_get_drvdata(pdev);
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struct liteuart_port *uart = to_liteuart_port(port);
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xa_erase(&liteuart_array, uart->id);
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return 0;
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}
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static const struct of_device_id liteuart_of_match[] = {
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{ .compatible = "litex,liteuart" },
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{}
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};
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MODULE_DEVICE_TABLE(of, liteuart_of_match);
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static struct platform_driver liteuart_platform_driver = {
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.probe = liteuart_probe,
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.remove = liteuart_remove,
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.driver = {
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.name = "liteuart",
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.of_match_table = liteuart_of_match,
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},
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};
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#ifdef CONFIG_SERIAL_LITEUART_CONSOLE
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static void liteuart_console_write(struct console *co, const char *s,
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unsigned int count)
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{
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struct liteuart_port *uart;
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struct uart_port *port;
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unsigned long flags;
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uart = (struct liteuart_port *)xa_load(&liteuart_array, co->index);
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port = &uart->port;
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spin_lock_irqsave(&port->lock, flags);
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uart_console_write(port, s, count, liteuart_putchar);
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static int liteuart_console_setup(struct console *co, char *options)
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{
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struct liteuart_port *uart;
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struct uart_port *port;
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int baud = 115200;
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int bits = 8;
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int parity = 'n';
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int flow = 'n';
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uart = (struct liteuart_port *)xa_load(&liteuart_array, co->index);
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if (!uart)
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return -ENODEV;
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port = &uart->port;
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if (!port->membase)
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return -ENODEV;
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if (options)
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uart_parse_options(options, &baud, &parity, &bits, &flow);
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|
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return uart_set_options(port, co, baud, parity, bits, flow);
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}
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|
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static struct console liteuart_console = {
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.name = "liteuart",
|
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.write = liteuart_console_write,
|
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.device = uart_console_device,
|
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.setup = liteuart_console_setup,
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.flags = CON_PRINTBUFFER,
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.index = -1,
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.data = &liteuart_driver,
|
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};
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static int __init liteuart_console_init(void)
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{
|
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register_console(&liteuart_console);
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|
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return 0;
|
||||
}
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console_initcall(liteuart_console_init);
|
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#endif /* CONFIG_SERIAL_LITEUART_CONSOLE */
|
||||
|
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static int __init liteuart_init(void)
|
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{
|
||||
int res;
|
||||
|
||||
res = uart_register_driver(&liteuart_driver);
|
||||
if (res)
|
||||
return res;
|
||||
|
||||
res = platform_driver_register(&liteuart_platform_driver);
|
||||
if (res) {
|
||||
uart_unregister_driver(&liteuart_driver);
|
||||
return res;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void __exit liteuart_exit(void)
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{
|
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platform_driver_unregister(&liteuart_platform_driver);
|
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uart_unregister_driver(&liteuart_driver);
|
||||
}
|
||||
|
||||
module_init(liteuart_init);
|
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module_exit(liteuart_exit);
|
||||
|
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MODULE_AUTHOR("Antmicro <www.antmicro.com>");
|
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MODULE_DESCRIPTION("LiteUART serial driver");
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MODULE_LICENSE("GPL v2");
|
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MODULE_ALIAS("platform: liteuart");
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