drm/tegra: Changes for v4.1-rc1
Perhaps the most noteworthy change in this set is the implementation of a hardware VBLANK counter using host1x syncpoints. The SOR registers can now be dumped via debugfs, which can be useful while debugging. The IOVA address space maintained by the driver can also be dumped via debugfs. Other than than, these changes are mostly cleanup work, such as making register names more consistent or removing unused code (that was left over after the atomic mode-setting conversion). There's also a fix for eDP that makes the driver cope with firmware that already initialized the display (such as the firmware on the Tegra-based Chromebooks). -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJVHXUKAAoJEN0jrNd/PrOhjSUQAL9QJZBZmQmit1mroVWmWAx8 1m4/lj0bP3s1uOLzkQUwXJes0/niVie6lGmdZ9WCa3lThPErfvgYqKNpVJOYknMR iFg3HbEHgqz9T5zGNxp43g2hQrxssGEPAJXg4vE06nyS9YTOe0PZi27z9ynwapNZ Z+Gl2787mmnQE+PyQUQjT96OJv2ahnTgHtcDNMU0SWh5Dr6tI/vo5l/mHnqFOKnQ Kt/CCf+eNZ1jWCKqN5WYjxUT8kCMsMPPcnKzwhvrCXf6RqMDhr/rc47PGeak/qKR 0poIA47XlN6lPwul1P2gtyJaMiE7790aPKcgUDdpHJItPxbC9D/A8o8M+TcUqryw NHdKKEDxoo/yg+2x6ZgFk202UbVevp6cBtP+3nrfUAefPCrrkDX31ej6rWAUs7Zm POzugFON7q+85kF/yO1IEg1lov3zLIl4tCXNtprXUPFHbaBJJpMYK8joNyg2YZVh pYrV6AaKEwiVpi2h/kfhk/B32fx/KsufBR7fEPFOcJFQ6Gmi/l6GB+li00+LbrI4 8mDN6ngw7KASj03/RWXKSwGXdHqoMx2vtQPgjlNuGhHSgGzk3hZqapC7X+5WhoAw bOelbtzFABv8EA+vQN5IXd8SKdMPt4AFVGhk4B9HbZUyQLHln187p1tE1q9jSe/V D9bxrB3Wlf4Ks6Kl8OqU =HZO1 -----END PGP SIGNATURE----- Merge tag 'drm/tegra/for-4.1-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next drm/tegra: Changes for v4.1-rc1 Perhaps the most noteworthy change in this set is the implementation of a hardware VBLANK counter using host1x syncpoints. The SOR registers can now be dumped via debugfs, which can be useful while debugging. The IOVA address space maintained by the driver can also be dumped via debugfs. Other than than, these changes are mostly cleanup work, such as making register names more consistent or removing unused code (that was left over after the atomic mode-setting conversion). There's also a fix for eDP that makes the driver cope with firmware that already initialized the display (such as the firmware on the Tegra-based Chromebooks). * tag 'drm/tegra/for-4.1-rc1' of git://anongit.freedesktop.org/tegra/linux: drm/tegra: sor: Reset during initialization drm/tegra: gem: Return 64-bit offset for mmap(2) drm/tegra: hdmi: Name register fields consistently drm/tegra: hdmi: Resets are synchronous drm/tegra: dc: Document tegra_dc_state_setup_clock() drm/tegra: dc: Remove unused callbacks drm/tegra: dc: Remove unused function drm/tegra: dc: Use base atomic state helpers drm/atomic: Add helpers for state-subclassing drivers drm/tegra: dc: Implement hardware VBLANK counter gpu: host1x: Export host1x_syncpt_read() drm/tegra: sor: Dump registers via debugfs drm/tegra: sor: Registers are 32-bit drm/tegra: Provide debugfs file for the IOVA space drm/tegra: dc: Check for valid parent clock
This commit is contained in:
Dave Airlie
Коммит
1ddd36eda1
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@ -2068,6 +2068,26 @@ void drm_atomic_helper_crtc_reset(struct drm_crtc *crtc)
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}
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EXPORT_SYMBOL(drm_atomic_helper_crtc_reset);
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/**
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* __drm_atomic_helper_crtc_duplicate_state - copy atomic CRTC state
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* @crtc: CRTC object
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* @state: atomic CRTC state
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*
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* Copies atomic state from a CRTC's current state and resets inferred values.
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* This is useful for drivers that subclass the CRTC state.
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*/
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void __drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc,
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struct drm_crtc_state *state)
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{
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memcpy(state, crtc->state, sizeof(*state));
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state->mode_changed = false;
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state->active_changed = false;
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state->planes_changed = false;
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state->event = NULL;
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}
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EXPORT_SYMBOL(__drm_atomic_helper_crtc_duplicate_state);
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/**
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* drm_atomic_helper_crtc_duplicate_state - default state duplicate hook
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* @crtc: drm CRTC
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@ -2083,19 +2103,34 @@ drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc)
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if (WARN_ON(!crtc->state))
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return NULL;
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state = kmemdup(crtc->state, sizeof(*crtc->state), GFP_KERNEL);
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if (state) {
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state->mode_changed = false;
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state->active_changed = false;
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state->planes_changed = false;
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state->event = NULL;
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}
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state = kmalloc(sizeof(*state), GFP_KERNEL);
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if (state)
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__drm_atomic_helper_crtc_duplicate_state(crtc, state);
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return state;
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}
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EXPORT_SYMBOL(drm_atomic_helper_crtc_duplicate_state);
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/**
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* __drm_atomic_helper_crtc_destroy_state - release CRTC state
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* @crtc: CRTC object
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* @state: CRTC state object to release
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*
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* Releases all resources stored in the CRTC state without actually freeing
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* the memory of the CRTC state. This is useful for drivers that subclass the
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* CRTC state.
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*/
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void __drm_atomic_helper_crtc_destroy_state(struct drm_crtc *crtc,
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struct drm_crtc_state *state)
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{
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/*
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* This is currently a placeholder so that drivers that subclass the
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* state will automatically do the right thing if code is ever added
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* to this function.
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*/
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}
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EXPORT_SYMBOL(__drm_atomic_helper_crtc_destroy_state);
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/**
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* drm_atomic_helper_crtc_destroy_state - default state destroy hook
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* @crtc: drm CRTC
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@ -2107,6 +2142,7 @@ EXPORT_SYMBOL(drm_atomic_helper_crtc_duplicate_state);
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void drm_atomic_helper_crtc_destroy_state(struct drm_crtc *crtc,
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struct drm_crtc_state *state)
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{
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__drm_atomic_helper_crtc_destroy_state(crtc, state);
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kfree(state);
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}
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EXPORT_SYMBOL(drm_atomic_helper_crtc_destroy_state);
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@ -2131,6 +2167,24 @@ void drm_atomic_helper_plane_reset(struct drm_plane *plane)
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}
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EXPORT_SYMBOL(drm_atomic_helper_plane_reset);
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/**
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* __drm_atomic_helper_plane_duplicate_state - copy atomic plane state
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* @plane: plane object
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* @state: atomic plane state
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*
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* Copies atomic state from a plane's current state. This is useful for
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* drivers that subclass the plane state.
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*/
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void __drm_atomic_helper_plane_duplicate_state(struct drm_plane *plane,
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struct drm_plane_state *state)
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{
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memcpy(state, plane->state, sizeof(*state));
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if (state->fb)
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drm_framebuffer_reference(state->fb);
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}
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EXPORT_SYMBOL(__drm_atomic_helper_plane_duplicate_state);
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/**
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* drm_atomic_helper_plane_duplicate_state - default state duplicate hook
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* @plane: drm plane
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@ -2146,15 +2200,31 @@ drm_atomic_helper_plane_duplicate_state(struct drm_plane *plane)
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if (WARN_ON(!plane->state))
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return NULL;
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state = kmemdup(plane->state, sizeof(*plane->state), GFP_KERNEL);
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if (state && state->fb)
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drm_framebuffer_reference(state->fb);
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state = kmalloc(sizeof(*state), GFP_KERNEL);
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if (state)
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__drm_atomic_helper_plane_duplicate_state(plane, state);
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return state;
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}
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EXPORT_SYMBOL(drm_atomic_helper_plane_duplicate_state);
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/**
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* __drm_atomic_helper_plane_destroy_state - release plane state
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* @plane: plane object
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* @state: plane state object to release
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*
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* Releases all resources stored in the plane state without actually freeing
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* the memory of the plane state. This is useful for drivers that subclass the
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* plane state.
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*/
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void __drm_atomic_helper_plane_destroy_state(struct drm_plane *plane,
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struct drm_plane_state *state)
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{
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if (state->fb)
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drm_framebuffer_unreference(state->fb);
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}
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EXPORT_SYMBOL(__drm_atomic_helper_plane_destroy_state);
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/**
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* drm_atomic_helper_plane_destroy_state - default state destroy hook
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* @plane: drm plane
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@ -2166,9 +2236,7 @@ EXPORT_SYMBOL(drm_atomic_helper_plane_duplicate_state);
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void drm_atomic_helper_plane_destroy_state(struct drm_plane *plane,
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struct drm_plane_state *state)
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{
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if (state->fb)
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drm_framebuffer_unreference(state->fb);
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__drm_atomic_helper_plane_destroy_state(plane, state);
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kfree(state);
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}
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EXPORT_SYMBOL(drm_atomic_helper_plane_destroy_state);
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@ -2191,6 +2259,22 @@ void drm_atomic_helper_connector_reset(struct drm_connector *connector)
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}
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EXPORT_SYMBOL(drm_atomic_helper_connector_reset);
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/**
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* __drm_atomic_helper_connector_duplicate_state - copy atomic connector state
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* @connector: connector object
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* @state: atomic connector state
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*
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* Copies atomic state from a connector's current state. This is useful for
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* drivers that subclass the connector state.
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*/
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void
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__drm_atomic_helper_connector_duplicate_state(struct drm_connector *connector,
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struct drm_connector_state *state)
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{
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memcpy(state, connector->state, sizeof(*state));
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}
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EXPORT_SYMBOL(__drm_atomic_helper_connector_duplicate_state);
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/**
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* drm_atomic_helper_connector_duplicate_state - default state duplicate hook
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* @connector: drm connector
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@ -2201,13 +2285,40 @@ EXPORT_SYMBOL(drm_atomic_helper_connector_reset);
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struct drm_connector_state *
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drm_atomic_helper_connector_duplicate_state(struct drm_connector *connector)
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{
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struct drm_connector_state *state;
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if (WARN_ON(!connector->state))
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return NULL;
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return kmemdup(connector->state, sizeof(*connector->state), GFP_KERNEL);
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state = kmalloc(sizeof(*state), GFP_KERNEL);
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if (state)
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__drm_atomic_helper_connector_duplicate_state(connector, state);
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return state;
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}
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EXPORT_SYMBOL(drm_atomic_helper_connector_duplicate_state);
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/**
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* __drm_atomic_helper_connector_destroy_state - release connector state
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* @connector: connector object
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* @state: connector state object to release
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*
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* Releases all resources stored in the connector state without actually
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* freeing the memory of the connector state. This is useful for drivers that
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* subclass the connector state.
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*/
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void
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__drm_atomic_helper_connector_destroy_state(struct drm_connector *connector,
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struct drm_connector_state *state)
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{
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/*
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* This is currently a placeholder so that drivers that subclass the
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* state will automatically do the right thing if code is ever added
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* to this function.
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*/
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}
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EXPORT_SYMBOL(__drm_atomic_helper_connector_destroy_state);
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/**
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* drm_atomic_helper_connector_destroy_state - default state destroy hook
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* @connector: drm connector
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@ -2219,6 +2330,7 @@ EXPORT_SYMBOL(drm_atomic_helper_connector_duplicate_state);
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void drm_atomic_helper_connector_destroy_state(struct drm_connector *connector,
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struct drm_connector_state *state)
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{
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__drm_atomic_helper_connector_destroy_state(connector, state);
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kfree(state);
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}
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EXPORT_SYMBOL(drm_atomic_helper_connector_destroy_state);
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@ -425,8 +425,8 @@ static void tegra_plane_reset(struct drm_plane *plane)
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{
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struct tegra_plane_state *state;
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if (plane->state && plane->state->fb)
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drm_framebuffer_unreference(plane->state->fb);
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if (plane->state)
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__drm_atomic_helper_plane_destroy_state(plane, plane->state);
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kfree(plane->state);
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plane->state = NULL;
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@ -443,12 +443,14 @@ static struct drm_plane_state *tegra_plane_atomic_duplicate_state(struct drm_pla
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struct tegra_plane_state *state = to_tegra_plane_state(plane->state);
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struct tegra_plane_state *copy;
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copy = kmemdup(state, sizeof(*state), GFP_KERNEL);
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copy = kmalloc(sizeof(*copy), GFP_KERNEL);
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if (!copy)
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return NULL;
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if (copy->base.fb)
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drm_framebuffer_reference(copy->base.fb);
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__drm_atomic_helper_plane_duplicate_state(plane, ©->base);
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copy->tiling = state->tiling;
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copy->format = state->format;
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copy->swap = state->swap;
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return ©->base;
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}
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@ -456,9 +458,7 @@ static struct drm_plane_state *tegra_plane_atomic_duplicate_state(struct drm_pla
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static void tegra_plane_atomic_destroy_state(struct drm_plane *plane,
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struct drm_plane_state *state)
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{
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if (state->fb)
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drm_framebuffer_unreference(state->fb);
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__drm_atomic_helper_plane_destroy_state(plane, state);
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kfree(state);
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}
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@ -908,6 +908,15 @@ static int tegra_dc_add_planes(struct drm_device *drm, struct tegra_dc *dc)
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return 0;
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}
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u32 tegra_dc_get_vblank_counter(struct tegra_dc *dc)
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{
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if (dc->syncpt)
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return host1x_syncpt_read(dc->syncpt);
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/* fallback to software emulated VBLANK counter */
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return drm_crtc_vblank_count(&dc->base);
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}
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void tegra_dc_enable_vblank(struct tegra_dc *dc)
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{
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unsigned long value, flags;
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@ -995,6 +1004,9 @@ static void tegra_crtc_reset(struct drm_crtc *crtc)
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{
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struct tegra_dc_state *state;
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if (crtc->state)
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__drm_atomic_helper_crtc_destroy_state(crtc, crtc->state);
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kfree(crtc->state);
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crtc->state = NULL;
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@ -1011,14 +1023,15 @@ tegra_crtc_atomic_duplicate_state(struct drm_crtc *crtc)
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struct tegra_dc_state *state = to_dc_state(crtc->state);
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struct tegra_dc_state *copy;
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copy = kmemdup(state, sizeof(*state), GFP_KERNEL);
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copy = kmalloc(sizeof(*copy), GFP_KERNEL);
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if (!copy)
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return NULL;
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copy->base.mode_changed = false;
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copy->base.active_changed = false;
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copy->base.planes_changed = false;
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copy->base.event = NULL;
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__drm_atomic_helper_crtc_duplicate_state(crtc, ©->base);
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copy->clk = state->clk;
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copy->pclk = state->pclk;
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copy->div = state->div;
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copy->planes = state->planes;
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return ©->base;
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}
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@ -1026,6 +1039,7 @@ tegra_crtc_atomic_duplicate_state(struct drm_crtc *crtc)
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static void tegra_crtc_atomic_destroy_state(struct drm_crtc *crtc,
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struct drm_crtc_state *state)
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{
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__drm_atomic_helper_crtc_destroy_state(crtc, state);
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kfree(state);
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}
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@ -1152,26 +1166,18 @@ static int tegra_dc_set_timings(struct tegra_dc *dc,
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return 0;
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}
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int tegra_dc_setup_clock(struct tegra_dc *dc, struct clk *parent,
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unsigned long pclk, unsigned int div)
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{
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u32 value;
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int err;
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err = clk_set_parent(dc->clk, parent);
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if (err < 0) {
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dev_err(dc->dev, "failed to set parent clock: %d\n", err);
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return err;
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}
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DRM_DEBUG_KMS("rate: %lu, div: %u\n", clk_get_rate(dc->clk), div);
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value = SHIFT_CLK_DIVIDER(div) | PIXEL_CLK_DIVIDER_PCD1;
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tegra_dc_writel(dc, value, DC_DISP_DISP_CLOCK_CONTROL);
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return 0;
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}
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/**
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* tegra_dc_state_setup_clock - check clock settings and store them in atomic
|
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* state
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* @dc: display controller
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* @crtc_state: CRTC atomic state
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* @clk: parent clock for display controller
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* @pclk: pixel clock
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* @div: shift clock divider
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*
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* Returns:
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* 0 on success or a negative error-code on failure.
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*/
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int tegra_dc_state_setup_clock(struct tegra_dc *dc,
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struct drm_crtc_state *crtc_state,
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struct clk *clk, unsigned long pclk,
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@ -1179,6 +1185,9 @@ int tegra_dc_state_setup_clock(struct tegra_dc *dc,
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{
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struct tegra_dc_state *state = to_dc_state(crtc_state);
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if (!clk_has_parent(dc->clk, clk))
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return -EINVAL;
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state->clk = clk;
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state->pclk = pclk;
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state->div = div;
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|
@ -1294,9 +1303,7 @@ static void tegra_crtc_atomic_flush(struct drm_crtc *crtc)
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static const struct drm_crtc_helper_funcs tegra_crtc_helper_funcs = {
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.disable = tegra_crtc_disable,
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.mode_fixup = tegra_crtc_mode_fixup,
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.mode_set = drm_helper_crtc_mode_set,
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.mode_set_nofb = tegra_crtc_mode_set_nofb,
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.mode_set_base = drm_helper_crtc_mode_set_base,
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.prepare = tegra_crtc_prepare,
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.commit = tegra_crtc_commit,
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.atomic_check = tegra_crtc_atomic_check,
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||||
|
|
@ -1631,7 +1638,6 @@ static int tegra_dc_init(struct host1x_client *client)
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struct tegra_drm *tegra = drm->dev_private;
|
||||
struct drm_plane *primary = NULL;
|
||||
struct drm_plane *cursor = NULL;
|
||||
unsigned int syncpt;
|
||||
u32 value;
|
||||
int err;
|
||||
|
||||
|
|
@ -1700,13 +1706,15 @@ static int tegra_dc_init(struct host1x_client *client)
|
|||
}
|
||||
|
||||
/* initialize display controller */
|
||||
if (dc->pipe)
|
||||
syncpt = SYNCPT_VBLANK1;
|
||||
else
|
||||
syncpt = SYNCPT_VBLANK0;
|
||||
if (dc->syncpt) {
|
||||
u32 syncpt = host1x_syncpt_id(dc->syncpt);
|
||||
|
||||
tegra_dc_writel(dc, 0x00000100, DC_CMD_GENERAL_INCR_SYNCPT_CNTRL);
|
||||
tegra_dc_writel(dc, 0x100 | syncpt, DC_CMD_CONT_SYNCPT_VSYNC);
|
||||
value = SYNCPT_CNTRL_NO_STALL;
|
||||
tegra_dc_writel(dc, value, DC_CMD_GENERAL_INCR_SYNCPT_CNTRL);
|
||||
|
||||
value = SYNCPT_VSYNC_ENABLE | syncpt;
|
||||
tegra_dc_writel(dc, value, DC_CMD_CONT_SYNCPT_VSYNC);
|
||||
}
|
||||
|
||||
value = WIN_A_UF_INT | WIN_B_UF_INT | WIN_C_UF_INT | WIN_A_OF_INT;
|
||||
tegra_dc_writel(dc, value, DC_CMD_INT_TYPE);
|
||||
|
|
@ -1874,6 +1882,7 @@ static int tegra_dc_parse_dt(struct tegra_dc *dc)
|
|||
|
||||
static int tegra_dc_probe(struct platform_device *pdev)
|
||||
{
|
||||
unsigned long flags = HOST1X_SYNCPT_CLIENT_MANAGED;
|
||||
const struct of_device_id *id;
|
||||
struct resource *regs;
|
||||
struct tegra_dc *dc;
|
||||
|
|
@ -1965,6 +1974,10 @@ static int tegra_dc_probe(struct platform_device *pdev)
|
|||
return err;
|
||||
}
|
||||
|
||||
dc->syncpt = host1x_syncpt_request(&pdev->dev, flags);
|
||||
if (!dc->syncpt)
|
||||
dev_warn(&pdev->dev, "failed to allocate syncpoint\n");
|
||||
|
||||
platform_set_drvdata(pdev, dc);
|
||||
|
||||
return 0;
|
||||
|
|
@ -1975,6 +1988,8 @@ static int tegra_dc_remove(struct platform_device *pdev)
|
|||
struct tegra_dc *dc = platform_get_drvdata(pdev);
|
||||
int err;
|
||||
|
||||
host1x_syncpt_free(dc->syncpt);
|
||||
|
||||
err = host1x_client_unregister(&dc->client);
|
||||
if (err < 0) {
|
||||
dev_err(&pdev->dev, "failed to unregister host1x client: %d\n",
|
||||
|
|
|
|||
|
|
@ -12,6 +12,8 @@
|
|||
|
||||
#define DC_CMD_GENERAL_INCR_SYNCPT 0x000
|
||||
#define DC_CMD_GENERAL_INCR_SYNCPT_CNTRL 0x001
|
||||
#define SYNCPT_CNTRL_NO_STALL (1 << 8)
|
||||
#define SYNCPT_CNTRL_SOFT_RESET (1 << 0)
|
||||
#define DC_CMD_GENERAL_INCR_SYNCPT_ERROR 0x002
|
||||
#define DC_CMD_WIN_A_INCR_SYNCPT 0x008
|
||||
#define DC_CMD_WIN_A_INCR_SYNCPT_CNTRL 0x009
|
||||
|
|
@ -23,6 +25,7 @@
|
|||
#define DC_CMD_WIN_C_INCR_SYNCPT_CNTRL 0x019
|
||||
#define DC_CMD_WIN_C_INCR_SYNCPT_ERROR 0x01a
|
||||
#define DC_CMD_CONT_SYNCPT_VSYNC 0x028
|
||||
#define SYNCPT_VSYNC_ENABLE (1 << 8)
|
||||
#define DC_CMD_DISPLAY_COMMAND_OPTION0 0x031
|
||||
#define DC_CMD_DISPLAY_COMMAND 0x032
|
||||
#define DISP_CTRL_MODE_STOP (0 << 5)
|
||||
|
|
@ -438,8 +441,4 @@
|
|||
#define DC_WINBUF_BD_UFLOW_STATUS 0xdca
|
||||
#define DC_WINBUF_CD_UFLOW_STATUS 0xfca
|
||||
|
||||
/* synchronization points */
|
||||
#define SYNCPT_VBLANK0 26
|
||||
#define SYNCPT_VBLANK1 27
|
||||
|
||||
#endif /* TEGRA_DC_H */
|
||||
|
|
|
|||
|
|
@ -172,6 +172,10 @@ static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
|
|||
*/
|
||||
drm->irq_enabled = true;
|
||||
|
||||
/* syncpoints are used for full 32-bit hardware VBLANK counters */
|
||||
drm->vblank_disable_immediate = true;
|
||||
drm->max_vblank_count = 0xffffffff;
|
||||
|
||||
err = drm_vblank_init(drm, drm->mode_config.num_crtc);
|
||||
if (err < 0)
|
||||
goto device;
|
||||
|
|
@ -813,12 +817,12 @@ static struct drm_crtc *tegra_crtc_from_pipe(struct drm_device *drm,
|
|||
static u32 tegra_drm_get_vblank_counter(struct drm_device *drm, int pipe)
|
||||
{
|
||||
struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
|
||||
struct tegra_dc *dc = to_tegra_dc(crtc);
|
||||
|
||||
if (!crtc)
|
||||
return 0;
|
||||
|
||||
/* TODO: implement real hardware counter using syncpoints */
|
||||
return drm_crtc_vblank_count(crtc);
|
||||
return tegra_dc_get_vblank_counter(dc);
|
||||
}
|
||||
|
||||
static int tegra_drm_enable_vblank(struct drm_device *drm, int pipe)
|
||||
|
|
@ -879,8 +883,18 @@ static int tegra_debugfs_framebuffers(struct seq_file *s, void *data)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int tegra_debugfs_iova(struct seq_file *s, void *data)
|
||||
{
|
||||
struct drm_info_node *node = (struct drm_info_node *)s->private;
|
||||
struct drm_device *drm = node->minor->dev;
|
||||
struct tegra_drm *tegra = drm->dev_private;
|
||||
|
||||
return drm_mm_dump_table(s, &tegra->mm);
|
||||
}
|
||||
|
||||
static struct drm_info_list tegra_debugfs_list[] = {
|
||||
{ "framebuffers", tegra_debugfs_framebuffers, 0 },
|
||||
{ "iova", tegra_debugfs_iova, 0 },
|
||||
};
|
||||
|
||||
static int tegra_debugfs_init(struct drm_minor *minor)
|
||||
|
|
|
|||
|
|
@ -106,6 +106,7 @@ struct tegra_output;
|
|||
|
||||
struct tegra_dc {
|
||||
struct host1x_client client;
|
||||
struct host1x_syncpt *syncpt;
|
||||
struct device *dev;
|
||||
spinlock_t lock;
|
||||
|
||||
|
|
@ -180,12 +181,11 @@ struct tegra_dc_window {
|
|||
};
|
||||
|
||||
/* from dc.c */
|
||||
u32 tegra_dc_get_vblank_counter(struct tegra_dc *dc);
|
||||
void tegra_dc_enable_vblank(struct tegra_dc *dc);
|
||||
void tegra_dc_disable_vblank(struct tegra_dc *dc);
|
||||
void tegra_dc_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file);
|
||||
void tegra_dc_commit(struct tegra_dc *dc);
|
||||
int tegra_dc_setup_clock(struct tegra_dc *dc, struct clk *parent,
|
||||
unsigned long pclk, unsigned int div);
|
||||
int tegra_dc_state_setup_clock(struct tegra_dc *dc,
|
||||
struct drm_crtc_state *crtc_state,
|
||||
struct clk *clk, unsigned long pclk,
|
||||
|
|
|
|||
|
|
@ -952,7 +952,7 @@ static void tegra_hdmi_encoder_mode_set(struct drm_encoder *encoder,
|
|||
}
|
||||
|
||||
tegra_hdmi_writel(hdmi,
|
||||
SOR_SEQ_CTL_PU_PC(0) |
|
||||
SOR_SEQ_PU_PC(0) |
|
||||
SOR_SEQ_PU_PC_ALT(0) |
|
||||
SOR_SEQ_PD_PC(8) |
|
||||
SOR_SEQ_PD_PC_ALT(8),
|
||||
|
|
@ -1394,8 +1394,8 @@ static int tegra_hdmi_exit(struct host1x_client *client)
|
|||
|
||||
tegra_output_exit(&hdmi->output);
|
||||
|
||||
clk_disable_unprepare(hdmi->clk);
|
||||
reset_control_assert(hdmi->rst);
|
||||
clk_disable_unprepare(hdmi->clk);
|
||||
|
||||
regulator_disable(hdmi->vdd);
|
||||
regulator_disable(hdmi->pll);
|
||||
|
|
|
|||
|
|
@ -201,7 +201,7 @@
|
|||
#define HDMI_NV_PDISP_SOR_CRCB 0x5d
|
||||
#define HDMI_NV_PDISP_SOR_BLANK 0x5e
|
||||
#define HDMI_NV_PDISP_SOR_SEQ_CTL 0x5f
|
||||
#define SOR_SEQ_CTL_PU_PC(x) (((x) & 0xf) << 0)
|
||||
#define SOR_SEQ_PU_PC(x) (((x) & 0xf) << 0)
|
||||
#define SOR_SEQ_PU_PC_ALT(x) (((x) & 0xf) << 4)
|
||||
#define SOR_SEQ_PD_PC(x) (((x) & 0xf) << 8)
|
||||
#define SOR_SEQ_PD_PC_ALT(x) (((x) & 0xf) << 12)
|
||||
|
|
|
|||
|
|
@ -41,6 +41,8 @@ struct tegra_sor {
|
|||
struct mutex lock;
|
||||
bool enabled;
|
||||
|
||||
struct drm_info_list *debugfs_files;
|
||||
struct drm_minor *minor;
|
||||
struct dentry *debugfs;
|
||||
};
|
||||
|
||||
|
|
@ -68,13 +70,12 @@ static inline struct tegra_sor *to_sor(struct tegra_output *output)
|
|||
return container_of(output, struct tegra_sor, output);
|
||||
}
|
||||
|
||||
static inline unsigned long tegra_sor_readl(struct tegra_sor *sor,
|
||||
unsigned long offset)
|
||||
static inline u32 tegra_sor_readl(struct tegra_sor *sor, unsigned long offset)
|
||||
{
|
||||
return readl(sor->regs + (offset << 2));
|
||||
}
|
||||
|
||||
static inline void tegra_sor_writel(struct tegra_sor *sor, unsigned long value,
|
||||
static inline void tegra_sor_writel(struct tegra_sor *sor, u32 value,
|
||||
unsigned long offset)
|
||||
{
|
||||
writel(value, sor->regs + (offset << 2));
|
||||
|
|
@ -83,9 +84,9 @@ static inline void tegra_sor_writel(struct tegra_sor *sor, unsigned long value,
|
|||
static int tegra_sor_dp_train_fast(struct tegra_sor *sor,
|
||||
struct drm_dp_link *link)
|
||||
{
|
||||
unsigned long value;
|
||||
unsigned int i;
|
||||
u8 pattern;
|
||||
u32 value;
|
||||
int err;
|
||||
|
||||
/* setup lane parameters */
|
||||
|
|
@ -202,7 +203,7 @@ static void tegra_sor_update(struct tegra_sor *sor)
|
|||
|
||||
static int tegra_sor_setup_pwm(struct tegra_sor *sor, unsigned long timeout)
|
||||
{
|
||||
unsigned long value;
|
||||
u32 value;
|
||||
|
||||
value = tegra_sor_readl(sor, SOR_PWM_DIV);
|
||||
value &= ~SOR_PWM_DIV_MASK;
|
||||
|
|
@ -281,7 +282,7 @@ static int tegra_sor_wakeup(struct tegra_sor *sor)
|
|||
|
||||
static int tegra_sor_power_up(struct tegra_sor *sor, unsigned long timeout)
|
||||
{
|
||||
unsigned long value;
|
||||
u32 value;
|
||||
|
||||
value = tegra_sor_readl(sor, SOR_PWR);
|
||||
value |= SOR_PWR_TRIGGER | SOR_PWR_NORMAL_STATE_PU;
|
||||
|
|
@ -674,38 +675,195 @@ static const struct file_operations tegra_sor_crc_fops = {
|
|||
.release = tegra_sor_crc_release,
|
||||
};
|
||||
|
||||
static int tegra_sor_show_regs(struct seq_file *s, void *data)
|
||||
{
|
||||
struct drm_info_node *node = s->private;
|
||||
struct tegra_sor *sor = node->info_ent->data;
|
||||
|
||||
#define DUMP_REG(name) \
|
||||
seq_printf(s, "%-38s %#05x %08x\n", #name, name, \
|
||||
tegra_sor_readl(sor, name))
|
||||
|
||||
DUMP_REG(SOR_CTXSW);
|
||||
DUMP_REG(SOR_SUPER_STATE_0);
|
||||
DUMP_REG(SOR_SUPER_STATE_1);
|
||||
DUMP_REG(SOR_STATE_0);
|
||||
DUMP_REG(SOR_STATE_1);
|
||||
DUMP_REG(SOR_HEAD_STATE_0(0));
|
||||
DUMP_REG(SOR_HEAD_STATE_0(1));
|
||||
DUMP_REG(SOR_HEAD_STATE_1(0));
|
||||
DUMP_REG(SOR_HEAD_STATE_1(1));
|
||||
DUMP_REG(SOR_HEAD_STATE_2(0));
|
||||
DUMP_REG(SOR_HEAD_STATE_2(1));
|
||||
DUMP_REG(SOR_HEAD_STATE_3(0));
|
||||
DUMP_REG(SOR_HEAD_STATE_3(1));
|
||||
DUMP_REG(SOR_HEAD_STATE_4(0));
|
||||
DUMP_REG(SOR_HEAD_STATE_4(1));
|
||||
DUMP_REG(SOR_HEAD_STATE_5(0));
|
||||
DUMP_REG(SOR_HEAD_STATE_5(1));
|
||||
DUMP_REG(SOR_CRC_CNTRL);
|
||||
DUMP_REG(SOR_DP_DEBUG_MVID);
|
||||
DUMP_REG(SOR_CLK_CNTRL);
|
||||
DUMP_REG(SOR_CAP);
|
||||
DUMP_REG(SOR_PWR);
|
||||
DUMP_REG(SOR_TEST);
|
||||
DUMP_REG(SOR_PLL_0);
|
||||
DUMP_REG(SOR_PLL_1);
|
||||
DUMP_REG(SOR_PLL_2);
|
||||
DUMP_REG(SOR_PLL_3);
|
||||
DUMP_REG(SOR_CSTM);
|
||||
DUMP_REG(SOR_LVDS);
|
||||
DUMP_REG(SOR_CRC_A);
|
||||
DUMP_REG(SOR_CRC_B);
|
||||
DUMP_REG(SOR_BLANK);
|
||||
DUMP_REG(SOR_SEQ_CTL);
|
||||
DUMP_REG(SOR_LANE_SEQ_CTL);
|
||||
DUMP_REG(SOR_SEQ_INST(0));
|
||||
DUMP_REG(SOR_SEQ_INST(1));
|
||||
DUMP_REG(SOR_SEQ_INST(2));
|
||||
DUMP_REG(SOR_SEQ_INST(3));
|
||||
DUMP_REG(SOR_SEQ_INST(4));
|
||||
DUMP_REG(SOR_SEQ_INST(5));
|
||||
DUMP_REG(SOR_SEQ_INST(6));
|
||||
DUMP_REG(SOR_SEQ_INST(7));
|
||||
DUMP_REG(SOR_SEQ_INST(8));
|
||||
DUMP_REG(SOR_SEQ_INST(9));
|
||||
DUMP_REG(SOR_SEQ_INST(10));
|
||||
DUMP_REG(SOR_SEQ_INST(11));
|
||||
DUMP_REG(SOR_SEQ_INST(12));
|
||||
DUMP_REG(SOR_SEQ_INST(13));
|
||||
DUMP_REG(SOR_SEQ_INST(14));
|
||||
DUMP_REG(SOR_SEQ_INST(15));
|
||||
DUMP_REG(SOR_PWM_DIV);
|
||||
DUMP_REG(SOR_PWM_CTL);
|
||||
DUMP_REG(SOR_VCRC_A_0);
|
||||
DUMP_REG(SOR_VCRC_A_1);
|
||||
DUMP_REG(SOR_VCRC_B_0);
|
||||
DUMP_REG(SOR_VCRC_B_1);
|
||||
DUMP_REG(SOR_CCRC_A_0);
|
||||
DUMP_REG(SOR_CCRC_A_1);
|
||||
DUMP_REG(SOR_CCRC_B_0);
|
||||
DUMP_REG(SOR_CCRC_B_1);
|
||||
DUMP_REG(SOR_EDATA_A_0);
|
||||
DUMP_REG(SOR_EDATA_A_1);
|
||||
DUMP_REG(SOR_EDATA_B_0);
|
||||
DUMP_REG(SOR_EDATA_B_1);
|
||||
DUMP_REG(SOR_COUNT_A_0);
|
||||
DUMP_REG(SOR_COUNT_A_1);
|
||||
DUMP_REG(SOR_COUNT_B_0);
|
||||
DUMP_REG(SOR_COUNT_B_1);
|
||||
DUMP_REG(SOR_DEBUG_A_0);
|
||||
DUMP_REG(SOR_DEBUG_A_1);
|
||||
DUMP_REG(SOR_DEBUG_B_0);
|
||||
DUMP_REG(SOR_DEBUG_B_1);
|
||||
DUMP_REG(SOR_TRIG);
|
||||
DUMP_REG(SOR_MSCHECK);
|
||||
DUMP_REG(SOR_XBAR_CTRL);
|
||||
DUMP_REG(SOR_XBAR_POL);
|
||||
DUMP_REG(SOR_DP_LINKCTL_0);
|
||||
DUMP_REG(SOR_DP_LINKCTL_1);
|
||||
DUMP_REG(SOR_LANE_DRIVE_CURRENT_0);
|
||||
DUMP_REG(SOR_LANE_DRIVE_CURRENT_1);
|
||||
DUMP_REG(SOR_LANE4_DRIVE_CURRENT_0);
|
||||
DUMP_REG(SOR_LANE4_DRIVE_CURRENT_1);
|
||||
DUMP_REG(SOR_LANE_PREEMPHASIS_0);
|
||||
DUMP_REG(SOR_LANE_PREEMPHASIS_1);
|
||||
DUMP_REG(SOR_LANE4_PREEMPHASIS_0);
|
||||
DUMP_REG(SOR_LANE4_PREEMPHASIS_1);
|
||||
DUMP_REG(SOR_LANE_POST_CURSOR_0);
|
||||
DUMP_REG(SOR_LANE_POST_CURSOR_1);
|
||||
DUMP_REG(SOR_DP_CONFIG_0);
|
||||
DUMP_REG(SOR_DP_CONFIG_1);
|
||||
DUMP_REG(SOR_DP_MN_0);
|
||||
DUMP_REG(SOR_DP_MN_1);
|
||||
DUMP_REG(SOR_DP_PADCTL_0);
|
||||
DUMP_REG(SOR_DP_PADCTL_1);
|
||||
DUMP_REG(SOR_DP_DEBUG_0);
|
||||
DUMP_REG(SOR_DP_DEBUG_1);
|
||||
DUMP_REG(SOR_DP_SPARE_0);
|
||||
DUMP_REG(SOR_DP_SPARE_1);
|
||||
DUMP_REG(SOR_DP_AUDIO_CTRL);
|
||||
DUMP_REG(SOR_DP_AUDIO_HBLANK_SYMBOLS);
|
||||
DUMP_REG(SOR_DP_AUDIO_VBLANK_SYMBOLS);
|
||||
DUMP_REG(SOR_DP_GENERIC_INFOFRAME_HEADER);
|
||||
DUMP_REG(SOR_DP_GENERIC_INFOFRAME_SUBPACK_0);
|
||||
DUMP_REG(SOR_DP_GENERIC_INFOFRAME_SUBPACK_1);
|
||||
DUMP_REG(SOR_DP_GENERIC_INFOFRAME_SUBPACK_2);
|
||||
DUMP_REG(SOR_DP_GENERIC_INFOFRAME_SUBPACK_3);
|
||||
DUMP_REG(SOR_DP_GENERIC_INFOFRAME_SUBPACK_4);
|
||||
DUMP_REG(SOR_DP_GENERIC_INFOFRAME_SUBPACK_5);
|
||||
DUMP_REG(SOR_DP_GENERIC_INFOFRAME_SUBPACK_6);
|
||||
DUMP_REG(SOR_DP_TPG);
|
||||
DUMP_REG(SOR_DP_TPG_CONFIG);
|
||||
DUMP_REG(SOR_DP_LQ_CSTM_0);
|
||||
DUMP_REG(SOR_DP_LQ_CSTM_1);
|
||||
DUMP_REG(SOR_DP_LQ_CSTM_2);
|
||||
|
||||
#undef DUMP_REG
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct drm_info_list debugfs_files[] = {
|
||||
{ "regs", tegra_sor_show_regs, 0, NULL },
|
||||
};
|
||||
|
||||
static int tegra_sor_debugfs_init(struct tegra_sor *sor,
|
||||
struct drm_minor *minor)
|
||||
{
|
||||
struct dentry *entry;
|
||||
unsigned int i;
|
||||
int err = 0;
|
||||
|
||||
sor->debugfs = debugfs_create_dir("sor", minor->debugfs_root);
|
||||
if (!sor->debugfs)
|
||||
return -ENOMEM;
|
||||
|
||||
entry = debugfs_create_file("crc", 0644, sor->debugfs, sor,
|
||||
&tegra_sor_crc_fops);
|
||||
if (!entry) {
|
||||
dev_err(sor->dev,
|
||||
"cannot create /sys/kernel/debug/dri/%s/sor/crc\n",
|
||||
minor->debugfs_root->d_name.name);
|
||||
sor->debugfs_files = kmemdup(debugfs_files, sizeof(debugfs_files),
|
||||
GFP_KERNEL);
|
||||
if (!sor->debugfs_files) {
|
||||
err = -ENOMEM;
|
||||
goto remove;
|
||||
}
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(debugfs_files); i++)
|
||||
sor->debugfs_files[i].data = sor;
|
||||
|
||||
err = drm_debugfs_create_files(sor->debugfs_files,
|
||||
ARRAY_SIZE(debugfs_files),
|
||||
sor->debugfs, minor);
|
||||
if (err < 0)
|
||||
goto free;
|
||||
|
||||
entry = debugfs_create_file("crc", 0644, sor->debugfs, sor,
|
||||
&tegra_sor_crc_fops);
|
||||
if (!entry) {
|
||||
err = -ENOMEM;
|
||||
goto free;
|
||||
}
|
||||
|
||||
return err;
|
||||
|
||||
free:
|
||||
kfree(sor->debugfs_files);
|
||||
sor->debugfs_files = NULL;
|
||||
remove:
|
||||
debugfs_remove(sor->debugfs);
|
||||
debugfs_remove_recursive(sor->debugfs);
|
||||
sor->debugfs = NULL;
|
||||
return err;
|
||||
}
|
||||
|
||||
static void tegra_sor_debugfs_exit(struct tegra_sor *sor)
|
||||
{
|
||||
debugfs_remove_recursive(sor->debugfs);
|
||||
drm_debugfs_remove_files(sor->debugfs_files, ARRAY_SIZE(debugfs_files),
|
||||
sor->minor);
|
||||
sor->minor = NULL;
|
||||
|
||||
kfree(sor->debugfs_files);
|
||||
sor->debugfs = NULL;
|
||||
|
||||
debugfs_remove_recursive(sor->debugfs);
|
||||
sor->debugfs_files = NULL;
|
||||
}
|
||||
|
||||
static void tegra_sor_connector_dpms(struct drm_connector *connector, int mode)
|
||||
|
|
@ -791,8 +949,8 @@ static void tegra_sor_encoder_mode_set(struct drm_encoder *encoder,
|
|||
struct tegra_sor_config config;
|
||||
struct drm_dp_link link;
|
||||
struct drm_dp_aux *aux;
|
||||
unsigned long value;
|
||||
int err = 0;
|
||||
u32 value;
|
||||
|
||||
mutex_lock(&sor->lock);
|
||||
|
||||
|
|
@ -1354,12 +1512,30 @@ static int tegra_sor_init(struct host1x_client *client)
|
|||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* XXX: Remove this reset once proper hand-over from firmware to
|
||||
* kernel is possible.
|
||||
*/
|
||||
err = reset_control_assert(sor->rst);
|
||||
if (err < 0) {
|
||||
dev_err(sor->dev, "failed to assert SOR reset: %d\n", err);
|
||||
return err;
|
||||
}
|
||||
|
||||
err = clk_prepare_enable(sor->clk);
|
||||
if (err < 0) {
|
||||
dev_err(sor->dev, "failed to enable clock: %d\n", err);
|
||||
return err;
|
||||
}
|
||||
|
||||
usleep_range(1000, 3000);
|
||||
|
||||
err = reset_control_deassert(sor->rst);
|
||||
if (err < 0) {
|
||||
dev_err(sor->dev, "failed to deassert SOR reset: %d\n", err);
|
||||
return err;
|
||||
}
|
||||
|
||||
err = clk_prepare_enable(sor->clk_safe);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
|
|
|||
|
|
@ -425,6 +425,12 @@ u32 host1x_syncpt_read_min(struct host1x_syncpt *sp)
|
|||
}
|
||||
EXPORT_SYMBOL(host1x_syncpt_read_min);
|
||||
|
||||
u32 host1x_syncpt_read(struct host1x_syncpt *sp)
|
||||
{
|
||||
return host1x_syncpt_load(sp);
|
||||
}
|
||||
EXPORT_SYMBOL(host1x_syncpt_read);
|
||||
|
||||
int host1x_syncpt_nb_pts(struct host1x *host)
|
||||
{
|
||||
return host->info->nb_pts;
|
||||
|
|
|
|||
|
|
@ -87,20 +87,34 @@ void drm_atomic_helper_connector_dpms(struct drm_connector *connector,
|
|||
|
||||
/* default implementations for state handling */
|
||||
void drm_atomic_helper_crtc_reset(struct drm_crtc *crtc);
|
||||
void __drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc,
|
||||
struct drm_crtc_state *state);
|
||||
struct drm_crtc_state *
|
||||
drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc);
|
||||
void __drm_atomic_helper_crtc_destroy_state(struct drm_crtc *crtc,
|
||||
struct drm_crtc_state *state);
|
||||
void drm_atomic_helper_crtc_destroy_state(struct drm_crtc *crtc,
|
||||
struct drm_crtc_state *state);
|
||||
|
||||
void drm_atomic_helper_plane_reset(struct drm_plane *plane);
|
||||
void __drm_atomic_helper_plane_duplicate_state(struct drm_plane *plane,
|
||||
struct drm_plane_state *state);
|
||||
struct drm_plane_state *
|
||||
drm_atomic_helper_plane_duplicate_state(struct drm_plane *plane);
|
||||
void __drm_atomic_helper_plane_destroy_state(struct drm_plane *plane,
|
||||
struct drm_plane_state *state);
|
||||
void drm_atomic_helper_plane_destroy_state(struct drm_plane *plane,
|
||||
struct drm_plane_state *state);
|
||||
|
||||
void drm_atomic_helper_connector_reset(struct drm_connector *connector);
|
||||
void
|
||||
__drm_atomic_helper_connector_duplicate_state(struct drm_connector *connector,
|
||||
struct drm_connector_state *state);
|
||||
struct drm_connector_state *
|
||||
drm_atomic_helper_connector_duplicate_state(struct drm_connector *connector);
|
||||
void
|
||||
__drm_atomic_helper_connector_destroy_state(struct drm_connector *connector,
|
||||
struct drm_connector_state *state);
|
||||
void drm_atomic_helper_connector_destroy_state(struct drm_connector *connector,
|
||||
struct drm_connector_state *state);
|
||||
|
||||
|
|
|
|||
|
|
@ -135,6 +135,7 @@ struct host1x_syncpt *host1x_syncpt_get(struct host1x *host, u32 id);
|
|||
u32 host1x_syncpt_id(struct host1x_syncpt *sp);
|
||||
u32 host1x_syncpt_read_min(struct host1x_syncpt *sp);
|
||||
u32 host1x_syncpt_read_max(struct host1x_syncpt *sp);
|
||||
u32 host1x_syncpt_read(struct host1x_syncpt *sp);
|
||||
int host1x_syncpt_incr(struct host1x_syncpt *sp);
|
||||
u32 host1x_syncpt_incr_max(struct host1x_syncpt *sp, u32 incrs);
|
||||
int host1x_syncpt_wait(struct host1x_syncpt *sp, u32 thresh, long timeout,
|
||||
|
|
|
|||
|
|
@ -36,7 +36,8 @@ struct drm_tegra_gem_create {
|
|||
|
||||
struct drm_tegra_gem_mmap {
|
||||
__u32 handle;
|
||||
__u32 offset;
|
||||
__u32 pad;
|
||||
__u64 offset;
|
||||
};
|
||||
|
||||
struct drm_tegra_syncpt_read {
|
||||
|
|
|
|||
Загрузка…
Ссылка в новой задаче