[S390] 31 bit entry.S update.
Make the code in the 31 bit entry.S code as similar as possible to the 64 bit version in entry64.S. That makes it easier to add new code to the first level interrupt handler that affects both 31 and 64 bit kernels. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
This commit is contained in:
Martin Schwidefsky
Martin Schwidefsky
Родитель
ce322ccd53
Коммит
1de3447a41
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@ -9,7 +9,6 @@
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* Heiko Carstens <heiko.carstens@de.ibm.com>
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*/
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#include <linux/sys.h>
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <asm/cache.h>
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@ -110,31 +109,36 @@ STACK_SIZE = 1 << STACK_SHIFT
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1: stm %r10,%r11,\lc_sum
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.endm
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.macro SAVE_ALL_SVC psworg,savearea
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stm %r12,%r15,\savearea
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l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13
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l %r15,__LC_KERNEL_STACK # problem state -> load ksp
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s %r15,BASED(.Lc_spsize) # make room for registers & psw
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.endm
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.macro SAVE_ALL_BASE savearea
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stm %r12,%r15,\savearea
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l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13
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.endm
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.macro SAVE_ALL_SVC psworg,savearea
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la %r12,\psworg
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l %r15,__LC_KERNEL_STACK # problem state -> load ksp
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.endm
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.macro SAVE_ALL_SYNC psworg,savearea
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la %r12,\psworg
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.macro SAVE_ALL_PGM psworg,savearea
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tm \psworg+1,0x01 # test problem state bit
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bz BASED(2f) # skip stack setup save
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l %r15,__LC_KERNEL_STACK # problem state -> load ksp
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#ifdef CONFIG_CHECK_STACK
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b BASED(3f)
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2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
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bz BASED(stack_overflow)
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3:
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bnz BASED(1f)
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tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
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bnz BASED(2f)
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la %r12,\psworg
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b BASED(stack_overflow)
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#else
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bz BASED(2f)
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#endif
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2:
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1: l %r15,__LC_KERNEL_STACK # problem state -> load ksp
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2: s %r15,BASED(.Lc_spsize) # make room for registers & psw
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.endm
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.macro SAVE_ALL_ASYNC psworg,savearea
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stm %r12,%r15,\savearea
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l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13
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la %r12,\psworg
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tm \psworg+1,0x01 # test problem state bit
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bnz BASED(1f) # from user -> load async stack
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@ -149,27 +153,23 @@ STACK_SIZE = 1 << STACK_SHIFT
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0: l %r14,__LC_ASYNC_STACK # are we already on the async stack ?
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slr %r14,%r15
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sra %r14,STACK_SHIFT
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be BASED(2f)
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1: l %r15,__LC_ASYNC_STACK
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#ifdef CONFIG_CHECK_STACK
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b BASED(3f)
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2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
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bz BASED(stack_overflow)
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3:
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bnz BASED(1f)
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tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
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bnz BASED(2f)
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b BASED(stack_overflow)
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#else
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bz BASED(2f)
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#endif
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2:
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1: l %r15,__LC_ASYNC_STACK
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2: s %r15,BASED(.Lc_spsize) # make room for registers & psw
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.endm
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.macro CREATE_STACK_FRAME psworg,savearea
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s %r15,BASED(.Lc_spsize) # make room for registers & psw
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mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
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.macro CREATE_STACK_FRAME savearea
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xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
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st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
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icm %r12,12,__LC_SVC_ILC
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stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
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st %r12,SP_ILC(%r15)
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mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack
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la %r12,0
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st %r12,__SF_BACKCHAIN(%r15) # clear back chain
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stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
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.endm
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.macro RESTORE_ALL psworg,sync
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@ -237,10 +237,11 @@ __critical_start:
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system_call:
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stpt __LC_SYNC_ENTER_TIMER
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sysc_saveall:
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SAVE_ALL_BASE __LC_SAVE_AREA
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SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
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CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
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lh %r7,0x8a # get svc number from lowcore
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CREATE_STACK_FRAME __LC_SAVE_AREA
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mvc SP_PSW(8,%r15),__LC_SVC_OLD_PSW
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mvc SP_ILC(4,%r15),__LC_SVC_ILC
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l %r12,__LC_THREAD_INFO # load pointer to thread_info struct
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sysc_vtime:
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UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
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sysc_stime:
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@ -248,20 +249,20 @@ sysc_stime:
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sysc_update:
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mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
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sysc_do_svc:
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l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
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ltr %r7,%r7 # test for svc 0
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xr %r7,%r7
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icm %r7,3,SP_SVCNR(%r15) # load svc number and test for svc 0
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bnz BASED(sysc_nr_ok) # svc number > 0
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# svc 0: system call number in %r1
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cl %r1,BASED(.Lnr_syscalls)
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bnl BASED(sysc_nr_ok)
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sth %r1,SP_SVCNR(%r15)
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lr %r7,%r1 # copy svc number to %r7
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sysc_nr_ok:
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sth %r7,SP_SVCNR(%r15)
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sll %r7,2 # svc number *4
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l %r8,BASED(.Lsysc_table)
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tm __TI_flags+2(%r9),_TIF_SYSCALL
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l %r10,BASED(.Lsysc_table)
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tm __TI_flags+2(%r12),_TIF_SYSCALL
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mvc SP_ARGS(4,%r15),SP_R7(%r15)
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l %r8,0(%r7,%r8) # get system call addr.
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l %r8,0(%r7,%r10) # get system call addr.
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bnz BASED(sysc_tracesys)
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basr %r14,%r8 # call sys_xxxx
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st %r2,SP_R2(%r15) # store return value (change R2 on stack)
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@ -269,7 +270,7 @@ sysc_nr_ok:
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sysc_return:
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LOCKDEP_SYS_EXIT
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sysc_tif:
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tm __TI_flags+3(%r9),_TIF_WORK_SVC
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tm __TI_flags+3(%r12),_TIF_WORK_SVC
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bnz BASED(sysc_work) # there is work to do (signals etc.)
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sysc_restore:
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RESTORE_ALL __LC_RETURN_PSW,1
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@ -286,17 +287,17 @@ sysc_work:
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# One of the work bits is on. Find out which one.
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#
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sysc_work_tif:
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tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
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tm __TI_flags+3(%r12),_TIF_MCCK_PENDING
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bo BASED(sysc_mcck_pending)
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tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
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tm __TI_flags+3(%r12),_TIF_NEED_RESCHED
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bo BASED(sysc_reschedule)
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tm __TI_flags+3(%r9),_TIF_SIGPENDING
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tm __TI_flags+3(%r12),_TIF_SIGPENDING
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bo BASED(sysc_sigpending)
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tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME
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tm __TI_flags+3(%r12),_TIF_NOTIFY_RESUME
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bo BASED(sysc_notify_resume)
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tm __TI_flags+3(%r9),_TIF_RESTART_SVC
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tm __TI_flags+3(%r12),_TIF_RESTART_SVC
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bo BASED(sysc_restart)
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tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
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tm __TI_flags+3(%r12),_TIF_SINGLE_STEP
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bo BASED(sysc_singlestep)
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b BASED(sysc_return) # beware of critical section cleanup
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@ -320,13 +321,13 @@ sysc_mcck_pending:
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# _TIF_SIGPENDING is set, call do_signal
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#
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sysc_sigpending:
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ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
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ni __TI_flags+3(%r12),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
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la %r2,SP_PTREGS(%r15) # load pt_regs
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l %r1,BASED(.Ldo_signal)
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basr %r14,%r1 # call do_signal
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tm __TI_flags+3(%r9),_TIF_RESTART_SVC
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tm __TI_flags+3(%r12),_TIF_RESTART_SVC
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bo BASED(sysc_restart)
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tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
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tm __TI_flags+3(%r12),_TIF_SINGLE_STEP
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bo BASED(sysc_singlestep)
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b BASED(sysc_return)
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@ -344,19 +345,19 @@ sysc_notify_resume:
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# _TIF_RESTART_SVC is set, set up registers and restart svc
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#
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sysc_restart:
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ni __TI_flags+3(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
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ni __TI_flags+3(%r12),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
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l %r7,SP_R2(%r15) # load new svc number
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mvc SP_R2(4,%r15),SP_ORIG_R2(%r15) # restore first argument
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lm %r2,%r6,SP_R2(%r15) # load svc arguments
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sth %r7,SP_SVCNR(%r15)
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b BASED(sysc_nr_ok) # restart svc
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#
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# _TIF_SINGLE_STEP is set, call do_single_step
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#
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sysc_singlestep:
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ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
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mvi SP_SVCNR(%r15),0xff # set trap indication to pgm check
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mvi SP_SVCNR+1(%r15),0xff
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ni __TI_flags+3(%r12),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
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xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number
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la %r2,SP_PTREGS(%r15) # address of register-save area
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l %r1,BASED(.Lhandle_per) # load adr. of per handler
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la %r14,BASED(sysc_return) # load adr. of system return
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@ -370,15 +371,15 @@ sysc_tracesys:
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l %r1,BASED(.Ltrace_entry)
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la %r2,SP_PTREGS(%r15) # load pt_regs
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la %r3,0
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srl %r7,2
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st %r7,SP_R2(%r15)
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xr %r0,%r0
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icm %r0,3,SP_SVCNR(%r15)
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st %r0,SP_R2(%r15)
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basr %r14,%r1
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cl %r2,BASED(.Lnr_syscalls)
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bnl BASED(sysc_tracenogo)
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l %r8,BASED(.Lsysc_table)
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lr %r7,%r2
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sll %r7,2 # svc number *4
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l %r8,0(%r7,%r8)
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l %r8,0(%r7,%r10)
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sysc_tracego:
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lm %r3,%r6,SP_R3(%r15)
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mvc SP_ARGS(4,%r15),SP_R7(%r15)
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@ -386,7 +387,7 @@ sysc_tracego:
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basr %r14,%r8 # call sys_xxx
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st %r2,SP_R2(%r15) # store return value
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sysc_tracenogo:
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tm __TI_flags+2(%r9),_TIF_SYSCALL
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tm __TI_flags+2(%r12),_TIF_SYSCALL
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bz BASED(sysc_return)
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l %r1,BASED(.Ltrace_exit)
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la %r2,SP_PTREGS(%r15) # load pt_regs
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@ -399,7 +400,7 @@ sysc_tracenogo:
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.globl ret_from_fork
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ret_from_fork:
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l %r13,__LC_SVC_NEW_PSW+4
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l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
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l %r12,__LC_THREAD_INFO # load pointer to thread_info struct
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tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
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bo BASED(0f)
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st %r15,SP_R15(%r15) # store stack pointer for new kthread
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@ -434,8 +435,8 @@ kernel_execve:
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0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
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l %r15,__LC_KERNEL_STACK # load ksp
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s %r15,BASED(.Lc_spsize) # make room for registers & psw
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l %r9,__LC_THREAD_INFO
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mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
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l %r12,__LC_THREAD_INFO
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xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
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stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
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l %r1,BASED(.Lexecve_tail)
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@ -465,26 +466,27 @@ pgm_check_handler:
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SAVE_ALL_BASE __LC_SAVE_AREA
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tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
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bnz BASED(pgm_per) # got per exception -> special case
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SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
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CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
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SAVE_ALL_PGM __LC_PGM_OLD_PSW,__LC_SAVE_AREA
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CREATE_STACK_FRAME __LC_SAVE_AREA
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xc SP_ILC(4,%r15),SP_ILC(%r15)
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mvc SP_PSW(8,%r15),__LC_PGM_OLD_PSW
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l %r12,__LC_THREAD_INFO # load pointer to thread_info struct
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tm SP_PSW+1(%r15),0x01 # interrupting from user ?
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bz BASED(pgm_no_vtime)
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UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
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UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
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mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
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pgm_no_vtime:
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l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
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l %r3,__LC_PGM_ILC # load program interruption code
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l %r4,__LC_TRANS_EXC_CODE
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REENABLE_IRQS
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la %r8,0x7f
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nr %r8,%r3
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pgm_do_call:
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l %r7,BASED(.Ljump_table)
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sll %r8,2
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l %r7,0(%r8,%r7) # load address of handler routine
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l %r1,BASED(.Ljump_table)
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l %r1,0(%r8,%r1) # load address of handler routine
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la %r2,SP_PTREGS(%r15) # address of register-save area
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basr %r14,%r7 # branch to interrupt-handler
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basr %r14,%r1 # branch to interrupt-handler
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pgm_exit:
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b BASED(sysc_return)
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@ -505,33 +507,34 @@ pgm_per:
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# Normal per exception
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#
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pgm_per_std:
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SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
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CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
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SAVE_ALL_PGM __LC_PGM_OLD_PSW,__LC_SAVE_AREA
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CREATE_STACK_FRAME __LC_SAVE_AREA
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mvc SP_PSW(8,%r15),__LC_PGM_OLD_PSW
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l %r12,__LC_THREAD_INFO # load pointer to thread_info struct
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tm SP_PSW+1(%r15),0x01 # interrupting from user ?
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bz BASED(pgm_no_vtime2)
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UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
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UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
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mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
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pgm_no_vtime2:
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l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
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l %r1,__TI_task(%r9)
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l %r1,__TI_task(%r12)
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tm SP_PSW+1(%r15),0x01 # kernel per event ?
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bz BASED(kernel_per)
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mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
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mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
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mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
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oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
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oi __TI_flags+3(%r12),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
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l %r3,__LC_PGM_ILC # load program interruption code
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l %r4,__LC_TRANS_EXC_CODE
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REENABLE_IRQS
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la %r8,0x7f
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nr %r8,%r3 # clear per-event-bit and ilc
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||||
be BASED(pgm_exit2) # only per or per+check ?
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l %r7,BASED(.Ljump_table)
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sll %r8,2
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l %r7,0(%r8,%r7) # load address of handler routine
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l %r1,BASED(.Ljump_table)
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l %r1,0(%r8,%r1) # load address of handler routine
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||||
la %r2,SP_PTREGS(%r15) # address of register-save area
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||||
basr %r14,%r7 # branch to interrupt-handler
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||||
basr %r14,%r1 # branch to interrupt-handler
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||||
pgm_exit2:
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||||
b BASED(sysc_return)
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||||
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||||
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@ -539,18 +542,19 @@ pgm_exit2:
|
|||
# it was a single stepped SVC that is causing all the trouble
|
||||
#
|
||||
pgm_svcper:
|
||||
SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
|
||||
CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
|
||||
SAVE_ALL_PGM __LC_SVC_OLD_PSW,__LC_SAVE_AREA
|
||||
CREATE_STACK_FRAME __LC_SAVE_AREA
|
||||
mvc SP_PSW(8,%r15),__LC_SVC_OLD_PSW
|
||||
mvc SP_ILC(4,%r15),__LC_SVC_ILC
|
||||
l %r12,__LC_THREAD_INFO # load pointer to thread_info struct
|
||||
UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
|
||||
UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
|
||||
mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
|
||||
lh %r7,0x8a # get svc number from lowcore
|
||||
l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
|
||||
l %r8,__TI_task(%r9)
|
||||
l %r8,__TI_task(%r12)
|
||||
mvc __THREAD_per+__PER_atmid(2,%r8),__LC_PER_ATMID
|
||||
mvc __THREAD_per+__PER_address(4,%r8),__LC_PER_ADDRESS
|
||||
mvc __THREAD_per+__PER_access_id(1,%r8),__LC_PER_ACCESS_ID
|
||||
oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
|
||||
oi __TI_flags+3(%r12),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
|
||||
stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
|
||||
lm %r2,%r6,SP_R2(%r15) # load svc arguments
|
||||
b BASED(sysc_do_svc)
|
||||
|
|
@ -560,8 +564,7 @@ pgm_svcper:
|
|||
#
|
||||
kernel_per:
|
||||
REENABLE_IRQS
|
||||
mvi SP_SVCNR(%r15),0xff # set trap indication to pgm check
|
||||
mvi SP_SVCNR+1(%r15),0xff
|
||||
xc SP_SVCNR(2,%r15),SP_SVCNR(%r15)
|
||||
la %r2,SP_PTREGS(%r15) # address of register-save area
|
||||
l %r1,BASED(.Lhandle_per) # load adr. of per handler
|
||||
basr %r14,%r1 # branch to do_single_step
|
||||
|
|
@ -575,9 +578,10 @@ kernel_per:
|
|||
io_int_handler:
|
||||
stck __LC_INT_CLOCK
|
||||
stpt __LC_ASYNC_ENTER_TIMER
|
||||
SAVE_ALL_BASE __LC_SAVE_AREA+16
|
||||
SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
|
||||
CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
|
||||
CREATE_STACK_FRAME __LC_SAVE_AREA+16
|
||||
mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
|
||||
l %r12,__LC_THREAD_INFO # load pointer to thread_info struct
|
||||
tm SP_PSW+1(%r15),0x01 # interrupting from user ?
|
||||
bz BASED(io_no_vtime)
|
||||
UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
|
||||
|
|
@ -585,7 +589,6 @@ io_int_handler:
|
|||
mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
|
||||
io_no_vtime:
|
||||
TRACE_IRQS_OFF
|
||||
l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
|
||||
l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ
|
||||
la %r2,SP_PTREGS(%r15) # address of register-save area
|
||||
basr %r14,%r1 # branch to standard irq handler
|
||||
|
|
@ -593,7 +596,7 @@ io_return:
|
|||
LOCKDEP_SYS_EXIT
|
||||
TRACE_IRQS_ON
|
||||
io_tif:
|
||||
tm __TI_flags+3(%r9),_TIF_WORK_INT
|
||||
tm __TI_flags+3(%r12),_TIF_WORK_INT
|
||||
bnz BASED(io_work) # there is work to do (signals etc.)
|
||||
io_restore:
|
||||
RESTORE_ALL __LC_RETURN_PSW,0
|
||||
|
|
@ -611,9 +614,9 @@ io_work:
|
|||
bo BASED(io_work_user) # yes -> do resched & signal
|
||||
#ifdef CONFIG_PREEMPT
|
||||
# check for preemptive scheduling
|
||||
icm %r0,15,__TI_precount(%r9)
|
||||
icm %r0,15,__TI_precount(%r12)
|
||||
bnz BASED(io_restore) # preemption disabled
|
||||
tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
|
||||
tm __TI_flags+3(%r12),_TIF_NEED_RESCHED
|
||||
bno BASED(io_restore)
|
||||
# switch to kernel stack
|
||||
l %r1,SP_R15(%r15)
|
||||
|
|
@ -647,13 +650,13 @@ io_work_user:
|
|||
# and _TIF_MCCK_PENDING
|
||||
#
|
||||
io_work_tif:
|
||||
tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
|
||||
tm __TI_flags+3(%r12),_TIF_MCCK_PENDING
|
||||
bo BASED(io_mcck_pending)
|
||||
tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
|
||||
tm __TI_flags+3(%r12),_TIF_NEED_RESCHED
|
||||
bo BASED(io_reschedule)
|
||||
tm __TI_flags+3(%r9),_TIF_SIGPENDING
|
||||
tm __TI_flags+3(%r12),_TIF_SIGPENDING
|
||||
bo BASED(io_sigpending)
|
||||
tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME
|
||||
tm __TI_flags+3(%r12),_TIF_NOTIFY_RESUME
|
||||
bo BASED(io_notify_resume)
|
||||
b BASED(io_return) # beware of critical section cleanup
|
||||
|
||||
|
|
@ -713,16 +716,16 @@ io_notify_resume:
|
|||
ext_int_handler:
|
||||
stck __LC_INT_CLOCK
|
||||
stpt __LC_ASYNC_ENTER_TIMER
|
||||
SAVE_ALL_BASE __LC_SAVE_AREA+16
|
||||
SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
|
||||
CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
|
||||
CREATE_STACK_FRAME __LC_SAVE_AREA+16
|
||||
mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
|
||||
l %r12,__LC_THREAD_INFO # load pointer to thread_info struct
|
||||
tm SP_PSW+1(%r15),0x01 # interrupting from user ?
|
||||
bz BASED(ext_no_vtime)
|
||||
UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
|
||||
UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
|
||||
mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
|
||||
ext_no_vtime:
|
||||
l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
|
||||
TRACE_IRQS_OFF
|
||||
la %r2,SP_PTREGS(%r15) # address of register-save area
|
||||
l %r3,__LC_CPU_ADDRESS # get cpu address + interruption code
|
||||
|
|
@ -777,7 +780,10 @@ mcck_int_main:
|
|||
sra %r14,PAGE_SHIFT
|
||||
be BASED(0f)
|
||||
l %r15,__LC_PANIC_STACK # load panic stack
|
||||
0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32
|
||||
0: s %r15,BASED(.Lc_spsize) # make room for registers & psw
|
||||
CREATE_STACK_FRAME __LC_SAVE_AREA+32
|
||||
mvc SP_PSW(8,%r15),0(%r12)
|
||||
l %r12,__LC_THREAD_INFO # load pointer to thread_info struct
|
||||
tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
|
||||
bno BASED(mcck_no_vtime) # no -> skip cleanup critical
|
||||
tm SP_PSW+1(%r15),0x01 # interrupting from user ?
|
||||
|
|
@ -786,7 +792,6 @@ mcck_int_main:
|
|||
UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
|
||||
mvc __LC_LAST_UPDATE_TIMER(8),__LC_MCCK_ENTER_TIMER
|
||||
mcck_no_vtime:
|
||||
l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
|
||||
la %r2,SP_PTREGS(%r15) # load pt_regs
|
||||
l %r1,BASED(.Ls390_mcck)
|
||||
basr %r14,%r1 # call machine check handler
|
||||
|
|
@ -798,7 +803,7 @@ mcck_no_vtime:
|
|||
xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
|
||||
lr %r15,%r1
|
||||
stosm __SF_EMPTY(%r15),0x04 # turn dat on
|
||||
tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
|
||||
tm __TI_flags+3(%r12),_TIF_MCCK_PENDING
|
||||
bno BASED(mcck_return)
|
||||
TRACE_IRQS_OFF
|
||||
l %r1,BASED(.Ls390_handle_mcck)
|
||||
|
|
@ -947,12 +952,13 @@ cleanup_system_call:
|
|||
bh BASED(0f)
|
||||
mvc __LC_SAVE_AREA(16),0(%r12)
|
||||
0: st %r13,4(%r12)
|
||||
st %r12,__LC_SAVE_AREA+48 # argh
|
||||
SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
|
||||
CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
|
||||
l %r12,__LC_SAVE_AREA+48 # argh
|
||||
l %r15,__LC_KERNEL_STACK # problem state -> load ksp
|
||||
s %r15,BASED(.Lc_spsize) # make room for registers & psw
|
||||
st %r15,12(%r12)
|
||||
lh %r7,0x8a
|
||||
CREATE_STACK_FRAME __LC_SAVE_AREA
|
||||
mvc SP_PSW(8,%r15),__LC_SVC_OLD_PSW
|
||||
mvc SP_ILC(4,%r15),__LC_SVC_ILC
|
||||
mvc 0(4,%r12),__LC_THREAD_INFO
|
||||
cleanup_vtime:
|
||||
clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12)
|
||||
bhe BASED(cleanup_stime)
|
||||
|
|
|
|||
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