Reset controller changes for v4.12, part 2
Add reset lines for the NAND and eMMC contollers on LD11/LD20 SoCs. -----BEGIN PGP SIGNATURE----- iQJLBAABCAA1FiEEBsBxhV1FaKwXuCOBUMKIHHCeYOsFAljjx4oXHHAuemFiZWxA cGVuZ3V0cm9uaXguZGUACgkQUMKIHHCeYOsw2xAAk57XCukWVQyBLf8T6ioFi3WT XOVm5ISSd4oC5TP/Jy/gUmNkpWidolXaCmIvl6izLd8wB+vo45eubvwEVRf7oGRA hidL6BomWcLfZkxAgkuSHmBDExsHljjmmrEm4YdMCvufkuEUE0zFMGGeShWFsIbF 4m2vdiNthAWKfcvFPmJrAFWG8r4lU93M3GN/M35vmNNHNyesjrR8K0tGY3z/Xn/0 1ZynwxGUmgPTFm/Bb6kotfzMBebnW/ryAOnhVLv83ErNvy+4PCnTAVNeeRXbNuCF 9ZKa2HZKn/9Le0glDdyx2cH55QcG2azk2np8kTup30U4uql4d7mmgG7o2SFaoZpJ 47ULmJKqbxT00PYMye6YETS/Zm3lyXTB51zP2aJ/pMCSEFsGPX64b4GlO2XYuFk/ 9tfUKsx5CmBntfY5xlw5I5xXAM7EpesPRnTfiVt0JyggrmQYHSEpmeutj30zjkwU 94ZeC++ScX20VVSRUkTEY5BlSh0hnENGr8noVkwvQn2mnKINx+YGXcKwTlsyhGRV 6AFsT1n6pHtv1OB3V7WZ6IP/Othxq7XlVIvZox2fxV9bgiDjqeSaojrtcKgmrNCv NGWeMfdQ2Z+eBfL4HJMWLgqjDShJaie6niOdJTOTqn5ZOujV8g/Hb/abRxEX8aen 0glbvB590jmVd1x7QcQ= =mN0u -----END PGP SIGNATURE----- Merge tag 'reset-for-4.12-2' of git://git.pengutronix.de/git/pza/linux into next/drivers Reset controller changes for v4.12, part 2 Add reset lines for the NAND and eMMC contollers on LD11/LD20 SoCs. * tag 'reset-for-4.12-2' of git://git.pengutronix.de/git/pza/linux: reset: uniphier: add NAND and eMMC reset control Signed-off-by: Olof Johansson <olof@lixom.net>
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1dfe46166f
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@ -50,6 +50,15 @@ struct uniphier_reset_data {
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}
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/* System reset data */
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#define UNIPHIER_SLD3_SYS_RESET_NAND(id) \
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UNIPHIER_RESETX((id), 0x2004, 2)
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#define UNIPHIER_LD11_SYS_RESET_NAND(id) \
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UNIPHIER_RESETX((id), 0x200c, 0)
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#define UNIPHIER_LD11_SYS_RESET_EMMC(id) \
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UNIPHIER_RESETX((id), 0x200c, 2)
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#define UNIPHIER_SLD3_SYS_RESET_STDMAC(id) \
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UNIPHIER_RESETX((id), 0x2000, 10)
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@ -66,11 +75,13 @@ struct uniphier_reset_data {
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UNIPHIER_RESETX((id), 0x2000 + 0x4 * (ch), 17)
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static const struct uniphier_reset_data uniphier_sld3_sys_reset_data[] = {
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UNIPHIER_SLD3_SYS_RESET_NAND(2),
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UNIPHIER_SLD3_SYS_RESET_STDMAC(8), /* Ether, HSC, MIO */
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UNIPHIER_RESET_END,
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};
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static const struct uniphier_reset_data uniphier_pro4_sys_reset_data[] = {
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UNIPHIER_SLD3_SYS_RESET_NAND(2),
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UNIPHIER_SLD3_SYS_RESET_STDMAC(8), /* HSC, MIO, RLE */
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UNIPHIER_PRO4_SYS_RESET_GIO(12), /* Ether, SATA, USB3 */
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UNIPHIER_PRO4_SYS_RESET_USB3(14, 0),
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@ -79,6 +90,7 @@ static const struct uniphier_reset_data uniphier_pro4_sys_reset_data[] = {
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};
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static const struct uniphier_reset_data uniphier_pro5_sys_reset_data[] = {
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UNIPHIER_SLD3_SYS_RESET_NAND(2),
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UNIPHIER_SLD3_SYS_RESET_STDMAC(8), /* HSC */
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UNIPHIER_PRO4_SYS_RESET_GIO(12), /* PCIe, USB3 */
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UNIPHIER_PRO4_SYS_RESET_USB3(14, 0),
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@ -87,6 +99,7 @@ static const struct uniphier_reset_data uniphier_pro5_sys_reset_data[] = {
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};
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static const struct uniphier_reset_data uniphier_pxs2_sys_reset_data[] = {
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UNIPHIER_SLD3_SYS_RESET_NAND(2),
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UNIPHIER_SLD3_SYS_RESET_STDMAC(8), /* HSC, RLE */
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UNIPHIER_PRO4_SYS_RESET_USB3(14, 0),
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UNIPHIER_PRO4_SYS_RESET_USB3(15, 1),
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@ -101,11 +114,15 @@ static const struct uniphier_reset_data uniphier_pxs2_sys_reset_data[] = {
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};
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static const struct uniphier_reset_data uniphier_ld11_sys_reset_data[] = {
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UNIPHIER_LD11_SYS_RESET_NAND(2),
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UNIPHIER_LD11_SYS_RESET_EMMC(4),
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UNIPHIER_LD11_SYS_RESET_STDMAC(8), /* HSC, MIO */
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UNIPHIER_RESET_END,
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};
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static const struct uniphier_reset_data uniphier_ld20_sys_reset_data[] = {
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UNIPHIER_LD11_SYS_RESET_NAND(2),
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UNIPHIER_LD11_SYS_RESET_EMMC(4),
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UNIPHIER_LD11_SYS_RESET_STDMAC(8), /* HSC */
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UNIPHIER_LD20_SYS_RESET_GIO(12), /* PCIe, USB3 */
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UNIPHIER_RESETX(16, 0x200c, 12), /* USB30-PHY0 */
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