ARM: dts: lager: rename and reindex i2cexio
The rename from i2cexio to i2cexio0 is in preparation for adding i2cexio1 which will use the demuxer for IIC1/I2C1. The reindexing from i2c8 to i2c10 is to allow space for grouping of additional GPIO buses to be added by follow-up patches to support demuxing of other i2c buses. Also note that fallback to GPIO is not provided by the hardware for IIC0/I2C0. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> [wsa: rebased, fixed alias and removed typo in commit message] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
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Коммит
1e26fcf31c
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@ -50,7 +50,7 @@
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aliases {
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aliases {
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serial0 = &scif0;
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serial0 = &scif0;
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serial1 = &scifa1;
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serial1 = &scifa1;
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i2c8 = "i2cexio";
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i2c10 = &i2cexio0;
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};
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};
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chosen {
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chosen {
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@ -273,11 +273,13 @@
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* bus with IIC3 on pins 110 (SCL) + 112 (SDA), select I2C0 at runtime, and
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* bus with IIC3 on pins 110 (SCL) + 112 (SDA), select I2C0 at runtime, and
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* instantiate the slave device at runtime according to the documentation.
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* instantiate the slave device at runtime according to the documentation.
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* You can then communicate with the slave via IIC3.
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* You can then communicate with the slave via IIC3.
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*
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* IIC0/I2C0 does not appear to support fallback to GPIO.
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*/
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*/
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i2cexio: i2c-8 {
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i2cexio0: i2c-10 {
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compatible = "i2c-demux-pinctrl";
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compatible = "i2c-demux-pinctrl";
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i2c-parent = <&iic0>, <&i2c0>;
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i2c-parent = <&iic0>, <&i2c0>;
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i2c-bus-name = "i2c-exio";
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i2c-bus-name = "i2c-exio0";
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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#size-cells = <0>;
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};
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};
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@ -596,12 +598,12 @@
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&i2c0 {
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&i2c0 {
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pinctrl-0 = <&i2c0_pins>;
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pinctrl-0 = <&i2c0_pins>;
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pinctrl-names = "i2c-exio";
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pinctrl-names = "i2c-exio0";
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};
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};
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&iic0 {
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&iic0 {
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pinctrl-0 = <&iic0_pins>;
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pinctrl-0 = <&iic0_pins>;
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pinctrl-names = "i2c-exio";
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pinctrl-names = "i2c-exio0";
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};
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};
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&iic1 {
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&iic1 {
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