tools/power/x86/intel-speed-select: Abstract get_trl_bucket_info

Allow platform specific implementation to get buckets info.

No functional changes are expected.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>

tools/power/x86/intel-speed-select/isst-core-mbox.c

@@ -232,6 +232,24 @@ static int mbox_get_get_trl(struct isst_id *id, int level, int avx_level, int *t
 	return 0;
 }
 
+static int mbox_get_trl_bucket_info(struct isst_id *id, int level, unsigned long long *buckets_info)
+{
+	int ret;
+
+	debug_printf("cpu:%d bucket info via MSR\n", id->cpu);
+
+	*buckets_info = 0;
+
+	ret = isst_send_msr_command(id->cpu, 0x1ae, 0, buckets_info);
+	if (ret)
+		return ret;
+
+	debug_printf("cpu:%d bucket info via MSR successful 0x%llx\n", id->cpu,
+		     *buckets_info);
+
+	return 0;
+}
+
 static struct isst_platform_ops mbox_ops = {
 	.get_disp_freq_multiplier = mbox_get_disp_freq_multiplier,
 	.get_trl_max_levels = mbox_get_trl_max_levels,
@@ -243,6 +261,7 @@ static struct isst_platform_ops mbox_ops = {
 	.get_pwr_info = mbox_get_pwr_info,
 	.get_coremask_info = mbox_get_coremask_info,
 	.get_get_trl = mbox_get_get_trl,
+	.get_trl_bucket_info = mbox_get_trl_bucket_info,
 };
 
 struct isst_platform_ops *mbox_get_platform_ops(void)

tools/power/x86/intel-speed-select/isst-core.c

@@ -346,22 +346,10 @@ int isst_get_get_trl(struct isst_id *id, int level, int avx_level, int *trl)
 	return isst_ops->get_get_trl(id, level, avx_level, trl);
 }
 
-int isst_get_trl_bucket_info(struct isst_id *id, unsigned long long *buckets_info)
+int isst_get_trl_bucket_info(struct isst_id *id, int level, unsigned long long *buckets_info)
 {
-	int ret;
-
-	debug_printf("cpu:%d bucket info via MSR\n", id->cpu);
-
-	*buckets_info = 0;
-
-	ret = isst_send_msr_command(id->cpu, 0x1ae, 0, buckets_info);
-	if (ret)
-		return ret;
-
-	debug_printf("cpu:%d bucket info via MSR successful 0x%llx\n", id->cpu,
-		     *buckets_info);
-
-	return 0;
+	CHECK_CB(get_trl_bucket_info);
+	return isst_ops->get_trl_bucket_info(id, level, buckets_info);
 }
 
 int isst_set_tdp_level(struct isst_id *id, int tdp_level)
@@ -909,7 +897,7 @@ int isst_get_process_ctdp(struct isst_id *id, int tdp_level, struct isst_pkg_ctd
 			}
 
 			isst_get_get_trl_from_msr(id, ctdp_level->trl_ratios[0]);
-			isst_get_trl_bucket_info(id, &ctdp_level->trl_cores);
+			isst_get_trl_bucket_info(id, i, &ctdp_level->trl_cores);
 			continue;
 		}
 
@@ -927,7 +915,7 @@ int isst_get_process_ctdp(struct isst_id *id, int tdp_level, struct isst_pkg_ctd
 		if (ret)
 			return ret;
 
-		ret = isst_get_trl_bucket_info(id, &ctdp_level->trl_cores);
+		ret = isst_get_trl_bucket_info(id, i, &ctdp_level->trl_cores);
 		if (ret)
 			return ret;
 

tools/power/x86/intel-speed-select/isst.h

@@ -192,6 +192,7 @@ struct isst_platform_ops {
 	int (*get_pwr_info)(struct isst_id *id, int config_index, struct isst_pkg_ctdp_level_info *ctdp_level);
 	int (*get_coremask_info)(struct isst_id *id, int config_index, struct isst_pkg_ctdp_level_info *ctdp_level);
 	int (*get_get_trl)(struct isst_id *id, int level, int avx_level, int *trl);
+	int (*get_trl_bucket_info)(struct isst_id *id, int level, unsigned long long *buckets_info);
 };
 
 extern int is_cpu_in_power_domain(int cpu, struct isst_id *id);