DMA: shdma: add r8a73a4 DMAC data to the device ID table
This configuration data will be used, when DMAC DT support is added to r8a73a4. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
This commit is contained in:
Родитель
8eb742a091
Коммит
1e69653d40
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@ -22,3 +22,7 @@ config SUDMAC
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depends on SH_DMAE_BASE
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depends on SH_DMAE_BASE
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help
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help
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Enable support for the Renesas SUDMAC controllers.
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Enable support for the Renesas SUDMAC controllers.
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config SHDMA_R8A73A4
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def_bool y
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depends on ARCH_R8A73A4 && SH_DMAE != n
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@ -1,5 +1,8 @@
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obj-$(CONFIG_SH_DMAE_BASE) += shdma-base.o shdma-of.o
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obj-$(CONFIG_SH_DMAE_BASE) += shdma-base.o shdma-of.o
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obj-$(CONFIG_SH_DMAE) += shdma.o
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obj-$(CONFIG_SH_DMAE) += shdma.o
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shdma-y := shdmac.o
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shdma-y := shdmac.o
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ifeq ($(CONFIG_OF),y)
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shdma-$(CONFIG_SHDMA_R8A73A4) += shdma-r8a73a4.o
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endif
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shdma-objs := $(shdma-y)
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shdma-objs := $(shdma-y)
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obj-$(CONFIG_SUDMAC) += sudmac.o
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obj-$(CONFIG_SUDMAC) += sudmac.o
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@ -0,0 +1,77 @@
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/*
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* Renesas SuperH DMA Engine support for r8a73a4 (APE6) SoCs
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*
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* Copyright (C) 2013 Renesas Electronics, Inc.
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*
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* This is free software; you can redistribute it and/or modify it under the
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* terms of version 2 the GNU General Public License as published by the Free
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* Software Foundation.
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*/
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#include <linux/sh_dma.h>
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#include "shdma-arm.h"
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const unsigned int dma_ts_shift[] = SH_DMAE_TS_SHIFT;
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static const struct sh_dmae_slave_config dma_slaves[] = {
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{
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.chcr = CHCR_TX(XMIT_SZ_32BIT),
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.mid_rid = 0xd1, /* MMC0 Tx */
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}, {
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.chcr = CHCR_RX(XMIT_SZ_32BIT),
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.mid_rid = 0xd2, /* MMC0 Rx */
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}, {
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.chcr = CHCR_TX(XMIT_SZ_32BIT),
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.mid_rid = 0xe1, /* MMC1 Tx */
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}, {
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.chcr = CHCR_RX(XMIT_SZ_32BIT),
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.mid_rid = 0xe2, /* MMC1 Rx */
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},
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};
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#define DMAE_CHANNEL(a, b) \
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{ \
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.offset = (a) - 0x20, \
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.dmars = (a) - 0x20 + 0x40, \
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.chclr_bit = (b), \
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.chclr_offset = 0x80 - 0x20, \
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}
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static const struct sh_dmae_channel dma_channels[] = {
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DMAE_CHANNEL(0x8000, 0),
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DMAE_CHANNEL(0x8080, 1),
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DMAE_CHANNEL(0x8100, 2),
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DMAE_CHANNEL(0x8180, 3),
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DMAE_CHANNEL(0x8200, 4),
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DMAE_CHANNEL(0x8280, 5),
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DMAE_CHANNEL(0x8300, 6),
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DMAE_CHANNEL(0x8380, 7),
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DMAE_CHANNEL(0x8400, 8),
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DMAE_CHANNEL(0x8480, 9),
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DMAE_CHANNEL(0x8500, 10),
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DMAE_CHANNEL(0x8580, 11),
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DMAE_CHANNEL(0x8600, 12),
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DMAE_CHANNEL(0x8680, 13),
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DMAE_CHANNEL(0x8700, 14),
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DMAE_CHANNEL(0x8780, 15),
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DMAE_CHANNEL(0x8800, 16),
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DMAE_CHANNEL(0x8880, 17),
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DMAE_CHANNEL(0x8900, 18),
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DMAE_CHANNEL(0x8980, 19),
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};
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const struct sh_dmae_pdata r8a73a4_dma_pdata = {
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.slave = dma_slaves,
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.slave_num = ARRAY_SIZE(dma_slaves),
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.channel = dma_channels,
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.channel_num = ARRAY_SIZE(dma_channels),
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.ts_low_shift = TS_LOW_SHIFT,
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.ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT,
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.ts_high_shift = TS_HI_SHIFT,
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.ts_high_mask = TS_HI_BIT << TS_HI_SHIFT,
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.ts_shift = dma_ts_shift,
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.ts_shift_num = ARRAY_SIZE(dma_ts_shift),
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.dmaor_init = DMAOR_DME,
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.chclr_present = 1,
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.chclr_bitwise = 1,
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};
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@ -62,4 +62,11 @@ struct sh_dmae_desc {
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#define to_sh_dev(chan) container_of(chan->shdma_chan.dma_chan.device,\
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#define to_sh_dev(chan) container_of(chan->shdma_chan.dma_chan.device,\
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struct sh_dmae_device, shdma_dev.dma_dev)
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struct sh_dmae_device, shdma_dev.dma_dev)
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#ifdef CONFIG_SHDMA_R8A73A4
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extern const struct sh_dmae_pdata r8a73a4_dma_pdata;
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#define r8a73a4_shdma_devid (&r8a73a4_dma_pdata)
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#else
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#define r8a73a4_shdma_devid NULL
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#endif
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#endif /* __DMA_SHDMA_H */
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#endif /* __DMA_SHDMA_H */
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@ -677,6 +677,7 @@ static const struct shdma_ops sh_dmae_shdma_ops = {
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};
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};
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static const struct of_device_id sh_dmae_of_match[] = {
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static const struct of_device_id sh_dmae_of_match[] = {
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{.compatible = "renesas,shdma-r8a73a4", .data = r8a73a4_shdma_devid,},
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{}
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{}
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};
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};
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MODULE_DEVICE_TABLE(of, sh_dmae_of_match);
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MODULE_DEVICE_TABLE(of, sh_dmae_of_match);
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