kvm: ioapic: Refactor kvm_ioapic_update_eoi()
Refactor code for handling IOAPIC EOI for subsequent patch. There is no functional change. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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1ec2405c7c
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@ -154,10 +154,16 @@ static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic)
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__rtc_irq_eoi_tracking_restore_one(vcpu);
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}
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static void rtc_irq_eoi(struct kvm_ioapic *ioapic, struct kvm_vcpu *vcpu)
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static void rtc_irq_eoi(struct kvm_ioapic *ioapic, struct kvm_vcpu *vcpu,
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int vector)
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{
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if (test_and_clear_bit(vcpu->vcpu_id,
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ioapic->rtc_status.dest_map.map)) {
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struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
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/* RTC special handling */
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if (test_bit(vcpu->vcpu_id, dest_map->map) &&
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(vector == dest_map->vectors[vcpu->vcpu_id]) &&
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(test_and_clear_bit(vcpu->vcpu_id,
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ioapic->rtc_status.dest_map.map))) {
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--ioapic->rtc_status.pending_eoi;
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rtc_status_pending_eoi_check_valid(ioapic);
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}
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@ -454,72 +460,68 @@ static void kvm_ioapic_eoi_inject_work(struct work_struct *work)
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}
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#define IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT 10000
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static void __kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu,
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struct kvm_ioapic *ioapic, int vector, int trigger_mode)
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static void kvm_ioapic_update_eoi_one(struct kvm_vcpu *vcpu,
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struct kvm_ioapic *ioapic,
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int trigger_mode,
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int pin)
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{
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struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
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struct kvm_lapic *apic = vcpu->arch.apic;
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int i;
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union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[pin];
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/* RTC special handling */
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if (test_bit(vcpu->vcpu_id, dest_map->map) &&
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vector == dest_map->vectors[vcpu->vcpu_id])
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rtc_irq_eoi(ioapic, vcpu);
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/*
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* We are dropping lock while calling ack notifiers because ack
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* notifier callbacks for assigned devices call into IOAPIC
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* recursively. Since remote_irr is cleared only after call
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* to notifiers if the same vector will be delivered while lock
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* is dropped it will be put into irr and will be delivered
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* after ack notifier returns.
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*/
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spin_unlock(&ioapic->lock);
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kvm_notify_acked_irq(ioapic->kvm, KVM_IRQCHIP_IOAPIC, pin);
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spin_lock(&ioapic->lock);
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for (i = 0; i < IOAPIC_NUM_PINS; i++) {
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union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
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if (trigger_mode != IOAPIC_LEVEL_TRIG ||
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kvm_lapic_get_reg(apic, APIC_SPIV) & APIC_SPIV_DIRECTED_EOI)
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return;
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if (ent->fields.vector != vector)
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continue;
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/*
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* We are dropping lock while calling ack notifiers because ack
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* notifier callbacks for assigned devices call into IOAPIC
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* recursively. Since remote_irr is cleared only after call
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* to notifiers if the same vector will be delivered while lock
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* is dropped it will be put into irr and will be delivered
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* after ack notifier returns.
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*/
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spin_unlock(&ioapic->lock);
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kvm_notify_acked_irq(ioapic->kvm, KVM_IRQCHIP_IOAPIC, i);
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spin_lock(&ioapic->lock);
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if (trigger_mode != IOAPIC_LEVEL_TRIG ||
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kvm_lapic_get_reg(apic, APIC_SPIV) & APIC_SPIV_DIRECTED_EOI)
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continue;
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ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
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ent->fields.remote_irr = 0;
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if (!ent->fields.mask && (ioapic->irr & (1 << i))) {
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++ioapic->irq_eoi[i];
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if (ioapic->irq_eoi[i] == IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT) {
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/*
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* Real hardware does not deliver the interrupt
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* immediately during eoi broadcast, and this
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* lets a buggy guest make slow progress
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* even if it does not correctly handle a
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* level-triggered interrupt. Emulate this
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* behavior if we detect an interrupt storm.
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*/
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schedule_delayed_work(&ioapic->eoi_inject, HZ / 100);
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ioapic->irq_eoi[i] = 0;
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trace_kvm_ioapic_delayed_eoi_inj(ent->bits);
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} else {
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ioapic_service(ioapic, i, false);
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}
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ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
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ent->fields.remote_irr = 0;
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if (!ent->fields.mask && (ioapic->irr & (1 << pin))) {
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++ioapic->irq_eoi[pin];
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if (ioapic->irq_eoi[pin] == IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT) {
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/*
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* Real hardware does not deliver the interrupt
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* immediately during eoi broadcast, and this
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* lets a buggy guest make slow progress
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* even if it does not correctly handle a
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* level-triggered interrupt. Emulate this
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* behavior if we detect an interrupt storm.
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*/
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schedule_delayed_work(&ioapic->eoi_inject, HZ / 100);
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ioapic->irq_eoi[pin] = 0;
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trace_kvm_ioapic_delayed_eoi_inj(ent->bits);
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} else {
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ioapic->irq_eoi[i] = 0;
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ioapic_service(ioapic, pin, false);
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}
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} else {
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ioapic->irq_eoi[pin] = 0;
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}
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}
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void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector, int trigger_mode)
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{
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int i;
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struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
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spin_lock(&ioapic->lock);
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__kvm_ioapic_update_eoi(vcpu, ioapic, vector, trigger_mode);
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rtc_irq_eoi(ioapic, vcpu, vector);
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for (i = 0; i < IOAPIC_NUM_PINS; i++) {
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union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
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if (ent->fields.vector != vector)
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continue;
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kvm_ioapic_update_eoi_one(vcpu, ioapic, trigger_mode, i);
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}
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spin_unlock(&ioapic->lock);
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}
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