m68k: Call timer_interrupt() with interrupts disabled
Some platforms execute their timer handler with the interrupt priority level set below 6. That means the handler could be interrupted by another driver and this could lead to re-entry of the timer core. Avoid this by use of local_irq_save/restore for timer interrupt dispatch. This provides mutual exclusion around the timer interrupt flag access which is needed later in this series for the clocksource conversion. Reported-by: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/alpine.DEB.2.21.1811131407120.2697@nanos.tec.linutronix.de Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
This commit is contained in:
Finn Thain
Geert Uytterhoeven
Родитель
9e98c678c2
Коммит
1efdd4bd25
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@ -88,10 +88,19 @@ static irqreturn_t cia_handler(int irq, void *dev_id)
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struct ciabase *base = dev_id;
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int mach_irq;
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unsigned char ints;
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unsigned long flags;
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/* Interrupts get disabled while the timer irq flag is cleared and
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* the timer interrupt serviced.
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*/
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mach_irq = base->cia_irq;
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local_irq_save(flags);
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ints = cia_set_irq(base, CIA_ICR_ALL);
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amiga_custom.intreq = base->int_mask;
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if (ints & 1)
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generic_handle_irq(mach_irq);
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local_irq_restore(flags);
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mach_irq++, ints >>= 1;
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for (; ints; mach_irq++, ints >>= 1) {
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if (ints & 1)
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generic_handle_irq(mach_irq);
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@ -142,7 +142,7 @@ struct mfptimerbase {
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.name = "MFP Timer D"
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};
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static irqreturn_t mfptimer_handler(int irq, void *dev_id)
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static irqreturn_t mfp_timer_d_handler(int irq, void *dev_id)
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{
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struct mfptimerbase *base = dev_id;
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int mach_irq;
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@ -344,7 +344,7 @@ void __init atari_init_IRQ(void)
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st_mfp.tim_ct_cd = (st_mfp.tim_ct_cd & 0xf0) | 0x6;
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/* request timer D dispatch handler */
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if (request_irq(IRQ_MFP_TIMD, mfptimer_handler, IRQF_SHARED,
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if (request_irq(IRQ_MFP_TIMD, mfp_timer_d_handler, IRQF_SHARED,
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stmfp_base.name, &stmfp_base))
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pr_err("Couldn't register %s interrupt\n", stmfp_base.name);
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@ -24,6 +24,18 @@
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DEFINE_SPINLOCK(rtc_lock);
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EXPORT_SYMBOL_GPL(rtc_lock);
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static irqreturn_t mfp_timer_c_handler(int irq, void *dev_id)
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{
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irq_handler_t timer_routine = dev_id;
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unsigned long flags;
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local_irq_save(flags);
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timer_routine(0, NULL);
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local_irq_restore(flags);
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return IRQ_HANDLED;
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}
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void __init
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atari_sched_init(irq_handler_t timer_routine)
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{
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@ -32,7 +44,8 @@ atari_sched_init(irq_handler_t timer_routine)
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/* start timer C, div = 1:100 */
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st_mfp.tim_ct_cd = (st_mfp.tim_ct_cd & 15) | 0x60;
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/* install interrupt service routine for MFP Timer C */
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if (request_irq(IRQ_MFP_TIMC, timer_routine, 0, "timer", timer_routine))
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if (request_irq(IRQ_MFP_TIMC, mfp_timer_c_handler, 0, "timer",
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timer_routine))
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pr_err("Couldn't register timer interrupt\n");
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}
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@ -44,11 +44,6 @@ extern int bvme6000_hwclk (int, struct rtc_time *);
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extern void bvme6000_reset (void);
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void bvme6000_set_vectors (void);
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/* Save tick handler routine pointer, will point to xtime_update() in
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* kernel/timer/timekeeping.c, called via bvme6000_process_int() */
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static irq_handler_t tick_handler;
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int __init bvme6000_parse_bootinfo(const struct bi_record *bi)
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{
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@ -157,12 +152,18 @@ irqreturn_t bvme6000_abort_int (int irq, void *dev_id)
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static irqreturn_t bvme6000_timer_int (int irq, void *dev_id)
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{
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irq_handler_t timer_routine = dev_id;
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unsigned long flags;
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volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
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unsigned char msr = rtc->msr & 0xc0;
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unsigned char msr;
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local_irq_save(flags);
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msr = rtc->msr & 0xc0;
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rtc->msr = msr | 0x20; /* Ack the interrupt */
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timer_routine(0, NULL);
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local_irq_restore(flags);
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return tick_handler(irq, dev_id);
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return IRQ_HANDLED;
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}
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/*
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@ -181,9 +182,8 @@ void bvme6000_sched_init (irq_handler_t timer_routine)
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rtc->msr = 0; /* Ensure timer registers accessible */
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tick_handler = timer_routine;
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if (request_irq(BVME_IRQ_RTC, bvme6000_timer_int, 0,
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"timer", bvme6000_timer_int))
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if (request_irq(BVME_IRQ_RTC, bvme6000_timer_int, 0, "timer",
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timer_routine))
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panic ("Couldn't register timer int");
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rtc->t1cr_omr = 0x04; /* Mode 2, ext clk */
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@ -38,13 +38,19 @@
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static irqreturn_t hp300_tick(int irq, void *dev_id)
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{
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irq_handler_t timer_routine = dev_id;
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unsigned long flags;
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unsigned long tmp;
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irq_handler_t vector = dev_id;
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local_irq_save(flags);
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in_8(CLOCKBASE + CLKSR);
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asm volatile ("movpw %1@(5),%0" : "=d" (tmp) : "a" (CLOCKBASE));
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timer_routine(0, NULL);
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local_irq_restore(flags);
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/* Turn off the network and SCSI leds */
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blinken_leds(0, 0xe0);
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return vector(irq, NULL);
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return IRQ_HANDLED;
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}
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u32 hp300_gettimeoffset(void)
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@ -440,6 +440,8 @@ void via_nubus_irq_shutdown(int irq)
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* via6522.c :-), disable/pending masks added.
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*/
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#define VIA_TIMER_1_INT BIT(6)
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void via1_irq(struct irq_desc *desc)
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{
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int irq_num;
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@ -449,6 +451,21 @@ void via1_irq(struct irq_desc *desc)
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if (!events)
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return;
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irq_num = IRQ_MAC_TIMER_1;
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irq_bit = VIA_TIMER_1_INT;
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if (events & irq_bit) {
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unsigned long flags;
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local_irq_save(flags);
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via1[vIFR] = irq_bit;
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generic_handle_irq(irq_num);
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local_irq_restore(flags);
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events &= ~irq_bit;
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if (!events)
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return;
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}
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irq_num = VIA1_SOURCE_BASE;
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irq_bit = 1;
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do {
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@ -45,11 +45,6 @@ extern void mvme147_reset (void);
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static int bcd2int (unsigned char b);
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/* Save tick handler routine pointer, will point to xtime_update() in
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* kernel/time/timekeeping.c, called via mvme147_process_int() */
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irq_handler_t tick_handler;
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int __init mvme147_parse_bootinfo(const struct bi_record *bi)
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{
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@ -104,16 +99,23 @@ void __init config_mvme147(void)
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static irqreturn_t mvme147_timer_int (int irq, void *dev_id)
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{
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irq_handler_t timer_routine = dev_id;
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unsigned long flags;
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local_irq_save(flags);
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m147_pcc->t1_int_cntrl = PCC_TIMER_INT_CLR;
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m147_pcc->t1_int_cntrl = PCC_INT_ENAB|PCC_LEVEL_TIMER1;
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return tick_handler(irq, dev_id);
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timer_routine(0, NULL);
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local_irq_restore(flags);
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return IRQ_HANDLED;
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}
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void mvme147_sched_init (irq_handler_t timer_routine)
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{
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tick_handler = timer_routine;
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if (request_irq(PCC_IRQ_TIMER1, mvme147_timer_int, 0, "timer 1", NULL))
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if (request_irq(PCC_IRQ_TIMER1, mvme147_timer_int, 0, "timer 1",
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timer_routine))
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pr_err("Couldn't register timer interrupt\n");
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/* Init the clock with a value */
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@ -50,11 +50,6 @@ extern void mvme16x_reset (void);
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int bcd2int (unsigned char b);
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/* Save tick handler routine pointer, will point to xtime_update() in
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* kernel/time/timekeeping.c, called via mvme16x_process_int() */
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static irq_handler_t tick_handler;
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unsigned short mvme16x_config;
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EXPORT_SYMBOL(mvme16x_config);
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@ -352,8 +347,15 @@ static irqreturn_t mvme16x_abort_int (int irq, void *dev_id)
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static irqreturn_t mvme16x_timer_int (int irq, void *dev_id)
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{
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*(volatile unsigned char *)0xfff4201b |= 8;
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return tick_handler(irq, dev_id);
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irq_handler_t timer_routine = dev_id;
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unsigned long flags;
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local_irq_save(flags);
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*(volatile unsigned char *)0xfff4201b |= 8;
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timer_routine(0, NULL);
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local_irq_restore(flags);
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return IRQ_HANDLED;
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}
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void mvme16x_sched_init (irq_handler_t timer_routine)
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@ -361,14 +363,13 @@ void mvme16x_sched_init (irq_handler_t timer_routine)
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uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
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int irq;
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tick_handler = timer_routine;
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/* Using PCCchip2 or MC2 chip tick timer 1 */
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*(volatile unsigned long *)0xfff42008 = 0;
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*(volatile unsigned long *)0xfff42004 = 10000; /* 10ms */
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*(volatile unsigned char *)0xfff42017 |= 3;
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*(volatile unsigned char *)0xfff4201b = 0x16;
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if (request_irq(MVME16x_IRQ_TIMER, mvme16x_timer_int, 0,
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"timer", mvme16x_timer_int))
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if (request_irq(MVME16x_IRQ_TIMER, mvme16x_timer_int, 0, "timer",
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timer_routine))
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panic ("Couldn't register timer int");
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if (brdno == 0x0162 || brdno == 0x172)
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@ -127,10 +127,10 @@ void q40_mksound(unsigned int hz, unsigned int ticks)
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sound_ticks = ticks << 1;
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}
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static irq_handler_t q40_timer_routine;
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static irqreturn_t q40_timer_int (int irq, void * dev)
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static irqreturn_t q40_timer_int(int irq, void *dev_id)
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{
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irq_handler_t timer_routine = dev_id;
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ql_ticks = ql_ticks ? 0 : 1;
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if (sound_ticks) {
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unsigned char sval=(sound_ticks & 1) ? 128-SVOL : 128+SVOL;
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@ -139,8 +139,13 @@ static irqreturn_t q40_timer_int (int irq, void * dev)
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*DAC_RIGHT=sval;
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}
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if (!ql_ticks)
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q40_timer_routine(irq, dev);
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if (!ql_ticks) {
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unsigned long flags;
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local_irq_save(flags);
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timer_routine(0, NULL);
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local_irq_restore(flags);
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}
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return IRQ_HANDLED;
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}
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@ -148,11 +153,9 @@ void q40_sched_init (irq_handler_t timer_routine)
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{
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int timer_irq;
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q40_timer_routine = timer_routine;
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timer_irq = Q40_IRQ_FRAME;
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if (request_irq(timer_irq, q40_timer_int, 0,
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"timer", q40_timer_int))
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if (request_irq(timer_irq, q40_timer_int, 0, "timer", timer_routine))
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panic("Couldn't register timer int");
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master_outb(-1, FRAME_CLEAR_REG);
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@ -61,8 +61,10 @@ static irqreturn_t sun3_int7(int irq, void *dev_id)
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static irqreturn_t sun3_int5(int irq, void *dev_id)
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{
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unsigned long flags;
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unsigned int cnt;
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local_irq_save(flags);
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#ifdef CONFIG_SUN3
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intersil_clear();
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#endif
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@ -76,6 +78,7 @@ static irqreturn_t sun3_int5(int irq, void *dev_id)
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cnt = kstat_irqs_cpu(irq, 0);
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if (!(cnt % 20))
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sun3_leds(led_pattern[cnt % 160 / 20]);
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local_irq_restore(flags);
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return IRQ_HANDLED;
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}
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@ -80,15 +80,19 @@ u32 sun3x_gettimeoffset(void)
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}
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#if 0
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static void sun3x_timer_tick(int irq, void *dev_id, struct pt_regs *regs)
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static irqreturn_t sun3x_timer_tick(int irq, void *dev_id)
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{
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void (*vector)(int, void *, struct pt_regs *) = dev_id;
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irq_handler_t timer_routine = dev_id;
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unsigned long flags;
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/* Clear the pending interrupt - pulse the enable line low */
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disable_irq(5);
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enable_irq(5);
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local_irq_save(flags);
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/* Clear the pending interrupt - pulse the enable line low */
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disable_irq(5);
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enable_irq(5);
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timer_routine(0, NULL);
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local_irq_restore(flags);
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vector(irq, NULL, regs);
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return IRQ_HANDLED;
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}
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#endif
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