Merge branch 'next/devel-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc2
From Kukjin Kim: This includes supporting legacy i2c controller and ARM down clock support for exynos5 and small changes. [olof: It contains a dependency on samsung/hdmi for HDMI DT bindings, for some reason.] * 'next/devel-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Clock settings for SATA and SATA PHY ARM: EXYNOS: Add ARM down clock support ARM: EXYNOS: Fix i2c suspend/resume for legacy controller ARM: EXYNOS: Add aliases for i2c controller ARM: EXYNOS: Setup legacy i2c controller interrupts ARM: EXYNOS: removing exynos-drm device registration from non-dt platforms ARM: EXYNOS: add clocks for exynos5 hdmi ARM: dts: add device tree support for exynos5 hdmiddc ARM: dts: add device tree support for exynos5 hdmiphy ARM: dts: add device tree support for exynos5 mixer ARM: dts: add device tree support for exynos5 hdmi ARM: EXYNOS: Add dp clock support for EXYNOS5 ARM: SAMSUNG: call clk_get_rate for debugfs rate files ARM: SAMSUNG: add clock_tree debugfs file in clock Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
Коммит
1f1ba83645
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@ -0,0 +1,22 @@
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Device-Tree bindings for drm hdmi driver
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Required properties:
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- compatible: value should be "samsung,exynos5-hdmi".
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- reg: physical base address of the hdmi and length of memory mapped
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region.
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- interrupts: interrupt number to the cpu.
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- hpd-gpio: following information about the hotplug gpio pin.
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a) phandle of the gpio controller node.
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b) pin number within the gpio controller.
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c) pin function mode.
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d) optional flags and pull up/down.
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e) drive strength.
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Example:
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hdmi {
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compatible = "samsung,exynos5-hdmi";
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reg = <0x14530000 0x100000>;
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interrupts = <0 95 0>;
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hpd-gpio = <&gpx3 7 0xf 1 3>;
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};
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@ -0,0 +1,12 @@
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Device-Tree bindings for hdmiddc driver
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Required properties:
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- compatible: value should be "samsung,exynos5-hdmiddc".
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- reg: I2C address of the hdmiddc device.
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Example:
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hdmiddc {
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compatible = "samsung,exynos5-hdmiddc";
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reg = <0x50>;
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};
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@ -0,0 +1,12 @@
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Device-Tree bindings for hdmiphy driver
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Required properties:
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- compatible: value should be "samsung,exynos5-hdmiphy".
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- reg: I2C address of the hdmiphy device.
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Example:
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hdmiphy {
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compatible = "samsung,exynos5-hdmiphy";
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reg = <0x38>;
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};
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@ -0,0 +1,15 @@
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Device-Tree bindings for mixer driver
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Required properties:
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- compatible: value should be "samsung,exynos5-mixer".
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- reg: physical base address of the mixer and length of memory mapped
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region.
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- interrupts: interrupt number to the cpu.
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Example:
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mixer {
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compatible = "samsung,exynos5-mixer";
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reg = <0x14450000 0x10000>;
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interrupts = <0 94 0>;
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};
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@ -56,7 +56,15 @@
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};
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i2c@12C80000 {
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status = "disabled";
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samsung,i2c-sda-delay = <100>;
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samsung,i2c-max-bus-freq = <66000>;
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gpios = <&gpa0 6 3 3 0>,
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<&gpa0 7 3 3 0>;
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hdmiddc@50 {
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compatible = "samsung,exynos5-hdmiddc";
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reg = <0x50>;
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};
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};
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i2c@12C90000 {
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@ -79,6 +87,16 @@
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status = "disabled";
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};
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i2c@12CE0000 {
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samsung,i2c-sda-delay = <100>;
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samsung,i2c-max-bus-freq = <66000>;
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hdmiphy@38 {
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compatible = "samsung,exynos5-hdmiphy";
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reg = <0x38>;
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};
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};
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dwmmc_0: dwmmc0@12200000 {
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num-slots = <1>;
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supports-highspeed;
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@ -166,4 +184,8 @@
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spi_2: spi@12d40000 {
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status = "disabled";
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};
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hdmi {
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hpd-gpio = <&gpx3 7 0xf 1 3>;
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};
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};
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@ -31,6 +31,15 @@
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gsc1 = &gsc_1;
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gsc2 = &gsc_2;
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gsc3 = &gsc_3;
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i2c0 = &i2c_0;
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i2c1 = &i2c_1;
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i2c2 = &i2c_2;
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i2c3 = &i2c_3;
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i2c4 = &i2c_4;
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i2c5 = &i2c_5;
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i2c6 = &i2c_6;
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i2c7 = &i2c_7;
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i2c8 = &i2c_8;
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};
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gic:interrupt-controller@10481000 {
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@ -92,7 +101,7 @@
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interrupts = <0 54 0>;
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};
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i2c@12C60000 {
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i2c_0: i2c@12C60000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12C60000 0x100>;
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interrupts = <0 56 0>;
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@ -100,7 +109,7 @@
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#size-cells = <0>;
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};
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i2c@12C70000 {
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i2c_1: i2c@12C70000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12C70000 0x100>;
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interrupts = <0 57 0>;
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@ -108,7 +117,7 @@
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#size-cells = <0>;
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};
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i2c@12C80000 {
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i2c_2: i2c@12C80000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12C80000 0x100>;
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interrupts = <0 58 0>;
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@ -116,7 +125,7 @@
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#size-cells = <0>;
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};
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i2c@12C90000 {
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i2c_3: i2c@12C90000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12C90000 0x100>;
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interrupts = <0 59 0>;
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@ -124,7 +133,7 @@
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#size-cells = <0>;
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};
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i2c@12CA0000 {
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i2c_4: i2c@12CA0000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12CA0000 0x100>;
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interrupts = <0 60 0>;
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@ -132,7 +141,7 @@
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#size-cells = <0>;
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};
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i2c@12CB0000 {
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i2c_5: i2c@12CB0000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12CB0000 0x100>;
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interrupts = <0 61 0>;
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@ -140,7 +149,7 @@
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#size-cells = <0>;
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};
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i2c@12CC0000 {
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i2c_6: i2c@12CC0000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12CC0000 0x100>;
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interrupts = <0 62 0>;
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@ -148,7 +157,7 @@
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#size-cells = <0>;
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};
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i2c@12CD0000 {
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i2c_7: i2c@12CD0000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12CD0000 0x100>;
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interrupts = <0 63 0>;
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@ -156,6 +165,14 @@
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#size-cells = <0>;
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};
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i2c_8: i2c@12CE0000 {
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compatible = "samsung,s3c2440-hdmiphy-i2c";
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reg = <0x12CE0000 0x1000>;
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interrupts = <0 64 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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spi_0: spi@12d20000 {
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compatible = "samsung,exynos4210-spi";
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reg = <0x12d20000 0x100>;
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@ -520,4 +537,16 @@
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reg = <0x13e30000 0x1000>;
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interrupts = <0 88 0>;
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};
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hdmi {
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compatible = "samsung,exynos5-hdmi";
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reg = <0x14530000 0x100000>;
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interrupts = <0 95 0>;
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};
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mixer {
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compatible = "samsung,exynos5-mixer";
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reg = <0x14450000 0x10000>;
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interrupts = <0 94 0>;
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};
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};
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@ -53,7 +53,6 @@ obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o
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obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o
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obj-$(CONFIG_EXYNOS_DEV_DMA) += dma.o
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obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o
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obj-$(CONFIG_EXYNOS_DEV_DRM) += dev-drm.o
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obj-$(CONFIG_EXYNOS_DEV_SYSMMU) += dev-sysmmu.o
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obj-$(CONFIG_ARCH_EXYNOS) += setup-i2c0.o
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@ -80,6 +80,8 @@ static struct sleep_save exynos5_clock_save[] = {
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SAVE_ITEM(EXYNOS5_VPLL_CON0),
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SAVE_ITEM(EXYNOS5_VPLL_CON1),
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SAVE_ITEM(EXYNOS5_VPLL_CON2),
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SAVE_ITEM(EXYNOS5_PWR_CTRL1),
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SAVE_ITEM(EXYNOS5_PWR_CTRL2),
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};
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#endif
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@ -196,6 +198,11 @@ static int exynos5_clk_ip_isp1_ctrl(struct clk *clk, int enable)
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return s5p_gatectrl(EXYNOS5_CLKGATE_IP_ISP1, clk, enable);
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}
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static int exynos5_clk_hdmiphy_ctrl(struct clk *clk, int enable)
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{
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return s5p_gatectrl(S5P_HDMI_PHY_CONTROL, clk, enable);
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}
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/* Core list of CMU_CPU side */
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static struct clksrc_clk exynos5_clk_mout_apll = {
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@ -651,15 +658,20 @@ static struct clk exynos5_init_clocks_off[] = {
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.ctrlbit = (1 << 15),
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}, {
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.name = "sata",
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.devname = "ahci",
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.devname = "exynos5-sata",
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.parent = &exynos5_clk_aclk_200.clk,
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.enable = exynos5_clk_ip_fsys_ctrl,
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.ctrlbit = (1 << 6),
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}, {
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.name = "sata_phy",
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.name = "sata-phy",
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.devname = "exynos5-sata-phy",
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.parent = &exynos5_clk_aclk_200.clk,
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.enable = exynos5_clk_ip_fsys_ctrl,
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.ctrlbit = (1 << 24),
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}, {
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.name = "sata_phy_i2c",
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.name = "i2c",
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.devname = "exynos5-sata-phy-i2c",
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.parent = &exynos5_clk_aclk_200.clk,
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.enable = exynos5_clk_ip_fsys_ctrl,
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.ctrlbit = (1 << 25),
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}, {
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@ -669,14 +681,24 @@ static struct clk exynos5_init_clocks_off[] = {
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.ctrlbit = (1 << 0),
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}, {
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.name = "hdmi",
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.devname = "exynos4-hdmi",
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.devname = "exynos5-hdmi",
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.enable = exynos5_clk_ip_disp1_ctrl,
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.ctrlbit = (1 << 6),
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}, {
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.name = "hdmiphy",
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.devname = "exynos5-hdmi",
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.enable = exynos5_clk_hdmiphy_ctrl,
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.ctrlbit = (1 << 0),
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}, {
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.name = "mixer",
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.devname = "s5p-mixer",
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.devname = "exynos5-mixer",
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.enable = exynos5_clk_ip_disp1_ctrl,
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.ctrlbit = (1 << 5),
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}, {
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.name = "dp",
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.devname = "exynos-dp",
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.enable = exynos5_clk_ip_disp1_ctrl,
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.ctrlbit = (1 << 4),
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}, {
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.name = "jpeg",
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.enable = exynos5_clk_ip_gen_ctrl,
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@ -1224,6 +1246,16 @@ static struct clksrc_clk exynos5_clksrcs[] = {
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.sources = &exynos5_clkset_aclk,
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.reg_src = { .reg = EXYNOS5_CLKSRC_TOP0, .shift = 20, .size = 1 },
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.reg_div = { .reg = EXYNOS5_CLKDIV_TOP0, .shift = 24, .size = 3 },
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}, {
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.clk = {
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.name = "sclk_sata",
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.devname = "exynos5-sata",
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.enable = exynos5_clksrc_mask_fsys_ctrl,
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.ctrlbit = (1 << 24),
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},
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.sources = &exynos5_clkset_aclk,
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.reg_src = { .reg = EXYNOS5_CLKSRC_FSYS, .shift = 24, .size = 1 },
|
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.reg_div = { .reg = EXYNOS5_CLKDIV_FSYS0, .shift = 20, .size = 4 },
|
||||
}, {
|
||||
.clk = {
|
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.name = "sclk_gscl_wrap",
|
||||
|
|
|
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@ -21,6 +21,7 @@
|
|||
#include <asm/suspend.h>
|
||||
#include <asm/unified.h>
|
||||
#include <asm/cpuidle.h>
|
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#include <mach/regs-clock.h>
|
||||
#include <mach/regs-pmu.h>
|
||||
#include <mach/pmu.h>
|
||||
|
||||
|
|
@ -156,12 +157,47 @@ static int exynos4_enter_lowpower(struct cpuidle_device *dev,
|
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return exynos4_enter_core0_aftr(dev, drv, new_index);
|
||||
}
|
||||
|
||||
static void __init exynos5_core_down_clk(void)
|
||||
{
|
||||
unsigned int tmp;
|
||||
|
||||
/*
|
||||
* Enable arm clock down (in idle) and set arm divider
|
||||
* ratios in WFI/WFE state.
|
||||
*/
|
||||
tmp = PWR_CTRL1_CORE2_DOWN_RATIO | \
|
||||
PWR_CTRL1_CORE1_DOWN_RATIO | \
|
||||
PWR_CTRL1_DIV2_DOWN_EN | \
|
||||
PWR_CTRL1_DIV1_DOWN_EN | \
|
||||
PWR_CTRL1_USE_CORE1_WFE | \
|
||||
PWR_CTRL1_USE_CORE0_WFE | \
|
||||
PWR_CTRL1_USE_CORE1_WFI | \
|
||||
PWR_CTRL1_USE_CORE0_WFI;
|
||||
__raw_writel(tmp, EXYNOS5_PWR_CTRL1);
|
||||
|
||||
/*
|
||||
* Enable arm clock up (on exiting idle). Set arm divider
|
||||
* ratios when not in idle along with the standby duration
|
||||
* ratios.
|
||||
*/
|
||||
tmp = PWR_CTRL2_DIV2_UP_EN | \
|
||||
PWR_CTRL2_DIV1_UP_EN | \
|
||||
PWR_CTRL2_DUR_STANDBY2_VAL | \
|
||||
PWR_CTRL2_DUR_STANDBY1_VAL | \
|
||||
PWR_CTRL2_CORE2_UP_RATIO | \
|
||||
PWR_CTRL2_CORE1_UP_RATIO;
|
||||
__raw_writel(tmp, EXYNOS5_PWR_CTRL2);
|
||||
}
|
||||
|
||||
static int __init exynos4_init_cpuidle(void)
|
||||
{
|
||||
int i, max_cpuidle_state, cpu_id;
|
||||
struct cpuidle_device *device;
|
||||
struct cpuidle_driver *drv = &exynos4_idle_driver;
|
||||
|
||||
if (soc_is_exynos5250())
|
||||
exynos5_core_down_clk();
|
||||
|
||||
/* Setup cpuidle driver */
|
||||
drv->state_count = (sizeof(exynos4_cpuidle_set) /
|
||||
sizeof(struct cpuidle_state));
|
||||
|
|
|
|||
|
|
@ -1,29 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-exynos/dev-drm.c
|
||||
*
|
||||
* Copyright (c) 2012 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com
|
||||
*
|
||||
* EXYNOS - core DRM device
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
#include <plat/devs.h>
|
||||
|
||||
static u64 exynos_drm_dma_mask = DMA_BIT_MASK(32);
|
||||
|
||||
struct platform_device exynos_device_drm = {
|
||||
.name = "exynos-drm",
|
||||
.dev = {
|
||||
.dma_mask = &exynos_drm_dma_mask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
}
|
||||
};
|
||||
|
|
@ -267,6 +267,9 @@
|
|||
#define EXYNOS5_CLKDIV_STATCPU0 EXYNOS_CLKREG(0x00600)
|
||||
#define EXYNOS5_CLKDIV_STATCPU1 EXYNOS_CLKREG(0x00604)
|
||||
|
||||
#define EXYNOS5_PWR_CTRL1 EXYNOS_CLKREG(0x01020)
|
||||
#define EXYNOS5_PWR_CTRL2 EXYNOS_CLKREG(0x01024)
|
||||
|
||||
#define EXYNOS5_MPLL_CON0 EXYNOS_CLKREG(0x04100)
|
||||
#define EXYNOS5_CLKSRC_CORE1 EXYNOS_CLKREG(0x04204)
|
||||
|
||||
|
|
@ -344,6 +347,22 @@
|
|||
|
||||
#define EXYNOS5_EPLLCON0_LOCKED_SHIFT (29)
|
||||
|
||||
#define PWR_CTRL1_CORE2_DOWN_RATIO (7 << 28)
|
||||
#define PWR_CTRL1_CORE1_DOWN_RATIO (7 << 16)
|
||||
#define PWR_CTRL1_DIV2_DOWN_EN (1 << 9)
|
||||
#define PWR_CTRL1_DIV1_DOWN_EN (1 << 8)
|
||||
#define PWR_CTRL1_USE_CORE1_WFE (1 << 5)
|
||||
#define PWR_CTRL1_USE_CORE0_WFE (1 << 4)
|
||||
#define PWR_CTRL1_USE_CORE1_WFI (1 << 1)
|
||||
#define PWR_CTRL1_USE_CORE0_WFI (1 << 0)
|
||||
|
||||
#define PWR_CTRL2_DIV2_UP_EN (1 << 25)
|
||||
#define PWR_CTRL2_DIV1_UP_EN (1 << 24)
|
||||
#define PWR_CTRL2_DUR_STANDBY2_VAL (1 << 16)
|
||||
#define PWR_CTRL2_DUR_STANDBY1_VAL (1 << 8)
|
||||
#define PWR_CTRL2_CORE2_UP_RATIO (1 << 4)
|
||||
#define PWR_CTRL2_CORE1_UP_RATIO (1 << 0)
|
||||
|
||||
/* Compatibility defines and inclusion */
|
||||
|
||||
#include <mach/regs-pmu.h>
|
||||
|
|
|
|||
|
|
@ -15,6 +15,7 @@
|
|||
#include <mach/map.h>
|
||||
|
||||
#define S5P_PMUREG(x) (S5P_VA_PMU + (x))
|
||||
#define S5P_SYSREG(x) (S3C_VA_SYS + (x))
|
||||
|
||||
#define S5P_CENTRAL_SEQ_CONFIGURATION S5P_PMUREG(0x0200)
|
||||
|
||||
|
|
@ -230,6 +231,7 @@
|
|||
|
||||
/* For EXYNOS5 */
|
||||
|
||||
#define EXYNOS5_SYS_I2C_CFG S5P_SYSREG(0x0234)
|
||||
#define EXYNOS5_USB_CFG S5P_PMUREG(0x0230)
|
||||
|
||||
#define EXYNOS5_AUTO_WDTRESET_DISABLE S5P_PMUREG(0x0408)
|
||||
|
|
|
|||
|
|
@ -11,10 +11,12 @@
|
|||
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/serial_core.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/hardware/gic.h>
|
||||
#include <mach/map.h>
|
||||
#include <mach/regs-pmu.h>
|
||||
|
||||
#include <plat/cpu.h>
|
||||
#include <plat/regs-serial.h>
|
||||
|
|
@ -47,6 +49,10 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
|
|||
"s3c2440-i2c.0", NULL),
|
||||
OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(1),
|
||||
"s3c2440-i2c.1", NULL),
|
||||
OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(2),
|
||||
"s3c2440-i2c.2", NULL),
|
||||
OF_DEV_AUXDATA("samsung,s3c2440-hdmiphy-i2c", EXYNOS5_PA_IIC(8),
|
||||
"s3c2440-hdmiphy-i2c", NULL),
|
||||
OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI0,
|
||||
"dw_mmc.0", NULL),
|
||||
OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI1,
|
||||
|
|
@ -72,6 +78,10 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
|
|||
"exynos-gsc.2", NULL),
|
||||
OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC3,
|
||||
"exynos-gsc.3", NULL),
|
||||
OF_DEV_AUXDATA("samsung,exynos5-hdmi", 0x14530000,
|
||||
"exynos5-hdmi", NULL),
|
||||
OF_DEV_AUXDATA("samsung,exynos5-mixer", 0x14450000,
|
||||
"exynos5-mixer", NULL),
|
||||
{},
|
||||
};
|
||||
|
||||
|
|
@ -83,6 +93,28 @@ static void __init exynos5250_dt_map_io(void)
|
|||
|
||||
static void __init exynos5250_dt_machine_init(void)
|
||||
{
|
||||
struct device_node *i2c_np;
|
||||
const char *i2c_compat = "samsung,s3c2440-i2c";
|
||||
unsigned int tmp;
|
||||
|
||||
/*
|
||||
* Exynos5's legacy i2c controller and new high speed i2c
|
||||
* controller have muxed interrupt sources. By default the
|
||||
* interrupts for 4-channel HS-I2C controller are enabled.
|
||||
* If node for first four channels of legacy i2c controller
|
||||
* are available then re-configure the interrupts via the
|
||||
* system register.
|
||||
*/
|
||||
for_each_compatible_node(i2c_np, NULL, i2c_compat) {
|
||||
if (of_device_is_available(i2c_np)) {
|
||||
if (of_alias_get_id(i2c_np, "i2c") < 4) {
|
||||
tmp = readl(EXYNOS5_SYS_I2C_CFG);
|
||||
writel(tmp & ~(0x1 << of_alias_get_id(i2c_np, "i2c")),
|
||||
EXYNOS5_SYS_I2C_CFG);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
of_platform_populate(NULL, of_default_bus_match_table,
|
||||
exynos5250_auxdata_lookup, NULL);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1327,9 +1327,6 @@ static struct platform_device *nuri_devices[] __initdata = {
|
|||
&cam_vdda_fixed_rdev,
|
||||
&cam_8m_12v_fixed_rdev,
|
||||
&exynos4_bus_devfreq,
|
||||
#ifdef CONFIG_DRM_EXYNOS
|
||||
&exynos_device_drm,
|
||||
#endif
|
||||
};
|
||||
|
||||
static void __init nuri_map_io(void)
|
||||
|
|
|
|||
|
|
@ -709,9 +709,6 @@ static struct platform_device *origen_devices[] __initdata = {
|
|||
&s5p_device_mfc_l,
|
||||
&s5p_device_mfc_r,
|
||||
&s5p_device_mixer,
|
||||
#ifdef CONFIG_DRM_EXYNOS
|
||||
&exynos_device_drm,
|
||||
#endif
|
||||
&exynos4_device_ohci,
|
||||
&origen_device_gpiokeys,
|
||||
&origen_lcd_hv070wsa,
|
||||
|
|
|
|||
|
|
@ -317,9 +317,6 @@ static struct platform_device *smdk4x12_devices[] __initdata = {
|
|||
&s5p_device_mfc,
|
||||
&s5p_device_mfc_l,
|
||||
&s5p_device_mfc_r,
|
||||
#ifdef CONFIG_DRM_EXYNOS
|
||||
&exynos_device_drm,
|
||||
#endif
|
||||
&samsung_device_keypad,
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -300,9 +300,6 @@ static struct platform_device *smdkv310_devices[] __initdata = {
|
|||
&s5p_device_fimc_md,
|
||||
&s5p_device_g2d,
|
||||
&s5p_device_jpeg,
|
||||
#ifdef CONFIG_DRM_EXYNOS
|
||||
&exynos_device_drm,
|
||||
#endif
|
||||
&exynos4_device_ac97,
|
||||
&exynos4_device_i2s0,
|
||||
&exynos4_device_ohci,
|
||||
|
|
|
|||
|
|
@ -1081,9 +1081,6 @@ static struct platform_device *universal_devices[] __initdata = {
|
|||
&s5p_device_onenand,
|
||||
&s5p_device_fimd0,
|
||||
&s5p_device_jpeg,
|
||||
#ifdef CONFIG_DRM_EXYNOS
|
||||
&exynos_device_drm,
|
||||
#endif
|
||||
&s3c_device_usb_hsotg,
|
||||
&s5p_device_mfc,
|
||||
&s5p_device_mfc_l,
|
||||
|
|
|
|||
|
|
@ -62,6 +62,10 @@ static struct sleep_save exynos4_vpll_save[] = {
|
|||
SAVE_ITEM(EXYNOS4_VPLL_CON1),
|
||||
};
|
||||
|
||||
static struct sleep_save exynos5_sys_save[] = {
|
||||
SAVE_ITEM(EXYNOS5_SYS_I2C_CFG),
|
||||
};
|
||||
|
||||
static struct sleep_save exynos_core_save[] = {
|
||||
/* SROM side */
|
||||
SAVE_ITEM(S5P_SROM_BW),
|
||||
|
|
@ -98,6 +102,7 @@ static void exynos_pm_prepare(void)
|
|||
s3c_pm_do_save(exynos4_epll_save, ARRAY_SIZE(exynos4_epll_save));
|
||||
s3c_pm_do_save(exynos4_vpll_save, ARRAY_SIZE(exynos4_vpll_save));
|
||||
} else {
|
||||
s3c_pm_do_save(exynos5_sys_save, ARRAY_SIZE(exynos5_sys_save));
|
||||
/* Disable USE_RETENTION of JPEG_MEM_OPTION */
|
||||
tmp = __raw_readl(EXYNOS5_JPEG_MEM_OPTION);
|
||||
tmp &= ~EXYNOS5_OPTION_USE_RETENTION;
|
||||
|
|
@ -301,6 +306,10 @@ static void exynos_pm_resume(void)
|
|||
__raw_writel((1 << 28), S5P_PAD_RET_EBIA_OPTION);
|
||||
__raw_writel((1 << 28), S5P_PAD_RET_EBIB_OPTION);
|
||||
|
||||
if (soc_is_exynos5250())
|
||||
s3c_pm_do_restore(exynos5_sys_save,
|
||||
ARRAY_SIZE(exynos5_sys_save));
|
||||
|
||||
s3c_pm_do_restore_core(exynos_core_save, ARRAY_SIZE(exynos_core_save));
|
||||
|
||||
if (!soc_is_exynos5250()) {
|
||||
|
|
|
|||
|
|
@ -389,6 +389,72 @@ int __init s3c24xx_register_baseclocks(unsigned long xtal)
|
|||
|
||||
static struct dentry *clk_debugfs_root;
|
||||
|
||||
static void clock_tree_show_one(struct seq_file *s, struct clk *c, int level)
|
||||
{
|
||||
struct clk *child;
|
||||
const char *state;
|
||||
char buf[255] = { 0 };
|
||||
int n = 0;
|
||||
|
||||
if (c->name)
|
||||
n = snprintf(buf, sizeof(buf) - 1, "%s", c->name);
|
||||
|
||||
if (c->devname)
|
||||
n += snprintf(buf + n, sizeof(buf) - 1 - n, ":%s", c->devname);
|
||||
|
||||
state = (c->usage > 0) ? "on" : "off";
|
||||
|
||||
seq_printf(s, "%*s%-*s %-6s %-3d %-10lu\n",
|
||||
level * 3 + 1, "",
|
||||
50 - level * 3, buf,
|
||||
state, c->usage, clk_get_rate(c));
|
||||
|
||||
list_for_each_entry(child, &clocks, list) {
|
||||
if (child->parent != c)
|
||||
continue;
|
||||
|
||||
clock_tree_show_one(s, child, level + 1);
|
||||
}
|
||||
}
|
||||
|
||||
static int clock_tree_show(struct seq_file *s, void *data)
|
||||
{
|
||||
struct clk *c;
|
||||
unsigned long flags;
|
||||
|
||||
seq_printf(s, " clock state ref rate\n");
|
||||
seq_printf(s, "----------------------------------------------------\n");
|
||||
|
||||
spin_lock_irqsave(&clocks_lock, flags);
|
||||
|
||||
list_for_each_entry(c, &clocks, list)
|
||||
if (c->parent == NULL)
|
||||
clock_tree_show_one(s, c, 0);
|
||||
|
||||
spin_unlock_irqrestore(&clocks_lock, flags);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int clock_tree_open(struct inode *inode, struct file *file)
|
||||
{
|
||||
return single_open(file, clock_tree_show, inode->i_private);
|
||||
}
|
||||
|
||||
static const struct file_operations clock_tree_fops = {
|
||||
.open = clock_tree_open,
|
||||
.read = seq_read,
|
||||
.llseek = seq_lseek,
|
||||
.release = single_release,
|
||||
};
|
||||
|
||||
static int clock_rate_show(void *data, u64 *val)
|
||||
{
|
||||
struct clk *c = data;
|
||||
*val = clk_get_rate(c);
|
||||
return 0;
|
||||
}
|
||||
DEFINE_SIMPLE_ATTRIBUTE(clock_rate_fops, clock_rate_show, NULL, "%llu\n");
|
||||
|
||||
static int clk_debugfs_register_one(struct clk *c)
|
||||
{
|
||||
int err;
|
||||
|
|
@ -411,7 +477,7 @@ static int clk_debugfs_register_one(struct clk *c)
|
|||
goto err_out;
|
||||
}
|
||||
|
||||
d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate);
|
||||
d = debugfs_create_file("rate", S_IRUGO, c->dent, c, &clock_rate_fops);
|
||||
if (!d) {
|
||||
err = -ENOMEM;
|
||||
goto err_out;
|
||||
|
|
@ -446,13 +512,18 @@ static int __init clk_debugfs_init(void)
|
|||
{
|
||||
struct clk *c;
|
||||
struct dentry *d;
|
||||
int err;
|
||||
int err = -ENOMEM;
|
||||
|
||||
d = debugfs_create_dir("clock", NULL);
|
||||
if (!d)
|
||||
return -ENOMEM;
|
||||
clk_debugfs_root = d;
|
||||
|
||||
d = debugfs_create_file("clock_tree", S_IRUGO, clk_debugfs_root, NULL,
|
||||
&clock_tree_fops);
|
||||
if (!d)
|
||||
goto err_out;
|
||||
|
||||
list_for_each_entry(c, &clocks, list) {
|
||||
err = clk_debugfs_register(c);
|
||||
if (err)
|
||||
|
|
|
|||
|
|
@ -133,8 +133,6 @@ extern struct platform_device exynos4_device_pcm1;
|
|||
extern struct platform_device exynos4_device_pcm2;
|
||||
extern struct platform_device exynos4_device_spdif;
|
||||
|
||||
extern struct platform_device exynos_device_drm;
|
||||
|
||||
extern struct platform_device samsung_asoc_dma;
|
||||
extern struct platform_device samsung_asoc_idma;
|
||||
extern struct platform_device samsung_device_keypad;
|
||||
|
|
|
|||
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