genirq: Implement a sane sparse_irq allocator
The current sparse_irq allocator has several short comings due to failures in the design or the lack of it: - Requires iteration over the number of active irqs to find a free slot (Some architectures have grown their own workarounds for this) - Removal of entries is not possible - Racy between create_irq_nr and destroy_irq (plugged by horrible callbacks) - Migration of active irq descriptors is not possible - No bulk allocation of irq ranges - Sprinkeled irq_desc references all over the place outside of kernel/irq/ (The previous chip functions series is addressing this issue) Implement a sane allocator which fixes the above short comings (though migration of active descriptors needs a full tree wide cleanup of the direct and mostly unlocked access to irq_desc). The new allocator still uses a radix_tree, but uses a bitmap for keeping track of allocated irq numbers. That allows: - Fast lookup of a free slot - Allows the removal of descriptors - Prevents the create/destroy race - Bulk allocation of consecutive irq ranges - Basic design is ready for migration of life descriptors after further cleanups The bitmap is also used in the SPARSE_IRQ=n case for lookup and raceless (de)allocation of irq numbers. So it removes the requirement for looping through the descriptor array to find slots. Right now it uses sparse_irq_lock to protect the bitmap and the radix tree, but after cleaning up all users we should be able convert that to a mutex and to switch the radix_tree and decriptor allocations to GFP_KERNEL. [ Folded in a bugfix from Yinghai Lu ] Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
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Родитель
1318a481fc
Коммит
1f5a5b87f7
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@ -398,6 +398,29 @@ static inline struct irq_2_iommu *irq_data_get_iommu(struct irq_data *d)
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}
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#endif
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int irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node);
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void irq_free_descs(unsigned int irq, unsigned int cnt);
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static inline int irq_alloc_desc(int node)
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{
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return irq_alloc_descs(-1, 0, 1, node);
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}
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static inline int irq_alloc_desc_at(unsigned int at, int node)
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{
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return irq_alloc_descs(at, at, 1, node);
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}
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static inline int irq_alloc_desc_from(unsigned int from, int node)
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{
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return irq_alloc_descs(-1, from, 1, node);
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}
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static inline void irq_free_desc(unsigned int irq)
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{
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irq_free_descs(irq, 1);
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}
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#endif /* CONFIG_GENERIC_HARDIRQS */
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#endif /* !CONFIG_S390 */
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@ -13,6 +13,7 @@
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#include <linux/interrupt.h>
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#include <linux/kernel_stat.h>
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#include <linux/radix-tree.h>
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#include <linux/bitmap.h>
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#include "internals.h"
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@ -33,9 +34,54 @@ static void __init init_irq_default_affinity(void)
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}
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#endif
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#ifdef CONFIG_SMP
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static int alloc_masks(struct irq_desc *desc, gfp_t gfp, int node)
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{
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if (!zalloc_cpumask_var_node(&desc->irq_data.affinity, gfp, node))
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return -ENOMEM;
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#ifdef CONFIG_GENERIC_PENDING_IRQ
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if (!zalloc_cpumask_var_node(&desc->pending_mask, gfp, node)) {
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free_cpumask_var(desc->irq_data.affinity);
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return -ENOMEM;
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}
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#endif
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return 0;
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}
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static void desc_smp_init(struct irq_desc *desc, int node)
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{
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desc->node = node;
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cpumask_copy(desc->irq_data.affinity, irq_default_affinity);
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}
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#else
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static inline int
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alloc_masks(struct irq_desc *desc, gfp_t gfp, int node) { return 0; }
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static inline void desc_smp_init(struct irq_desc *desc, int node) { }
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#endif
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static void desc_set_defaults(unsigned int irq, struct irq_desc *desc, int node)
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{
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desc->irq_data.irq = irq;
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desc->irq_data.chip = &no_irq_chip;
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desc->irq_data.chip_data = NULL;
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desc->irq_data.handler_data = NULL;
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desc->irq_data.msi_desc = NULL;
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desc->status = IRQ_DEFAULT_INIT_FLAGS;
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desc->handle_irq = handle_bad_irq;
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desc->depth = 1;
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desc->name = NULL;
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memset(desc->kstat_irqs, 0, nr_cpu_ids * sizeof(*(desc->kstat_irqs)));
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desc_smp_init(desc, node);
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}
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int nr_irqs = NR_IRQS;
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EXPORT_SYMBOL_GPL(nr_irqs);
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DEFINE_RAW_SPINLOCK(sparse_irq_lock);
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static DECLARE_BITMAP(allocated_irqs, NR_IRQS);
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#ifdef CONFIG_SPARSE_IRQ
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static struct irq_desc irq_desc_init = {
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@ -85,14 +131,9 @@ static void init_one_irq_desc(int irq, struct irq_desc *desc, int node)
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arch_init_chip_data(desc, node);
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}
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/*
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* Protect the sparse_irqs:
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*/
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DEFINE_RAW_SPINLOCK(sparse_irq_lock);
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static RADIX_TREE(irq_desc_tree, GFP_ATOMIC);
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static void set_irq_desc(unsigned int irq, struct irq_desc *desc)
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static void irq_insert_desc(unsigned int irq, struct irq_desc *desc)
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{
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radix_tree_insert(&irq_desc_tree, irq, desc);
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}
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@ -111,6 +152,94 @@ void replace_irq_desc(unsigned int irq, struct irq_desc *desc)
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radix_tree_replace_slot(ptr, desc);
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}
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static void delete_irq_desc(unsigned int irq)
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{
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radix_tree_delete(&irq_desc_tree, irq);
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}
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#ifdef CONFIG_SMP
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static void free_masks(struct irq_desc *desc)
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{
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#ifdef CONFIG_GENERIC_PENDING_IRQ
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free_cpumask_var(desc->pending_mask);
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#endif
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free_cpumask_var(desc->affinity);
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}
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#else
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static inline void free_masks(struct irq_desc *desc) { }
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#endif
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static struct irq_desc *alloc_desc(int irq, int node)
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{
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struct irq_desc *desc;
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gfp_t gfp = GFP_KERNEL;
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desc = kzalloc_node(sizeof(*desc), gfp, node);
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if (!desc)
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return NULL;
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/* allocate based on nr_cpu_ids */
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desc->kstat_irqs = kzalloc_node(nr_cpu_ids * sizeof(*desc->kstat_irqs),
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gfp, node);
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if (!desc->kstat_irqs)
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goto err_desc;
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if (alloc_masks(desc, gfp, node))
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goto err_kstat;
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raw_spin_lock_init(&desc->lock);
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lockdep_set_class(&desc->lock, &irq_desc_lock_class);
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desc_set_defaults(irq, desc, node);
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return desc;
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err_kstat:
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kfree(desc->kstat_irqs);
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err_desc:
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kfree(desc);
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return NULL;
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}
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static void free_desc(unsigned int irq)
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{
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struct irq_desc *desc = irq_to_desc(irq);
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unsigned long flags;
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raw_spin_lock_irqsave(&sparse_irq_lock, flags);
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delete_irq_desc(irq);
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raw_spin_unlock_irqrestore(&sparse_irq_lock, flags);
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free_masks(desc);
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kfree(desc->kstat_irqs);
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kfree(desc);
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}
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static int alloc_descs(unsigned int start, unsigned int cnt, int node)
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{
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struct irq_desc *desc;
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unsigned long flags;
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int i;
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for (i = 0; i < cnt; i++) {
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desc = alloc_desc(start + i, node);
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if (!desc)
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goto err;
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raw_spin_lock_irqsave(&sparse_irq_lock, flags);
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irq_insert_desc(start + i, desc);
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raw_spin_unlock_irqrestore(&sparse_irq_lock, flags);
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}
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return start;
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err:
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for (i--; i >= 0; i--)
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free_desc(start + i);
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raw_spin_lock_irqsave(&sparse_irq_lock, flags);
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bitmap_clear(allocated_irqs, start, cnt);
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raw_spin_unlock_irqrestore(&sparse_irq_lock, flags);
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return -ENOMEM;
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}
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static struct irq_desc irq_desc_legacy[NR_IRQS_LEGACY] __cacheline_aligned_in_smp = {
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[0 ... NR_IRQS_LEGACY-1] = {
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.status = IRQ_DEFAULT_INIT_FLAGS,
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@ -155,7 +284,7 @@ int __init early_irq_init(void)
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lockdep_set_class(&desc[i].lock, &irq_desc_lock_class);
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alloc_desc_masks(&desc[i], node, true);
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init_desc_masks(&desc[i]);
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set_irq_desc(i, &desc[i]);
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irq_insert_desc(i, &desc[i]);
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}
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return arch_early_irq_init();
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@ -192,7 +321,7 @@ struct irq_desc * __ref irq_to_desc_alloc_node(unsigned int irq, int node)
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}
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init_one_irq_desc(irq, desc, node);
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set_irq_desc(irq, desc);
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irq_insert_desc(irq, desc);
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out_unlock:
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raw_spin_unlock_irqrestore(&sparse_irq_lock, flags);
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@ -245,8 +374,94 @@ struct irq_desc *irq_to_desc_alloc_node(unsigned int irq, int node)
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{
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return irq_to_desc(irq);
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}
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#ifdef CONFIG_SMP
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static inline int desc_node(struct irq_desc *desc)
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{
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return desc->irq_data.node;
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}
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#else
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static inline int desc_node(struct irq_desc *desc) { return 0; }
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#endif
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static void free_desc(unsigned int irq)
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{
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struct irq_desc *desc = irq_to_desc(irq);
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unsigned long flags;
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raw_spin_lock_irqsave(&desc->lock, flags);
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desc_set_defaults(irq, desc, desc_node(desc));
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raw_spin_unlock_irqrestore(&desc->lock, flags);
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}
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static inline int alloc_descs(unsigned int start, unsigned int cnt, int node)
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{
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return start;
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}
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#endif /* !CONFIG_SPARSE_IRQ */
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/* Dynamic interrupt handling */
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/**
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* irq_free_descs - free irq descriptors
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* @from: Start of descriptor range
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* @cnt: Number of consecutive irqs to free
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*/
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void irq_free_descs(unsigned int from, unsigned int cnt)
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{
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unsigned long flags;
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int i;
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if (from >= nr_irqs || (from + cnt) > nr_irqs)
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return;
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for (i = 0; i < cnt; i++)
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free_desc(from + i);
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raw_spin_lock_irqsave(&sparse_irq_lock, flags);
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bitmap_clear(allocated_irqs, from, cnt);
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raw_spin_unlock_irqrestore(&sparse_irq_lock, flags);
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}
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/**
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* irq_alloc_descs - allocate and initialize a range of irq descriptors
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* @irq: Allocate for specific irq number if irq >= 0
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* @from: Start the search from this irq number
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* @cnt: Number of consecutive irqs to allocate.
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* @node: Preferred node on which the irq descriptor should be allocated
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*
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* Returns the first irq number or error code
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*/
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int __ref
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irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node)
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{
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unsigned long flags;
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int start, ret;
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if (!cnt)
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return -EINVAL;
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raw_spin_lock_irqsave(&sparse_irq_lock, flags);
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start = bitmap_find_next_zero_area(allocated_irqs, nr_irqs, from, cnt, 0);
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ret = -EEXIST;
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if (irq >=0 && start != irq)
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goto err;
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ret = -ENOMEM;
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if (start >= nr_irqs)
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goto err;
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bitmap_set(allocated_irqs, start, cnt);
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raw_spin_unlock_irqrestore(&sparse_irq_lock, flags);
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return alloc_descs(start, cnt, node);
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err:
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raw_spin_unlock_irqrestore(&sparse_irq_lock, flags);
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return ret;
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}
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/* Statistics access */
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void clear_kstat_irqs(struct irq_desc *desc)
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{
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memset(desc->kstat_irqs, 0, nr_cpu_ids * sizeof(*(desc->kstat_irqs)));
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