pmac-zilog: cleanup
Whitespace cleanups and comment typo fix. Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
This commit is contained in:
Finn Thain
Geert Uytterhoeven
Родитель
2724daf439
Коммит
1f7b5fff50
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@ -153,8 +153,8 @@ static void pmz_load_zsregs(struct uart_pmac_port *uap, u8 *regs)
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write_zsreg(uap, R10, regs[R10]);
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/* Set TX/RX controls sans the enable bits. */
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write_zsreg(uap, R3, regs[R3] & ~RxENABLE);
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write_zsreg(uap, R5, regs[R5] & ~TxENABLE);
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write_zsreg(uap, R3, regs[R3] & ~RxENABLE);
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write_zsreg(uap, R5, regs[R5] & ~TxENABLE);
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/* now set R7 "prime" on ESCC */
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write_zsreg(uap, R15, regs[R15] | EN85C30);
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@ -205,7 +205,7 @@ static void pmz_load_zsregs(struct uart_pmac_port *uap, u8 *regs)
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*/
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static void pmz_maybe_update_regs(struct uart_pmac_port *uap)
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{
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if (!ZS_REGS_HELD(uap)) {
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if (!ZS_REGS_HELD(uap)) {
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if (ZS_TX_ACTIVE(uap)) {
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uap->flags |= PMACZILOG_FLAG_REGS_HELD;
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} else {
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@ -281,7 +281,7 @@ static struct tty_struct *pmz_receive_chars(struct uart_pmac_port *uap)
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spin_lock(&uap->port.lock);
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if (swallow)
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goto next_char;
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}
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}
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#endif /* CONFIG_MAGIC_SYSRQ && CONFIG_SERIAL_CORE_CONSOLE */
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/* A real serial line, record the character and status. */
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@ -317,7 +317,7 @@ static struct tty_struct *pmz_receive_chars(struct uart_pmac_port *uap)
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if (uap->port.ignore_status_mask == 0xff ||
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(r1 & uap->port.ignore_status_mask) == 0) {
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tty_insert_flip_char(tty, ch, flag);
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tty_insert_flip_char(tty, ch, flag);
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}
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if (r1 & Rx_OVR)
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tty_insert_flip_char(tty, 0, TTY_OVERRUN);
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@ -470,47 +470,47 @@ static irqreturn_t pmz_interrupt(int irq, void *dev_id)
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uap_a = pmz_get_port_A(uap);
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uap_b = uap_a->mate;
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spin_lock(&uap_a->port.lock);
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spin_lock(&uap_a->port.lock);
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r3 = read_zsreg(uap_a, R3);
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#ifdef DEBUG_HARD
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pmz_debug("irq, r3: %x\n", r3);
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#endif
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/* Channel A */
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/* Channel A */
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tty = NULL;
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if (r3 & (CHAEXT | CHATxIP | CHARxIP)) {
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if (r3 & (CHAEXT | CHATxIP | CHARxIP)) {
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write_zsreg(uap_a, R0, RES_H_IUS);
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zssync(uap_a);
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if (r3 & CHAEXT)
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pmz_status_handle(uap_a);
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if (r3 & CHAEXT)
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pmz_status_handle(uap_a);
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if (r3 & CHARxIP)
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tty = pmz_receive_chars(uap_a);
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if (r3 & CHATxIP)
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pmz_transmit_chars(uap_a);
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rc = IRQ_HANDLED;
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}
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spin_unlock(&uap_a->port.lock);
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if (r3 & CHATxIP)
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pmz_transmit_chars(uap_a);
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rc = IRQ_HANDLED;
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}
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spin_unlock(&uap_a->port.lock);
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if (tty != NULL)
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tty_flip_buffer_push(tty);
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if (uap_b->node == NULL)
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goto out;
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spin_lock(&uap_b->port.lock);
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spin_lock(&uap_b->port.lock);
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tty = NULL;
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if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) {
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write_zsreg(uap_b, R0, RES_H_IUS);
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zssync(uap_b);
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if (r3 & CHBEXT)
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pmz_status_handle(uap_b);
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if (r3 & CHBRxIP)
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tty = pmz_receive_chars(uap_b);
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if (r3 & CHBTxIP)
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pmz_transmit_chars(uap_b);
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rc = IRQ_HANDLED;
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}
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spin_unlock(&uap_b->port.lock);
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if (r3 & CHBEXT)
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pmz_status_handle(uap_b);
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if (r3 & CHBRxIP)
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tty = pmz_receive_chars(uap_b);
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if (r3 & CHBTxIP)
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pmz_transmit_chars(uap_b);
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rc = IRQ_HANDLED;
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}
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spin_unlock(&uap_b->port.lock);
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if (tty != NULL)
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tty_flip_buffer_push(tty);
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@ -718,7 +718,7 @@ static void pmz_enable_ms(struct uart_port *port)
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if (ZS_IS_ASLEEP(uap))
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return;
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/* NOTE: Not subject to 'transmitter active' rule. */
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/* NOTE: Not subject to 'transmitter active' rule. */
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write_zsreg(uap, R15, uap->curregs[R15]);
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}
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}
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@ -748,7 +748,7 @@ static void pmz_break_ctl(struct uart_port *port, int break_state)
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if (new_reg != uap->curregs[R5]) {
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uap->curregs[R5] = new_reg;
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/* NOTE: Not subject to 'transmitter active' rule. */
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/* NOTE: Not subject to 'transmitter active' rule. */
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if (ZS_IS_ASLEEP(uap))
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return;
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write_zsreg(uap, R5, uap->curregs[R5]);
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@ -908,7 +908,6 @@ static int __pmz_startup(struct uart_pmac_port *uap)
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/* Remember status for DCD/CTS changes */
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uap->prev_status = read_zsreg(uap, R0);
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return pwr_delay;
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}
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@ -983,7 +982,7 @@ static int pmz_startup(struct uart_port *port)
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if (!ZS_IS_EXTCLK(uap))
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uap->curregs[R1] |= EXT_INT_ENAB;
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write_zsreg(uap, R1, uap->curregs[R1]);
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spin_unlock_irqrestore(&port->lock, flags);
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spin_unlock_irqrestore(&port->lock, flags);
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pmz_debug("pmz: startup() done.\n");
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@ -1003,7 +1002,7 @@ static void pmz_shutdown(struct uart_port *port)
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mutex_lock(&pmz_irq_mutex);
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/* Release interrupt handler */
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free_irq(uap->port.irq, uap);
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free_irq(uap->port.irq, uap);
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spin_lock_irqsave(&port->lock, flags);
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@ -1051,7 +1050,6 @@ static void pmz_convert_to_zs(struct uart_pmac_port *uap, unsigned int cflag,
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{
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int brg;
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/* Switch to external clocking for IrDA high clock rates. That
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* code could be re-used for Midi interfaces with different
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* multipliers
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@ -1223,12 +1221,12 @@ static void pmz_irda_setup(struct uart_pmac_port *uap, unsigned long *baud)
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uap->curregs[R5] |= DTR;
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write_zsreg(uap, R5, uap->curregs[R5]);
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zssync(uap);
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mdelay(1);
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mdelay(1);
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/* Switch SCC to 19200 */
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pmz_convert_to_zs(uap, CS8, 0, 19200);
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pmz_load_zsregs(uap, uap->curregs);
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mdelay(1);
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mdelay(1);
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/* Write get_version command byte */
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write_zsdata(uap, 1);
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@ -1463,7 +1461,7 @@ static int __init pmz_init_port(struct uart_pmac_port *uap)
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return -ENODEV;
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uap->port.mapbase = r_ports.start;
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uap->port.membase = ioremap(uap->port.mapbase, 0x1000);
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uap->control_reg = uap->port.membase;
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uap->data_reg = uap->control_reg + 0x10;
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@ -1590,7 +1588,7 @@ static void pmz_dispose_port(struct uart_pmac_port *uap)
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}
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/*
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* Called upon match with an escc node in the devive-tree.
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* Called upon match with an escc node in the device-tree.
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*/
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static int pmz_attach(struct macio_dev *mdev, const struct of_device_id *match)
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{
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@ -1812,7 +1810,7 @@ static int __init pmz_probe(void)
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pmz_ports[count].node = node_a;
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pmz_ports[count+1].node = node_b;
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pmz_ports[count].port.line = count;
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pmz_ports[count+1].port.line = count+1;
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pmz_ports[count+1].port.line = count+1;
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/*
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* Setup the ports for real
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@ -1899,23 +1897,22 @@ err_out:
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static struct of_device_id pmz_match[] =
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{
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{
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.name = "ch-a",
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.name = "ch-a",
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},
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{
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.name = "ch-b",
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.name = "ch-b",
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},
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{},
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};
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MODULE_DEVICE_TABLE (of, pmz_match);
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static struct macio_driver pmz_driver =
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{
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static struct macio_driver pmz_driver = {
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.name = "pmac_zilog",
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.match_table = pmz_match,
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.probe = pmz_attach,
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.remove = pmz_detach,
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.suspend = pmz_suspend,
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.resume = pmz_resume,
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.resume = pmz_resume,
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};
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static int __init init_pmz(void)
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@ -1952,7 +1949,7 @@ static int __init init_pmz(void)
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pmz_dispose_port(&pmz_ports[i]);
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return rc;
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}
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/*
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* Then we register the macio driver itself
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*/
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@ -2034,7 +2031,7 @@ static int __init pmz_console_setup(struct console *co, char *options)
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if (of_machine_is_compatible("RackMac1,1")
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|| of_machine_is_compatible("RackMac1,2")
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|| of_machine_is_compatible("MacRISC4"))
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baud = 57600;
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baud = 57600;
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/*
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* Check whether an invalid uart number has been specified, and
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@ -1,7 +1,7 @@
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#ifndef __PMAC_ZILOG_H__
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#define __PMAC_ZILOG_H__
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#define pmz_debug(fmt,arg...) dev_dbg(&uap->dev->ofdev.dev, fmt, ## arg)
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#define pmz_debug(fmt, arg...) dev_dbg(&uap->dev->ofdev.dev, fmt, ## arg)
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/*
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* At most 2 ESCCs with 2 ports each
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@ -113,7 +113,7 @@ static inline void zssync(struct uart_pmac_port *port)
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#define BRG_TO_BPS(brg, freq) ((freq) / 2 / ((brg) + 2))
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#define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
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#define ZS_CLOCK 3686400 /* Z8530 RTxC input clock rate */
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#define ZS_CLOCK 3686400 /* Z8530 RTxC input clock rate */
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/* The Zilog register set */
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@ -171,7 +171,7 @@ static inline void zssync(struct uart_pmac_port *port)
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/* Write Register 3 */
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#define RxENABLE 0x1 /* Rx Enable */
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#define RxENABLE 0x1 /* Rx Enable */
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#define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
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#define ADD_SM 0x4 /* Address Search Mode (SDLC) */
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#define RxCRC_ENAB 0x8 /* Rx CRC Enable */
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@ -185,7 +185,7 @@ static inline void zssync(struct uart_pmac_port *port)
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/* Write Register 4 */
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#define PAR_ENAB 0x1 /* Parity Enable */
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#define PAR_ENAB 0x1 /* Parity Enable */
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#define PAR_EVEN 0x2 /* Parity Even/Odd* */
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#define SYNC_ENAB 0 /* Sync Modes Enable */
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@ -210,7 +210,7 @@ static inline void zssync(struct uart_pmac_port *port)
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#define TxCRC_ENAB 0x1 /* Tx CRC Enable */
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#define RTS 0x2 /* RTS */
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#define SDLC_CRC 0x4 /* SDLC/CRC-16 */
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#define TxENABLE 0x8 /* Tx Enable */
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#define TxENABLE 0x8 /* Tx Enable */
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#define SND_BRK 0x10 /* Send Break */
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#define Tx5 0x0 /* Tx 5 bits (or less)/character */
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#define Tx7 0x20 /* Tx 7 bits/character */
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@ -372,11 +372,11 @@ static inline void zssync(struct uart_pmac_port *port)
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#define ZS_TX_ACTIVE(UP) ((UP)->flags & PMACZILOG_FLAG_TX_ACTIVE)
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#define ZS_WANTS_MODEM_STATUS(UP) ((UP)->flags & PMACZILOG_FLAG_MODEM_STATUS)
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#define ZS_IS_IRDA(UP) ((UP)->flags & PMACZILOG_FLAG_IS_IRDA)
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#define ZS_IS_INTMODEM(UP) ((UP)->flags & PMACZILOG_FLAG_IS_INTMODEM)
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#define ZS_IS_INTMODEM(UP) ((UP)->flags & PMACZILOG_FLAG_IS_INTMODEM)
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#define ZS_HAS_DMA(UP) ((UP)->flags & PMACZILOG_FLAG_HAS_DMA)
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#define ZS_IS_ASLEEP(UP) ((UP)->flags & PMACZILOG_FLAG_IS_ASLEEP)
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#define ZS_IS_OPEN(UP) ((UP)->flags & PMACZILOG_FLAG_IS_OPEN)
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#define ZS_IS_IRQ_ON(UP) ((UP)->flags & PMACZILOG_FLAG_IS_IRQ_ON)
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#define ZS_IS_EXTCLK(UP) ((UP)->flags & PMACZILOG_FLAG_IS_EXTCLK)
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#define ZS_IS_ASLEEP(UP) ((UP)->flags & PMACZILOG_FLAG_IS_ASLEEP)
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#define ZS_IS_OPEN(UP) ((UP)->flags & PMACZILOG_FLAG_IS_OPEN)
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#define ZS_IS_IRQ_ON(UP) ((UP)->flags & PMACZILOG_FLAG_IS_IRQ_ON)
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#define ZS_IS_EXTCLK(UP) ((UP)->flags & PMACZILOG_FLAG_IS_EXTCLK)
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#endif /* __PMAC_ZILOG_H__ */
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