PCI: Add generic config accessors
Many PCI controllers' configuration space accesses are memory-mapped and vary only in address calculation and access checks. There are 2 main access methods: a decoded address space such as ECAM or a single address and data register similar to x86. This implementation can support both cases as well as be used in cases that need additional pre- or post-access handling. Add a new pci_ops member, map_bus, which can do access checks and any necessary setup. It returns the address to use for the configuration space access. The access types supported are 32-bit only accesses or correct byte, word, or dword sized accesses. Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
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@ -67,6 +67,93 @@ EXPORT_SYMBOL(pci_bus_write_config_byte);
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EXPORT_SYMBOL(pci_bus_write_config_word);
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EXPORT_SYMBOL(pci_bus_write_config_dword);
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int pci_generic_config_read(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 *val)
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{
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void __iomem *addr;
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addr = bus->ops->map_bus(bus, devfn, where);
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if (!addr) {
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*val = ~0;
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return PCIBIOS_DEVICE_NOT_FOUND;
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}
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if (size == 1)
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*val = readb(addr);
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else if (size == 2)
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*val = readw(addr);
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else
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*val = readl(addr);
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return PCIBIOS_SUCCESSFUL;
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}
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EXPORT_SYMBOL_GPL(pci_generic_config_read);
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int pci_generic_config_write(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 val)
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{
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void __iomem *addr;
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addr = bus->ops->map_bus(bus, devfn, where);
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if (!addr)
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return PCIBIOS_DEVICE_NOT_FOUND;
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if (size == 1)
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writeb(val, addr);
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else if (size == 2)
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writew(val, addr);
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else
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writel(val, addr);
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return PCIBIOS_SUCCESSFUL;
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}
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EXPORT_SYMBOL_GPL(pci_generic_config_write);
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int pci_generic_config_read32(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 *val)
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{
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void __iomem *addr;
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addr = bus->ops->map_bus(bus, devfn, where & ~0x3);
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if (!addr) {
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*val = ~0;
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return PCIBIOS_DEVICE_NOT_FOUND;
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}
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*val = readl(addr);
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if (size <= 2)
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*val = (*val >> (8 * (where & 3))) & ((1 << (size * 8)) - 1);
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return PCIBIOS_SUCCESSFUL;
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}
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EXPORT_SYMBOL_GPL(pci_generic_config_read32);
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int pci_generic_config_write32(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 val)
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{
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void __iomem *addr;
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u32 mask, tmp;
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addr = bus->ops->map_bus(bus, devfn, where & ~0x3);
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if (!addr)
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return PCIBIOS_DEVICE_NOT_FOUND;
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if (size == 4) {
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writel(val, addr);
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return PCIBIOS_SUCCESSFUL;
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} else {
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mask = ~(((1 << (size * 8)) - 1) << ((where & 0x3) * 8));
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}
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tmp = readl(addr) & mask;
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tmp |= val << ((where & 0x3) * 8);
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writel(tmp, addr);
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return PCIBIOS_SUCCESSFUL;
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}
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EXPORT_SYMBOL_GPL(pci_generic_config_write32);
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/**
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* pci_bus_set_ops - Set raw operations of pci bus
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* @bus: pci bus struct
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@ -560,6 +560,7 @@ static inline int pcibios_err_to_errno(int err)
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/* Low-level architecture-dependent routines */
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struct pci_ops {
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void __iomem *(*map_bus)(struct pci_bus *bus, unsigned int devfn, int where);
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int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
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int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
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};
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@ -857,6 +858,16 @@ int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
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int where, u16 val);
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int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
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int where, u32 val);
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int pci_generic_config_read(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 *val);
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int pci_generic_config_write(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 val);
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int pci_generic_config_read32(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 *val);
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int pci_generic_config_write32(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 val);
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struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops);
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static inline int pci_read_config_byte(const struct pci_dev *dev, int where, u8 *val)
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