powerpc/85xx: add hardware automatically enter altivec idle state
Each core's AltiVec unit may be placed into a power savings mode by turning off power to the unit. Core hardware will automatically power down the AltiVec unit after no AltiVec instructions have executed in N cycles. The AltiVec power-control is triggered by hardware. Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
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@ -53,6 +53,25 @@ _GLOBAL(__e500_dcache_setup)
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isync
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blr
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/*
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* FIXME - we haven't yet done testing to determine a reasonable default
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* value for AV_WAIT_IDLE_BIT.
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*/
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#define AV_WAIT_IDLE_BIT 50 /* 1ms, TB frequency is 41.66MHZ */
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_GLOBAL(setup_altivec_idle)
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mfspr r3, SPRN_PWRMGTCR0
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/* Enable Altivec Idle */
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oris r3, r3, PWRMGTCR0_AV_IDLE_PD_EN@h
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li r11, AV_WAIT_IDLE_BIT
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/* Set Automatic AltiVec Idle Count */
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rlwimi r3, r11, PWRMGTCR0_AV_IDLE_CNT_SHIFT, PWRMGTCR0_AV_IDLE_CNT
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mtspr SPRN_PWRMGTCR0, r3
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blr
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_GLOBAL(__setup_cpu_e6500)
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mflr r6
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#ifdef CONFIG_PPC64
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@ -64,6 +83,7 @@ _GLOBAL(__setup_cpu_e6500)
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bl .setup_lrat_ivor
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1:
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#endif
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bl setup_altivec_idle
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bl __setup_cpu_e5500
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mtlr r6
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blr
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@ -131,6 +151,7 @@ _GLOBAL(__restore_cpu_e6500)
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beq 1f
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bl .setup_lrat_ivor
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1:
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bl .setup_altivec_idle
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bl __restore_cpu_e5500
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mtlr r5
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blr
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