drm/i915: Disable DPOunit clock gating
Otherwise, this can stall pipe. We also need DPLL REFA always enabled Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2634fd7fd8
Коммит
20e5bf667a
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@ -163,16 +163,31 @@ static void intel_dsi_enable(struct intel_encoder *encoder)
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static void intel_dsi_pre_enable(struct intel_encoder *encoder)
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{
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struct drm_device *dev = encoder->base.dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
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struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
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enum pipe pipe = intel_crtc->pipe;
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u32 tmp;
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DRM_DEBUG_KMS("\n");
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if (intel_dsi->dev.dev_ops->panel_reset)
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intel_dsi->dev.dev_ops->panel_reset(&intel_dsi->dev);
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/* Disable DPOunit clock gating, can stall pipe
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* and we need DPLL REFA always enabled */
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tmp = I915_READ(DPLL(pipe));
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tmp |= DPLL_REFA_CLK_ENABLE_VLV;
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I915_WRITE(DPLL(pipe), tmp);
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tmp = I915_READ(DSPCLK_GATE_D);
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tmp |= DPOUNIT_CLOCK_GATE_DISABLE;
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I915_WRITE(DSPCLK_GATE_D, tmp);
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/* put device in ready state */
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intel_dsi_device_ready(encoder);
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if (intel_dsi->dev.dev_ops->panel_reset)
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intel_dsi->dev.dev_ops->panel_reset(&intel_dsi->dev);
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if (intel_dsi->dev.dev_ops->send_otp_cmds)
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intel_dsi->dev.dev_ops->send_otp_cmds(&intel_dsi->dev);
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@ -251,14 +266,21 @@ static void intel_dsi_clear_device_ready(struct intel_encoder *encoder)
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vlv_disable_dsi_pll(encoder);
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}
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static void intel_dsi_post_disable(struct intel_encoder *encoder)
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{
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struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
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struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
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u32 val;
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DRM_DEBUG_KMS("\n");
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intel_dsi_clear_device_ready(encoder);
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val = I915_READ(DSPCLK_GATE_D);
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val &= ~DPOUNIT_CLOCK_GATE_DISABLE;
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I915_WRITE(DSPCLK_GATE_D, val);
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if (intel_dsi->dev.dev_ops->disable_panel_power)
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intel_dsi->dev.dev_ops->disable_panel_power(&intel_dsi->dev);
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}
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