drm/i915: Remove FIXME_lrc_ctx backpointer
The first pass implementation of execlists required a backpointer to the context to be held in the intel_ringbuffer. However the context pointer is available higher in the call stack. Remove the backpointer from the ring buffer structure and instead pass it down through the call stack. v2: Integrate this changeset with the removal of duplicate request/execlist queue item members. v3: Rebase v4: Rebase. Remove passing of context when the request is passed. Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> Reviewed-by: Thomas Daniel <thomas.daniel@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Nick Hoath
Daniel Vetter
Родитель
72f95afa5f
Коммит
21076372af
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@ -2422,8 +2422,7 @@ int __i915_add_request(struct intel_engine_cs *ring,
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return -ENOMEM;
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if (i915.enable_execlists) {
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struct intel_context *ctx = request->ctx;
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ringbuf = ctx->engine[ring->id].ringbuf;
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ringbuf = request->ctx->engine[ring->id].ringbuf;
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} else
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ringbuf = ring->buffer;
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@ -2436,7 +2435,7 @@ int __i915_add_request(struct intel_engine_cs *ring,
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* what.
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*/
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if (i915.enable_execlists) {
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ret = logical_ring_flush_all_caches(ringbuf);
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ret = logical_ring_flush_all_caches(ringbuf, request->ctx);
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if (ret)
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return ret;
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} else {
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@ -559,6 +559,8 @@ static int execlists_context_queue(struct intel_engine_cs *ring,
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if (request == NULL)
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return -ENOMEM;
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request->ring = ring;
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} else {
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WARN_ON(to != request->ctx);
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}
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request->ctx = to;
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request->tail = tail;
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@ -599,7 +601,8 @@ static int execlists_context_queue(struct intel_engine_cs *ring,
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return 0;
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}
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static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf)
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static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf,
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struct intel_context *ctx)
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{
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struct intel_engine_cs *ring = ringbuf->ring;
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uint32_t flush_domains;
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@ -609,7 +612,8 @@ static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf)
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if (ring->gpu_caches_dirty)
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flush_domains = I915_GEM_GPU_DOMAINS;
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ret = ring->emit_flush(ringbuf, I915_GEM_GPU_DOMAINS, flush_domains);
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ret = ring->emit_flush(ringbuf, ctx,
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I915_GEM_GPU_DOMAINS, flush_domains);
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if (ret)
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return ret;
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@ -618,6 +622,7 @@ static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf)
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}
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static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
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struct intel_context *ctx,
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struct list_head *vmas)
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{
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struct intel_engine_cs *ring = ringbuf->ring;
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@ -645,7 +650,7 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
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/* Unconditionally invalidate gpu caches and ensure that we do flush
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* any residual writes from the previous batch.
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*/
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return logical_ring_invalidate_all_caches(ringbuf);
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return logical_ring_invalidate_all_caches(ringbuf, ctx);
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}
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/**
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@ -725,13 +730,13 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
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return -EINVAL;
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}
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ret = execlists_move_to_gpu(ringbuf, vmas);
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ret = execlists_move_to_gpu(ringbuf, ctx, vmas);
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if (ret)
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return ret;
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if (ring == &dev_priv->ring[RCS] &&
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instp_mode != dev_priv->relative_constants_mode) {
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ret = intel_logical_ring_begin(ringbuf, 4);
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ret = intel_logical_ring_begin(ringbuf, ctx, 4);
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if (ret)
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return ret;
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@ -744,7 +749,7 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
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dev_priv->relative_constants_mode = instp_mode;
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}
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ret = ring->emit_bb_start(ringbuf, exec_start, flags);
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ret = ring->emit_bb_start(ringbuf, ctx, exec_start, flags);
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if (ret)
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return ret;
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@ -807,7 +812,8 @@ void intel_logical_ring_stop(struct intel_engine_cs *ring)
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I915_WRITE_MODE(ring, _MASKED_BIT_DISABLE(STOP_RING));
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}
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int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf)
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int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf,
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struct intel_context *ctx)
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{
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struct intel_engine_cs *ring = ringbuf->ring;
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int ret;
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@ -815,7 +821,7 @@ int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf)
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if (!ring->gpu_caches_dirty)
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return 0;
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ret = ring->emit_flush(ringbuf, 0, I915_GEM_GPU_DOMAINS);
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ret = ring->emit_flush(ringbuf, ctx, 0, I915_GEM_GPU_DOMAINS);
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if (ret)
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return ret;
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@ -833,10 +839,10 @@ int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf)
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* point, the tail *inside* the context is updated and the ELSP written to.
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*/
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void intel_logical_ring_advance_and_submit(struct intel_ringbuffer *ringbuf,
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struct intel_context *ctx,
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struct drm_i915_gem_request *request)
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{
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struct intel_engine_cs *ring = ringbuf->ring;
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struct intel_context *ctx = ringbuf->FIXME_lrc_ctx;
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intel_logical_ring_advance(ringbuf);
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@ -974,6 +980,7 @@ static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
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}
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static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
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struct intel_context *ctx,
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int bytes)
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{
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struct intel_engine_cs *ring = ringbuf->ring;
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@ -987,7 +994,7 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
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return ret;
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/* Force the context submission in case we have been skipping it */
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intel_logical_ring_advance_and_submit(ringbuf, NULL);
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intel_logical_ring_advance_and_submit(ringbuf, ctx, NULL);
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/* With GEM the hangcheck timer should kick us out of the loop,
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* leaving it early runs the risk of corrupting GEM state (due
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@ -1022,13 +1029,14 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
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return ret;
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}
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static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf)
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static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf,
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struct intel_context *ctx)
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{
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uint32_t __iomem *virt;
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int rem = ringbuf->size - ringbuf->tail;
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if (ringbuf->space < rem) {
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int ret = logical_ring_wait_for_space(ringbuf, rem);
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int ret = logical_ring_wait_for_space(ringbuf, ctx, rem);
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if (ret)
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return ret;
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@ -1045,18 +1053,19 @@ static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf)
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return 0;
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}
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static int logical_ring_prepare(struct intel_ringbuffer *ringbuf, int bytes)
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static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
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struct intel_context *ctx, int bytes)
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{
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int ret;
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if (unlikely(ringbuf->tail + bytes > ringbuf->effective_size)) {
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ret = logical_ring_wrap_buffer(ringbuf);
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ret = logical_ring_wrap_buffer(ringbuf, ctx);
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if (unlikely(ret))
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return ret;
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}
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if (unlikely(ringbuf->space < bytes)) {
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ret = logical_ring_wait_for_space(ringbuf, bytes);
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ret = logical_ring_wait_for_space(ringbuf, ctx, bytes);
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if (unlikely(ret))
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return ret;
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}
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@ -1077,7 +1086,8 @@ static int logical_ring_prepare(struct intel_ringbuffer *ringbuf, int bytes)
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*
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* Return: non-zero if the ringbuffer is not ready to be written to.
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*/
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int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf, int num_dwords)
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int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
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struct intel_context *ctx, int num_dwords)
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{
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struct intel_engine_cs *ring = ringbuf->ring;
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struct drm_device *dev = ring->dev;
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@ -1089,12 +1099,12 @@ int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf, int num_dwords)
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if (ret)
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return ret;
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ret = logical_ring_prepare(ringbuf, num_dwords * sizeof(uint32_t));
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ret = logical_ring_prepare(ringbuf, ctx, num_dwords * sizeof(uint32_t));
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if (ret)
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return ret;
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/* Preallocate the olr before touching the ring */
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ret = logical_ring_alloc_request(ring, ringbuf->FIXME_lrc_ctx);
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ret = logical_ring_alloc_request(ring, ctx);
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if (ret)
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return ret;
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@ -1115,11 +1125,11 @@ static int intel_logical_ring_workarounds_emit(struct intel_engine_cs *ring,
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return 0;
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ring->gpu_caches_dirty = true;
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ret = logical_ring_flush_all_caches(ringbuf);
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ret = logical_ring_flush_all_caches(ringbuf, ctx);
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if (ret)
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return ret;
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ret = intel_logical_ring_begin(ringbuf, w->count * 2 + 2);
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ret = intel_logical_ring_begin(ringbuf, ctx, w->count * 2 + 2);
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if (ret)
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return ret;
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@ -1133,7 +1143,7 @@ static int intel_logical_ring_workarounds_emit(struct intel_engine_cs *ring,
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intel_logical_ring_advance(ringbuf);
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ring->gpu_caches_dirty = true;
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ret = logical_ring_flush_all_caches(ringbuf);
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ret = logical_ring_flush_all_caches(ringbuf, ctx);
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if (ret)
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return ret;
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@ -1184,12 +1194,13 @@ static int gen8_init_render_ring(struct intel_engine_cs *ring)
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}
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static int gen8_emit_bb_start(struct intel_ringbuffer *ringbuf,
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struct intel_context *ctx,
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u64 offset, unsigned flags)
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{
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bool ppgtt = !(flags & I915_DISPATCH_SECURE);
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int ret;
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ret = intel_logical_ring_begin(ringbuf, 4);
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ret = intel_logical_ring_begin(ringbuf, ctx, 4);
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if (ret)
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return ret;
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@ -1237,6 +1248,7 @@ static void gen8_logical_ring_put_irq(struct intel_engine_cs *ring)
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}
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static int gen8_emit_flush(struct intel_ringbuffer *ringbuf,
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struct intel_context *ctx,
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u32 invalidate_domains,
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u32 unused)
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{
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@ -1246,7 +1258,7 @@ static int gen8_emit_flush(struct intel_ringbuffer *ringbuf,
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uint32_t cmd;
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int ret;
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ret = intel_logical_ring_begin(ringbuf, 4);
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ret = intel_logical_ring_begin(ringbuf, ctx, 4);
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if (ret)
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return ret;
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@ -1275,6 +1287,7 @@ static int gen8_emit_flush(struct intel_ringbuffer *ringbuf,
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}
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static int gen8_emit_flush_render(struct intel_ringbuffer *ringbuf,
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struct intel_context *ctx,
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u32 invalidate_domains,
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u32 flush_domains)
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{
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@ -1301,7 +1314,7 @@ static int gen8_emit_flush_render(struct intel_ringbuffer *ringbuf,
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flags |= PIPE_CONTROL_GLOBAL_GTT_IVB;
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}
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ret = intel_logical_ring_begin(ringbuf, 6);
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ret = intel_logical_ring_begin(ringbuf, ctx, 6);
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if (ret)
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return ret;
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@ -1333,7 +1346,7 @@ static int gen8_emit_request(struct intel_ringbuffer *ringbuf,
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u32 cmd;
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int ret;
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ret = intel_logical_ring_begin(ringbuf, 6);
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ret = intel_logical_ring_begin(ringbuf, request->ctx, 6);
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if (ret)
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return ret;
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@ -1349,7 +1362,7 @@ static int gen8_emit_request(struct intel_ringbuffer *ringbuf,
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i915_gem_request_get_seqno(ring->outstanding_lazy_request));
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intel_logical_ring_emit(ringbuf, MI_USER_INTERRUPT);
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intel_logical_ring_emit(ringbuf, MI_NOOP);
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intel_logical_ring_advance_and_submit(ringbuf, request);
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intel_logical_ring_advance_and_submit(ringbuf, request->ctx, request);
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return 0;
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}
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@ -1636,6 +1649,7 @@ int intel_lr_context_render_state_init(struct intel_engine_cs *ring,
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return 0;
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ret = ring->emit_bb_start(ringbuf,
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ctx,
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so.ggtt_offset,
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I915_DISPATCH_SECURE);
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if (ret)
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@ -1892,7 +1906,6 @@ int intel_lr_context_deferred_create(struct intel_context *ctx,
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}
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ringbuf->ring = ring;
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ringbuf->FIXME_lrc_ctx = ctx;
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ringbuf->size = 32 * PAGE_SIZE;
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ringbuf->effective_size = ringbuf->size;
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@ -38,9 +38,11 @@ void intel_logical_ring_stop(struct intel_engine_cs *ring);
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void intel_logical_ring_cleanup(struct intel_engine_cs *ring);
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int intel_logical_rings_init(struct drm_device *dev);
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int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf);
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int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf,
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struct intel_context *ctx);
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void intel_logical_ring_advance_and_submit(
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struct intel_ringbuffer *ringbuf,
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struct intel_context *ctx,
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struct drm_i915_gem_request *request);
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/**
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* intel_logical_ring_advance() - advance the ringbuffer tail
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@ -63,7 +65,9 @@ static inline void intel_logical_ring_emit(struct intel_ringbuffer *ringbuf,
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iowrite32(data, ringbuf->virtual_start + ringbuf->tail);
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ringbuf->tail += 4;
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}
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int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf, int num_dwords);
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int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
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struct intel_context *ctx,
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int num_dwords);
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/* Logical Ring Contexts */
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int intel_lr_context_render_state_init(struct intel_engine_cs *ring,
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@ -99,13 +99,6 @@ struct intel_ringbuffer {
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struct intel_engine_cs *ring;
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/*
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* FIXME: This backpointer is an artifact of the history of how the
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* execlist patches came into being. It will get removed once the basic
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* code has landed.
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*/
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struct intel_context *FIXME_lrc_ctx;
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u32 head;
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u32 tail;
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int space;
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@ -123,6 +116,8 @@ struct intel_ringbuffer {
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u32 last_retired_head;
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};
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struct intel_context;
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struct intel_engine_cs {
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const char *name;
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enum intel_ring_id {
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@ -242,9 +237,11 @@ struct intel_engine_cs {
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int (*emit_request)(struct intel_ringbuffer *ringbuf,
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struct drm_i915_gem_request *request);
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int (*emit_flush)(struct intel_ringbuffer *ringbuf,
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struct intel_context *ctx,
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u32 invalidate_domains,
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u32 flush_domains);
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int (*emit_bb_start)(struct intel_ringbuffer *ringbuf,
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struct intel_context *ctx,
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u64 offset, unsigned flags);
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/**
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