drm/vc4: Add an interface for capturing the GPU state after a hang.
This can be parsed with vc4-gpu-tools tools for trying to figure out what was going on. v2: Use __u32-style types. Signed-off-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
Eric Anholt
Родитель
b501bacc60
Коммит
214613656b
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@ -80,6 +80,8 @@ static const struct drm_ioctl_desc vc4_drm_ioctls[] = {
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DRM_IOCTL_DEF_DRV(VC4_CREATE_BO, vc4_create_bo_ioctl, 0),
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DRM_IOCTL_DEF_DRV(VC4_MMAP_BO, vc4_mmap_bo_ioctl, 0),
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DRM_IOCTL_DEF_DRV(VC4_CREATE_SHADER_BO, vc4_create_shader_bo_ioctl, 0),
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DRM_IOCTL_DEF_DRV(VC4_GET_HANG_STATE, vc4_get_hang_state_ioctl,
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DRM_ROOT_ONLY),
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};
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static struct drm_driver vc4_drm_driver = {
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@ -19,6 +19,8 @@ struct vc4_dev {
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struct drm_fbdev_cma *fbdev;
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struct vc4_hang_state *hang_state;
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/* The kernel-space BO cache. Tracks buffers that have been
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* unreferenced by all other users (refcounts of 0!) but not
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* yet freed, so we can do cheap allocations.
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@ -361,6 +363,8 @@ int vc4_create_shader_bo_ioctl(struct drm_device *dev, void *data,
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struct drm_file *file_priv);
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int vc4_mmap_bo_ioctl(struct drm_device *dev, void *data,
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struct drm_file *file_priv);
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int vc4_get_hang_state_ioctl(struct drm_device *dev, void *data,
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struct drm_file *file_priv);
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int vc4_mmap(struct file *filp, struct vm_area_struct *vma);
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int vc4_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma);
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void *vc4_prime_vmap(struct drm_gem_object *obj);
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@ -40,6 +40,186 @@ vc4_queue_hangcheck(struct drm_device *dev)
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round_jiffies_up(jiffies + msecs_to_jiffies(100)));
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}
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struct vc4_hang_state {
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struct drm_vc4_get_hang_state user_state;
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u32 bo_count;
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struct drm_gem_object **bo;
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};
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static void
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vc4_free_hang_state(struct drm_device *dev, struct vc4_hang_state *state)
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{
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unsigned int i;
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mutex_lock(&dev->struct_mutex);
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for (i = 0; i < state->user_state.bo_count; i++)
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drm_gem_object_unreference(state->bo[i]);
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mutex_unlock(&dev->struct_mutex);
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kfree(state);
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}
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int
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vc4_get_hang_state_ioctl(struct drm_device *dev, void *data,
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struct drm_file *file_priv)
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{
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struct drm_vc4_get_hang_state *get_state = data;
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struct drm_vc4_get_hang_state_bo *bo_state;
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struct vc4_hang_state *kernel_state;
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struct drm_vc4_get_hang_state *state;
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struct vc4_dev *vc4 = to_vc4_dev(dev);
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unsigned long irqflags;
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u32 i;
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int ret;
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spin_lock_irqsave(&vc4->job_lock, irqflags);
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kernel_state = vc4->hang_state;
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if (!kernel_state) {
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spin_unlock_irqrestore(&vc4->job_lock, irqflags);
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return -ENOENT;
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}
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state = &kernel_state->user_state;
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/* If the user's array isn't big enough, just return the
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* required array size.
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*/
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if (get_state->bo_count < state->bo_count) {
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get_state->bo_count = state->bo_count;
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spin_unlock_irqrestore(&vc4->job_lock, irqflags);
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return 0;
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}
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vc4->hang_state = NULL;
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spin_unlock_irqrestore(&vc4->job_lock, irqflags);
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/* Save the user's BO pointer, so we don't stomp it with the memcpy. */
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state->bo = get_state->bo;
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memcpy(get_state, state, sizeof(*state));
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bo_state = kcalloc(state->bo_count, sizeof(*bo_state), GFP_KERNEL);
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if (!bo_state) {
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ret = -ENOMEM;
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goto err_free;
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}
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for (i = 0; i < state->bo_count; i++) {
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struct vc4_bo *vc4_bo = to_vc4_bo(kernel_state->bo[i]);
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u32 handle;
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ret = drm_gem_handle_create(file_priv, kernel_state->bo[i],
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&handle);
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if (ret) {
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state->bo_count = i - 1;
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goto err;
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}
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bo_state[i].handle = handle;
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bo_state[i].paddr = vc4_bo->base.paddr;
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bo_state[i].size = vc4_bo->base.base.size;
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}
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ret = copy_to_user((void __user *)(uintptr_t)get_state->bo,
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bo_state,
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state->bo_count * sizeof(*bo_state));
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kfree(bo_state);
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err_free:
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vc4_free_hang_state(dev, kernel_state);
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err:
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return ret;
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}
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static void
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vc4_save_hang_state(struct drm_device *dev)
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{
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struct vc4_dev *vc4 = to_vc4_dev(dev);
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struct drm_vc4_get_hang_state *state;
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struct vc4_hang_state *kernel_state;
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struct vc4_exec_info *exec;
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struct vc4_bo *bo;
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unsigned long irqflags;
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unsigned int i, unref_list_count;
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kernel_state = kcalloc(1, sizeof(*state), GFP_KERNEL);
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if (!kernel_state)
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return;
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state = &kernel_state->user_state;
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spin_lock_irqsave(&vc4->job_lock, irqflags);
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exec = vc4_first_job(vc4);
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if (!exec) {
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spin_unlock_irqrestore(&vc4->job_lock, irqflags);
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return;
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}
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unref_list_count = 0;
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list_for_each_entry(bo, &exec->unref_list, unref_head)
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unref_list_count++;
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state->bo_count = exec->bo_count + unref_list_count;
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kernel_state->bo = kcalloc(state->bo_count, sizeof(*kernel_state->bo),
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GFP_ATOMIC);
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if (!kernel_state->bo) {
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spin_unlock_irqrestore(&vc4->job_lock, irqflags);
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return;
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}
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for (i = 0; i < exec->bo_count; i++) {
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drm_gem_object_reference(&exec->bo[i]->base);
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kernel_state->bo[i] = &exec->bo[i]->base;
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}
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list_for_each_entry(bo, &exec->unref_list, unref_head) {
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drm_gem_object_reference(&bo->base.base);
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kernel_state->bo[i] = &bo->base.base;
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i++;
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}
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state->start_bin = exec->ct0ca;
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state->start_render = exec->ct1ca;
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spin_unlock_irqrestore(&vc4->job_lock, irqflags);
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state->ct0ca = V3D_READ(V3D_CTNCA(0));
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state->ct0ea = V3D_READ(V3D_CTNEA(0));
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state->ct1ca = V3D_READ(V3D_CTNCA(1));
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state->ct1ea = V3D_READ(V3D_CTNEA(1));
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state->ct0cs = V3D_READ(V3D_CTNCS(0));
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state->ct1cs = V3D_READ(V3D_CTNCS(1));
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state->ct0ra0 = V3D_READ(V3D_CT00RA0);
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state->ct1ra0 = V3D_READ(V3D_CT01RA0);
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state->bpca = V3D_READ(V3D_BPCA);
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state->bpcs = V3D_READ(V3D_BPCS);
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state->bpoa = V3D_READ(V3D_BPOA);
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state->bpos = V3D_READ(V3D_BPOS);
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state->vpmbase = V3D_READ(V3D_VPMBASE);
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state->dbge = V3D_READ(V3D_DBGE);
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state->fdbgo = V3D_READ(V3D_FDBGO);
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state->fdbgb = V3D_READ(V3D_FDBGB);
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state->fdbgr = V3D_READ(V3D_FDBGR);
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state->fdbgs = V3D_READ(V3D_FDBGS);
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state->errstat = V3D_READ(V3D_ERRSTAT);
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spin_lock_irqsave(&vc4->job_lock, irqflags);
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if (vc4->hang_state) {
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spin_unlock_irqrestore(&vc4->job_lock, irqflags);
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vc4_free_hang_state(dev, kernel_state);
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} else {
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vc4->hang_state = kernel_state;
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spin_unlock_irqrestore(&vc4->job_lock, irqflags);
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}
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}
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static void
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vc4_reset(struct drm_device *dev)
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{
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@ -64,6 +244,8 @@ vc4_reset_work(struct work_struct *work)
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struct vc4_dev *vc4 =
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container_of(work, struct vc4_dev, hangcheck.reset_work);
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vc4_save_hang_state(vc4->dev);
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vc4_reset(vc4->dev);
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}
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@ -679,4 +861,7 @@ vc4_gem_destroy(struct drm_device *dev)
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}
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vc4_bo_cache_destroy(dev);
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if (vc4->hang_state)
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vc4_free_hang_state(dev, vc4->hang_state);
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}
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@ -32,6 +32,7 @@
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#define DRM_VC4_CREATE_BO 0x03
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#define DRM_VC4_MMAP_BO 0x04
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#define DRM_VC4_CREATE_SHADER_BO 0x05
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#define DRM_VC4_GET_HANG_STATE 0x06
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#define DRM_IOCTL_VC4_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_SUBMIT_CL, struct drm_vc4_submit_cl)
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#define DRM_IOCTL_VC4_WAIT_SEQNO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_WAIT_SEQNO, struct drm_vc4_wait_seqno)
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@ -39,6 +40,7 @@
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#define DRM_IOCTL_VC4_CREATE_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_CREATE_BO, struct drm_vc4_create_bo)
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#define DRM_IOCTL_VC4_MMAP_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_MMAP_BO, struct drm_vc4_mmap_bo)
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#define DRM_IOCTL_VC4_CREATE_SHADER_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_CREATE_SHADER_BO, struct drm_vc4_create_shader_bo)
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#define DRM_IOCTL_VC4_GET_HANG_STATE DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_GET_HANG_STATE, struct drm_vc4_get_hang_state)
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struct drm_vc4_submit_rcl_surface {
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__u32 hindex; /* Handle index, or ~0 if not present. */
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@ -231,4 +233,47 @@ struct drm_vc4_create_shader_bo {
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__u32 pad;
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};
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struct drm_vc4_get_hang_state_bo {
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__u32 handle;
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__u32 paddr;
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__u32 size;
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__u32 pad;
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};
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/**
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* struct drm_vc4_hang_state - ioctl argument for collecting state
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* from a GPU hang for analysis.
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*/
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struct drm_vc4_get_hang_state {
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/** Pointer to array of struct drm_vc4_get_hang_state_bo. */
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__u64 bo;
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/**
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* On input, the size of the bo array. Output is the number
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* of bos to be returned.
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*/
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__u32 bo_count;
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__u32 start_bin, start_render;
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__u32 ct0ca, ct0ea;
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__u32 ct1ca, ct1ea;
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__u32 ct0cs, ct1cs;
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__u32 ct0ra0, ct1ra0;
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__u32 bpca, bpcs;
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__u32 bpoa, bpos;
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__u32 vpmbase;
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__u32 dbge;
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__u32 fdbgo;
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__u32 fdbgb;
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__u32 fdbgr;
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__u32 fdbgs;
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__u32 errstat;
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/* Pad that we may save more registers into in the future. */
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__u32 pad[16];
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};
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#endif /* _UAPI_VC4_DRM_H_ */
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