drm: omapdrm: Fix indentation of structure and array initializers
Indenting by one tab is enough. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
This commit is contained in:
Родитель
6b94aea01d
Коммит
222025e42d
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@ -174,15 +174,15 @@ static void omap_crtc_unregister_framedone_handler(
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}
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static const struct dss_mgr_ops mgr_ops = {
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.connect = omap_crtc_connect,
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.disconnect = omap_crtc_disconnect,
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.start_update = omap_crtc_start_update,
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.enable = omap_crtc_enable,
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.disable = omap_crtc_disable,
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.set_timings = omap_crtc_set_timings,
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.set_lcd_config = omap_crtc_set_lcd_config,
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.register_framedone_handler = omap_crtc_register_framedone_handler,
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.unregister_framedone_handler = omap_crtc_unregister_framedone_handler,
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.connect = omap_crtc_connect,
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.disconnect = omap_crtc_disconnect,
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.start_update = omap_crtc_start_update,
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.enable = omap_crtc_enable,
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.disable = omap_crtc_disable,
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.set_timings = omap_crtc_set_timings,
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.set_lcd_config = omap_crtc_set_lcd_config,
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.register_framedone_handler = omap_crtc_register_framedone_handler,
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.unregister_framedone_handler = omap_crtc_unregister_framedone_handler,
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};
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/*
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@ -658,10 +658,10 @@ void omap_crtc_flush(struct drm_crtc *crtc)
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}
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static const char *channel_names[] = {
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[OMAP_DSS_CHANNEL_LCD] = "lcd",
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[OMAP_DSS_CHANNEL_DIGIT] = "tv",
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[OMAP_DSS_CHANNEL_LCD2] = "lcd2",
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[OMAP_DSS_CHANNEL_LCD3] = "lcd3",
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[OMAP_DSS_CHANNEL_LCD] = "lcd",
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[OMAP_DSS_CHANNEL_DIGIT] = "tv",
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[OMAP_DSS_CHANNEL_LCD2] = "lcd2",
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[OMAP_DSS_CHANNEL_LCD3] = "lcd3",
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};
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void omap_crtc_pre_init(void)
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@ -58,19 +58,19 @@ static const struct {
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uint32_t slot_w; /* width of each slot (in pixels) */
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uint32_t slot_h; /* height of each slot (in pixels) */
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} geom[TILFMT_NFORMATS] = {
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[TILFMT_8BIT] = GEOM(0, 0, 1),
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[TILFMT_16BIT] = GEOM(0, 1, 2),
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[TILFMT_32BIT] = GEOM(1, 1, 4),
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[TILFMT_PAGE] = GEOM(SLOT_WIDTH_BITS, SLOT_HEIGHT_BITS, 1),
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[TILFMT_8BIT] = GEOM(0, 0, 1),
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[TILFMT_16BIT] = GEOM(0, 1, 2),
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[TILFMT_32BIT] = GEOM(1, 1, 4),
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[TILFMT_PAGE] = GEOM(SLOT_WIDTH_BITS, SLOT_HEIGHT_BITS, 1),
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};
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/* lookup table for registers w/ per-engine instances */
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static const uint32_t reg[][4] = {
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[PAT_STATUS] = {DMM_PAT_STATUS__0, DMM_PAT_STATUS__1,
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DMM_PAT_STATUS__2, DMM_PAT_STATUS__3},
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[PAT_DESCR] = {DMM_PAT_DESCR__0, DMM_PAT_DESCR__1,
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DMM_PAT_DESCR__2, DMM_PAT_DESCR__3},
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[PAT_STATUS] = {DMM_PAT_STATUS__0, DMM_PAT_STATUS__1,
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DMM_PAT_STATUS__2, DMM_PAT_STATUS__3},
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[PAT_DESCR] = {DMM_PAT_DESCR__0, DMM_PAT_DESCR__1,
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DMM_PAT_DESCR__2, DMM_PAT_DESCR__3},
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};
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/* simple allocator to grab next 16 byte aligned memory from txn */
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@ -610,55 +610,55 @@ static const struct vm_operations_struct omap_gem_vm_ops = {
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};
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static const struct file_operations omapdriver_fops = {
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.owner = THIS_MODULE,
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.open = drm_open,
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.unlocked_ioctl = drm_ioctl,
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.release = drm_release,
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.mmap = omap_gem_mmap,
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.poll = drm_poll,
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.read = drm_read,
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.llseek = noop_llseek,
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.owner = THIS_MODULE,
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.open = drm_open,
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.unlocked_ioctl = drm_ioctl,
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.release = drm_release,
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.mmap = omap_gem_mmap,
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.poll = drm_poll,
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.read = drm_read,
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.llseek = noop_llseek,
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};
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static struct drm_driver omap_drm_driver = {
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.driver_features =
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DRIVER_HAVE_IRQ | DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME,
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.load = dev_load,
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.unload = dev_unload,
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.open = dev_open,
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.lastclose = dev_lastclose,
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.preclose = dev_preclose,
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.postclose = dev_postclose,
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.set_busid = drm_platform_set_busid,
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.get_vblank_counter = drm_vblank_count,
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.enable_vblank = omap_irq_enable_vblank,
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.disable_vblank = omap_irq_disable_vblank,
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.irq_preinstall = omap_irq_preinstall,
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.irq_postinstall = omap_irq_postinstall,
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.irq_uninstall = omap_irq_uninstall,
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.irq_handler = omap_irq_handler,
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.driver_features = DRIVER_HAVE_IRQ | DRIVER_MODESET | DRIVER_GEM
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| DRIVER_PRIME,
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.load = dev_load,
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.unload = dev_unload,
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.open = dev_open,
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.lastclose = dev_lastclose,
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.preclose = dev_preclose,
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.postclose = dev_postclose,
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.set_busid = drm_platform_set_busid,
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.get_vblank_counter = drm_vblank_count,
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.enable_vblank = omap_irq_enable_vblank,
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.disable_vblank = omap_irq_disable_vblank,
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.irq_preinstall = omap_irq_preinstall,
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.irq_postinstall = omap_irq_postinstall,
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.irq_uninstall = omap_irq_uninstall,
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.irq_handler = omap_irq_handler,
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#ifdef CONFIG_DEBUG_FS
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.debugfs_init = omap_debugfs_init,
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.debugfs_cleanup = omap_debugfs_cleanup,
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.debugfs_init = omap_debugfs_init,
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.debugfs_cleanup = omap_debugfs_cleanup,
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#endif
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.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
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.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
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.gem_prime_export = omap_gem_prime_export,
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.gem_prime_import = omap_gem_prime_import,
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.gem_free_object = omap_gem_free_object,
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.gem_vm_ops = &omap_gem_vm_ops,
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.dumb_create = omap_gem_dumb_create,
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.dumb_map_offset = omap_gem_dumb_map_offset,
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.dumb_destroy = drm_gem_dumb_destroy,
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.ioctls = ioctls,
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.num_ioctls = DRM_OMAP_NUM_IOCTLS,
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.fops = &omapdriver_fops,
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.name = DRIVER_NAME,
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.desc = DRIVER_DESC,
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.date = DRIVER_DATE,
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.major = DRIVER_MAJOR,
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.minor = DRIVER_MINOR,
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.patchlevel = DRIVER_PATCHLEVEL,
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.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
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.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
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.gem_prime_export = omap_gem_prime_export,
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.gem_prime_import = omap_gem_prime_import,
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.gem_free_object = omap_gem_free_object,
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.gem_vm_ops = &omap_gem_vm_ops,
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.dumb_create = omap_gem_dumb_create,
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.dumb_map_offset = omap_gem_dumb_map_offset,
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.dumb_destroy = drm_gem_dumb_destroy,
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.ioctls = ioctls,
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.num_ioctls = DRM_OMAP_NUM_IOCTLS,
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.fops = &omapdriver_fops,
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.name = DRIVER_NAME,
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.desc = DRIVER_DESC,
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.date = DRIVER_DATE,
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.major = DRIVER_MAJOR,
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.minor = DRIVER_MINOR,
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.patchlevel = DRIVER_PATCHLEVEL,
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};
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static int pdev_suspend(struct platform_device *pDevice, pm_message_t state)
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@ -716,17 +716,17 @@ static const struct dev_pm_ops omapdrm_pm_ops = {
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#endif
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static struct platform_driver pdev = {
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.driver = {
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.name = DRIVER_NAME,
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.driver = {
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.name = DRIVER_NAME,
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#ifdef CONFIG_PM
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.pm = &omapdrm_pm_ops,
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.pm = &omapdrm_pm_ops,
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#endif
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},
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.probe = pdev_probe,
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.remove = pdev_remove,
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.suspend = pdev_suspend,
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.resume = pdev_resume,
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.shutdown = pdev_shutdown,
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},
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.probe = pdev_probe,
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.remove = pdev_remove,
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.suspend = pdev_suspend,
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.resume = pdev_resume,
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.shutdown = pdev_shutdown,
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};
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static int __init omap_drm_init(void)
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@ -156,16 +156,16 @@ static int omap_gem_dmabuf_mmap(struct dma_buf *buffer,
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}
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static struct dma_buf_ops omap_dmabuf_ops = {
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.map_dma_buf = omap_gem_map_dma_buf,
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.unmap_dma_buf = omap_gem_unmap_dma_buf,
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.release = omap_gem_dmabuf_release,
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.begin_cpu_access = omap_gem_dmabuf_begin_cpu_access,
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.end_cpu_access = omap_gem_dmabuf_end_cpu_access,
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.kmap_atomic = omap_gem_dmabuf_kmap_atomic,
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.kunmap_atomic = omap_gem_dmabuf_kunmap_atomic,
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.kmap = omap_gem_dmabuf_kmap,
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.kunmap = omap_gem_dmabuf_kunmap,
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.mmap = omap_gem_dmabuf_mmap,
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.map_dma_buf = omap_gem_map_dma_buf,
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.unmap_dma_buf = omap_gem_unmap_dma_buf,
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.release = omap_gem_dmabuf_release,
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.begin_cpu_access = omap_gem_dmabuf_begin_cpu_access,
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.end_cpu_access = omap_gem_dmabuf_end_cpu_access,
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.kmap_atomic = omap_gem_dmabuf_kmap_atomic,
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.kunmap_atomic = omap_gem_dmabuf_kunmap_atomic,
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.kmap = omap_gem_dmabuf_kmap,
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.kunmap = omap_gem_dmabuf_kunmap,
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.mmap = omap_gem_dmabuf_mmap,
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};
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struct dma_buf *omap_gem_prime_export(struct drm_device *dev,
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@ -353,10 +353,10 @@ int omap_plane_set_property(struct drm_plane *plane,
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}
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static const struct drm_plane_funcs omap_plane_funcs = {
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.update_plane = omap_plane_update,
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.disable_plane = omap_plane_disable,
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.destroy = omap_plane_destroy,
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.set_property = omap_plane_set_property,
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.update_plane = omap_plane_update,
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.disable_plane = omap_plane_disable,
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.destroy = omap_plane_destroy,
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.set_property = omap_plane_set_property,
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};
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static void omap_plane_error_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
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@ -367,17 +367,17 @@ static void omap_plane_error_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
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}
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static const char *plane_names[] = {
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[OMAP_DSS_GFX] = "gfx",
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[OMAP_DSS_VIDEO1] = "vid1",
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[OMAP_DSS_VIDEO2] = "vid2",
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[OMAP_DSS_VIDEO3] = "vid3",
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[OMAP_DSS_GFX] = "gfx",
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[OMAP_DSS_VIDEO1] = "vid1",
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[OMAP_DSS_VIDEO2] = "vid2",
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[OMAP_DSS_VIDEO3] = "vid3",
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};
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static const uint32_t error_irqs[] = {
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[OMAP_DSS_GFX] = DISPC_IRQ_GFX_FIFO_UNDERFLOW,
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[OMAP_DSS_VIDEO1] = DISPC_IRQ_VID1_FIFO_UNDERFLOW,
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[OMAP_DSS_VIDEO2] = DISPC_IRQ_VID2_FIFO_UNDERFLOW,
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[OMAP_DSS_VIDEO3] = DISPC_IRQ_VID3_FIFO_UNDERFLOW,
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[OMAP_DSS_GFX] = DISPC_IRQ_GFX_FIFO_UNDERFLOW,
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[OMAP_DSS_VIDEO1] = DISPC_IRQ_VID1_FIFO_UNDERFLOW,
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[OMAP_DSS_VIDEO2] = DISPC_IRQ_VID2_FIFO_UNDERFLOW,
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[OMAP_DSS_VIDEO3] = DISPC_IRQ_VID3_FIFO_UNDERFLOW,
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};
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/* initialize plane */
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