ARM: mach-bcm: dt updates for 3.15 - part 2
- BCM21664 SoC support - BCM59056 PMU support - BCM281xx reboot fix -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJTI1oAAAoJEOfTILNwq7R4Eu8P/1nXYhNyzRyn1vLc2GuJrq2O jqD5wd4P2gUstaFtkm7DOXQq3Nui+kC+Bze3H1OkoPgblZ3PgtRJJXuVqJJl/7Ls cqrTcYiD7/2dk+KXGUUDSfNVowIeZYGRKBtB7MkVylPsLBlF7DKBlXS0MObYAwuI HlC98bwIHwkFeuF6JmqefnUF+yNaHHdLgLCfMfT65A4TIYvcUT851B0hb2ZzuHGx xigGlkKBX4xtExB2Q5rdQPnqFboXKNChCZ4/ckm2cHLZqKCDvNiqCXseDsI3ehm9 7l8S+KVltxBaPBqPS3sOWlfuMBEME3+agrryyqJwr8WYfd7tubvYMWOHzGY/TdJv FkehEaSTXF9x6OgSCcRe2NaE+o9csFWbvfHBkbvYm4N2jKqrVVLymfqN77dIbmad 8GR767kfgL3rSQBlJU0T0VxeupXbBrIergplWLMZGwTy/2jeWsjY2bckpmeHu4xP 2KMwbqvNa8Wb2+WI0Pjap48rTqqEtYvKJRt8eX7eCNHHoHFQy3LVL1tRhCzr9ZT+ mnoeDxX1qCMHoKzGTSlTQOqJXJitQpcvEDyPns4Sx61adAGuFClm9381e3N4r/CQ BgBtJMs+RpY12jlMLN0Gdcj2blowyhidudClELBzhfpqy/PYFGbkxoCdovj1+f/F zeZB1F7plWbt8Pf+3aTU =r/HW -----END PGP SIGNATURE----- Merge tag 'armsoc/for-3.15/dt-2' of git://github.com/broadcom/mach-bcm into next/dt Merge "ARM: mach-bcm: dt updates for 3.15 - part 2" from Matt Porter: - BCM21664 SoC support - BCM59056 PMU support - BCM281xx reboot fix * tag 'armsoc/for-3.15/dt-2' of git://github.com/broadcom/mach-bcm: ARM: dts: bcm28155-ap: leave camldo1 on to fix reboot ARM: dts: add bcm590xx pmu support and enable for bcm28155-ap ARM: dts: bcm21664: Add device tree files. ARM: DT: bcm21664: Device tree bindings Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
Коммит
22261b22f4
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@ -0,0 +1,15 @@
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Broadcom BCM21664 device tree bindings
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--------------------------------------
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This document describes the device tree bindings for boards with the BCM21664
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SoC.
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Required root node property:
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- compatible: brcm,bcm21664
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Example:
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/ {
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model = "BCM21664 SoC";
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compatible = "brcm,bcm21664";
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[...]
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}
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@ -0,0 +1,14 @@
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Broadcom Kona Family Reset Manager
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----------------------------------
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The reset manager is used on the Broadcom BCM21664 SoC.
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Required properties:
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- compatible: brcm,bcm21664-resetmgr
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- reg: memory address & range
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Example:
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brcm,resetmgr@35001f00 {
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compatible = "brcm,bcm21664-resetmgr";
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reg = <0x35001f00 0x24>;
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};
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@ -47,7 +47,8 @@ dtb-$(CONFIG_ARCH_AT91) += sama5d36ek.dtb
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dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb
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dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
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dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm28155-ap.dtb
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dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm28155-ap.dtb \
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bcm21664-garnet.dtb
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dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
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dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb
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dtb-$(CONFIG_ARCH_BERLIN) += \
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@ -0,0 +1,56 @@
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/*
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* Copyright (C) 2014 Broadcom Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include "bcm21664.dtsi"
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/ {
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model = "BCM21664 Garnet board";
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compatible = "brcm,bcm21664-garnet", "brcm,bcm21664";
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memory {
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reg = <0x80000000 0x40000000>; /* 1 GB */
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};
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uart@3e000000 {
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status = "okay";
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};
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sdio1: sdio@3f180000 {
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max-frequency = <48000000>;
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status = "okay";
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};
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sdio2: sdio@3f190000 {
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non-removable;
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max-frequency = <48000000>;
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status = "okay";
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};
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sdio4: sdio@3f1b0000 {
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max-frequency = <48000000>;
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cd-gpios = <&gpio 91 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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usbotg: usb@3f120000 {
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status = "okay";
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};
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usbphy: usb-phy@3f130000 {
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status = "okay";
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};
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};
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@ -0,0 +1,292 @@
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/*
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* Copyright (C) 2014 Broadcom Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include "skeleton.dtsi"
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/ {
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model = "BCM21664 SoC";
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compatible = "brcm,bcm21664";
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interrupt-parent = <&gic>;
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chosen {
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bootargs = "console=ttyS0,115200n8";
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};
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gic: interrupt-controller@3ff00100 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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#address-cells = <0>;
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interrupt-controller;
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reg = <0x3ff01000 0x1000>,
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<0x3ff00100 0x100>;
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};
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smc@0x3404e000 {
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compatible = "brcm,bcm21664-smc", "brcm,kona-smc";
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reg = <0x3404e000 0x400>; /* 1 KiB in SRAM */
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};
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uart@3e000000 {
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compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
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status = "disabled";
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reg = <0x3e000000 0x118>;
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clocks = <&uartb_clk>;
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interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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};
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uart@3e001000 {
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compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
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status = "disabled";
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reg = <0x3e001000 0x118>;
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clocks = <&uartb2_clk>;
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interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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};
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uart@3e002000 {
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compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
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status = "disabled";
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reg = <0x3e002000 0x118>;
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clocks = <&uartb3_clk>;
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interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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};
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L2: l2-cache {
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compatible = "arm,pl310-cache";
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reg = <0x3ff20000 0x1000>;
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cache-unified;
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cache-level = <2>;
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};
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brcm,resetmgr@35001f00 {
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compatible = "brcm,bcm21664-resetmgr";
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reg = <0x35001f00 0x24>;
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};
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timer@35006000 {
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compatible = "brcm,kona-timer";
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reg = <0x35006000 0x1c>;
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interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&hub_timer_clk>;
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};
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gpio: gpio@35003000 {
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compatible = "brcm,bcm21664-gpio", "brcm,kona-gpio";
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reg = <0x35003000 0x524>;
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interrupts =
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<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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gpio-controller;
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interrupt-controller;
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};
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sdio1: sdio@3f180000 {
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compatible = "brcm,kona-sdhci";
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reg = <0x3f180000 0x801c>;
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interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&sdio1_clk>;
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status = "disabled";
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};
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sdio2: sdio@3f190000 {
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compatible = "brcm,kona-sdhci";
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reg = <0x3f190000 0x801c>;
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interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&sdio2_clk>;
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status = "disabled";
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};
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sdio3: sdio@3f1a0000 {
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compatible = "brcm,kona-sdhci";
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reg = <0x3f1a0000 0x801c>;
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interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&sdio3_clk>;
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status = "disabled";
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};
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sdio4: sdio@3f1b0000 {
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compatible = "brcm,kona-sdhci";
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reg = <0x3f1b0000 0x801c>;
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interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&sdio4_clk>;
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status = "disabled";
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};
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i2c@3e016000 {
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compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
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reg = <0x3e016000 0x70>;
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interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&bsc1_clk>;
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status = "disabled";
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};
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i2c@3e017000 {
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compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
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reg = <0x3e017000 0x70>;
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interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&bsc2_clk>;
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status = "disabled";
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};
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i2c@3e018000 {
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compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
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reg = <0x3e018000 0x70>;
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interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&bsc3_clk>;
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status = "disabled";
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};
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i2c@3e01c000 {
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compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
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reg = <0x3e01c000 0x70>;
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interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&bsc4_clk>;
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status = "disabled";
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};
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clocks {
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bsc1_clk: bsc1 {
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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#clock-cells = <0>;
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};
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bsc2_clk: bsc2 {
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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#clock-cells = <0>;
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};
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bsc3_clk: bsc3 {
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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#clock-cells = <0>;
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};
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bsc4_clk: bsc4 {
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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#clock-cells = <0>;
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};
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pmu_bsc_clk: pmu_bsc {
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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#clock-cells = <0>;
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};
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hub_timer_clk: hub_timer {
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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#clock-cells = <0>;
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};
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pwm_clk: pwm {
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compatible = "fixed-clock";
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clock-frequency = <26000000>;
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#clock-cells = <0>;
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};
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sdio1_clk: sdio1 {
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compatible = "fixed-clock";
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clock-frequency = <48000000>;
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#clock-cells = <0>;
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};
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sdio2_clk: sdio2 {
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compatible = "fixed-clock";
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clock-frequency = <48000000>;
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#clock-cells = <0>;
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};
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sdio3_clk: sdio3 {
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compatible = "fixed-clock";
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clock-frequency = <48000000>;
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#clock-cells = <0>;
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};
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sdio4_clk: sdio4 {
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compatible = "fixed-clock";
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clock-frequency = <48000000>;
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#clock-cells = <0>;
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};
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tmon_1m_clk: tmon_1m {
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compatible = "fixed-clock";
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clock-frequency = <1000000>;
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#clock-cells = <0>;
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};
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uartb_clk: uartb {
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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#clock-cells = <0>;
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};
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uartb2_clk: uartb2 {
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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#clock-cells = <0>;
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};
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uartb3_clk: uartb3 {
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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#clock-cells = <0>;
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};
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usb_otg_ahb_clk: usb_otg_ahb {
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compatible = "fixed-clock";
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clock-frequency = <52000000>;
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#clock-cells = <0>;
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};
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};
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usbotg: usb@3f120000 {
|
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compatible = "snps,dwc2";
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reg = <0x3f120000 0x10000>;
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interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&usb_otg_ahb_clk>;
|
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clock-names = "otg";
|
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phys = <&usbphy>;
|
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phy-names = "usb2-phy";
|
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status = "disabled";
|
||||
};
|
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|
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usbphy: usb-phy@3f130000 {
|
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compatible = "brcm,kona-usb2-phy";
|
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reg = <0x3f130000 0x28>;
|
||||
#phy-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
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@ -46,22 +46,32 @@
|
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i2c@3500d000 {
|
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status="okay";
|
||||
clock-frequency = <400000>;
|
||||
clock-frequency = <100000>;
|
||||
|
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pmu: pmu@8 {
|
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reg = <0x08>;
|
||||
};
|
||||
};
|
||||
|
||||
sdio2: sdio@3f190000 {
|
||||
non-removable;
|
||||
max-frequency = <48000000>;
|
||||
vmmc-supply = <&camldo1_reg>;
|
||||
vqmmc-supply = <&iosr1_reg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
sdio4: sdio@3f1b0000 {
|
||||
max-frequency = <48000000>;
|
||||
cd-gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
|
||||
vmmc-supply = <&sdldo_reg>;
|
||||
vqmmc-supply = <&sdxldo_reg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usbotg: usb@3f120000 {
|
||||
vusb_d-supply = <&usbldo_reg>;
|
||||
vusb_a-supply = <&iosr1_reg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
@ -69,3 +79,39 @@
|
|||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
#include "bcm59056.dtsi"
|
||||
|
||||
&pmu {
|
||||
compatible = "brcm,bcm59056";
|
||||
interrupts = <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
|
||||
regulators {
|
||||
camldo1_reg: camldo1 {
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
sdldo_reg: sdldo {
|
||||
regulator-min-microvolt = <3000000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
};
|
||||
|
||||
sdxldo_reg: sdxldo {
|
||||
regulator-min-microvolt = <2700000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
usbldo_reg: usbldo {
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
iosr1_reg: iosr1 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,74 @@
|
|||
/*
|
||||
* Copyright 2014 Linaro Limited
|
||||
* Author: Matt Porter <mporter@linaro.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
&pmu {
|
||||
compatible = "brcm,bcm59056";
|
||||
regulators {
|
||||
rfldo_reg: rfldo {
|
||||
};
|
||||
|
||||
camldo1_reg: camldo1 {
|
||||
};
|
||||
|
||||
camldo2_reg: camldo2 {
|
||||
};
|
||||
|
||||
simldo1_reg: simldo1 {
|
||||
};
|
||||
|
||||
simldo2_reg: simldo2 {
|
||||
};
|
||||
|
||||
sdldo_reg: sdldo {
|
||||
};
|
||||
|
||||
sdxldo_reg: sdxldo {
|
||||
};
|
||||
|
||||
mmcldo1_reg: mmcldo1 {
|
||||
};
|
||||
|
||||
mmcldo2_reg: mmcldo2 {
|
||||
};
|
||||
|
||||
audldo_reg: audldo {
|
||||
};
|
||||
|
||||
micldo_reg: micldo {
|
||||
};
|
||||
|
||||
usbldo_reg: usbldo {
|
||||
};
|
||||
|
||||
vibldo_reg: vibldo {
|
||||
};
|
||||
|
||||
csr_reg: csr {
|
||||
};
|
||||
|
||||
iosr1_reg: iosr1 {
|
||||
};
|
||||
|
||||
iosr2_reg: iosr2 {
|
||||
};
|
||||
|
||||
msr_reg: msr {
|
||||
};
|
||||
|
||||
sdsr1_reg: sdsr1 {
|
||||
};
|
||||
|
||||
sdsr2_reg: sdsr2 {
|
||||
};
|
||||
|
||||
vsr_reg: vsr {
|
||||
};
|
||||
};
|
||||
};
|
||||
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