pinctrl: qcom: spmi-gpio: Add dtest route for digital input
Add property "qcom,dtest-buffer" to specify which dtest rail to feed when the pin is configured as a digital input. Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -200,6 +200,13 @@ to specify in a pin configuration subnode:
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in analog-pass-through mode.
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in analog-pass-through mode.
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Valid values are 1-4 corresponding to ATEST1 to ATEST4.
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Valid values are 1-4 corresponding to ATEST1 to ATEST4.
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- qcom,dtest-buffer:
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Usage: optional
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Value type: <u32>
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Definition: Selects DTEST rail to route to GPIO when it's configured
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as digital input.
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Valid values are 1-4 corresponding to DTEST1 to DTEST4.
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Example:
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Example:
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pm8921_gpio: gpio@150 {
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pm8921_gpio: gpio@150 {
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@ -51,6 +51,7 @@
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#define PMIC_GPIO_REG_DIG_VIN_CTL 0x41
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#define PMIC_GPIO_REG_DIG_VIN_CTL 0x41
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#define PMIC_GPIO_REG_DIG_PULL_CTL 0x42
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#define PMIC_GPIO_REG_DIG_PULL_CTL 0x42
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#define PMIC_GPIO_REG_LV_MV_DIG_OUT_SOURCE_CTL 0x44
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#define PMIC_GPIO_REG_LV_MV_DIG_OUT_SOURCE_CTL 0x44
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#define PMIC_GPIO_REG_DIG_IN_CTL 0x43
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#define PMIC_GPIO_REG_DIG_OUT_CTL 0x45
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#define PMIC_GPIO_REG_DIG_OUT_CTL 0x45
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#define PMIC_GPIO_REG_EN_CTL 0x46
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#define PMIC_GPIO_REG_EN_CTL 0x46
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#define PMIC_GPIO_REG_LV_MV_ANA_PASS_THRU_SEL 0x4A
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#define PMIC_GPIO_REG_LV_MV_ANA_PASS_THRU_SEL 0x4A
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@ -84,6 +85,11 @@
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#define PMIC_GPIO_LV_MV_OUTPUT_INVERT_SHIFT 7
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#define PMIC_GPIO_LV_MV_OUTPUT_INVERT_SHIFT 7
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#define PMIC_GPIO_LV_MV_OUTPUT_SOURCE_SEL_MASK 0xF
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#define PMIC_GPIO_LV_MV_OUTPUT_SOURCE_SEL_MASK 0xF
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/* PMIC_GPIO_REG_DIG_IN_CTL */
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#define PMIC_GPIO_LV_MV_DIG_IN_DTEST_EN 0x80
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#define PMIC_GPIO_LV_MV_DIG_IN_DTEST_SEL_MASK 0x7
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#define PMIC_GPIO_DIG_IN_DTEST_SEL_MASK 0xf
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/* PMIC_GPIO_REG_DIG_OUT_CTL */
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/* PMIC_GPIO_REG_DIG_OUT_CTL */
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#define PMIC_GPIO_REG_OUT_STRENGTH_SHIFT 0
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#define PMIC_GPIO_REG_OUT_STRENGTH_SHIFT 0
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#define PMIC_GPIO_REG_OUT_STRENGTH_MASK 0x3
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#define PMIC_GPIO_REG_OUT_STRENGTH_MASK 0x3
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@ -111,6 +117,7 @@
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#define PMIC_GPIO_CONF_STRENGTH (PIN_CONFIG_END + 2)
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#define PMIC_GPIO_CONF_STRENGTH (PIN_CONFIG_END + 2)
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#define PMIC_GPIO_CONF_ATEST (PIN_CONFIG_END + 3)
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#define PMIC_GPIO_CONF_ATEST (PIN_CONFIG_END + 3)
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#define PMIC_GPIO_CONF_ANALOG_PASS (PIN_CONFIG_END + 4)
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#define PMIC_GPIO_CONF_ANALOG_PASS (PIN_CONFIG_END + 4)
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#define PMIC_GPIO_CONF_DTEST_BUFFER (PIN_CONFIG_END + 5)
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/* The index of each function in pmic_gpio_functions[] array */
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/* The index of each function in pmic_gpio_functions[] array */
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enum pmic_gpio_func_index {
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enum pmic_gpio_func_index {
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@ -145,6 +152,7 @@ enum pmic_gpio_func_index {
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* @strength: No, Low, Medium, High
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* @strength: No, Low, Medium, High
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* @function: See pmic_gpio_functions[]
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* @function: See pmic_gpio_functions[]
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* @atest: the ATEST selection for GPIO analog-pass-through mode
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* @atest: the ATEST selection for GPIO analog-pass-through mode
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* @dtest_buffer: the DTEST buffer selection for digital input mode.
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*/
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*/
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struct pmic_gpio_pad {
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struct pmic_gpio_pad {
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u16 base;
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u16 base;
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@ -163,6 +171,7 @@ struct pmic_gpio_pad {
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unsigned int strength;
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unsigned int strength;
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unsigned int function;
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unsigned int function;
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unsigned int atest;
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unsigned int atest;
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unsigned int dtest_buffer;
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};
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};
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struct pmic_gpio_state {
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struct pmic_gpio_state {
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@ -177,6 +186,7 @@ static const struct pinconf_generic_params pmic_gpio_bindings[] = {
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{"qcom,drive-strength", PMIC_GPIO_CONF_STRENGTH, 0},
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{"qcom,drive-strength", PMIC_GPIO_CONF_STRENGTH, 0},
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{"qcom,atest", PMIC_GPIO_CONF_ATEST, 0},
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{"qcom,atest", PMIC_GPIO_CONF_ATEST, 0},
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{"qcom,analog-pass", PMIC_GPIO_CONF_ANALOG_PASS, 0},
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{"qcom,analog-pass", PMIC_GPIO_CONF_ANALOG_PASS, 0},
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{"qcom,dtest-buffer", PMIC_GPIO_CONF_DTEST_BUFFER, 0},
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};
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};
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#ifdef CONFIG_DEBUG_FS
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#ifdef CONFIG_DEBUG_FS
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@ -185,6 +195,7 @@ static const struct pin_config_item pmic_conf_items[ARRAY_SIZE(pmic_gpio_binding
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PCONFDUMP(PMIC_GPIO_CONF_STRENGTH, "drive-strength", NULL, true),
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PCONFDUMP(PMIC_GPIO_CONF_STRENGTH, "drive-strength", NULL, true),
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PCONFDUMP(PMIC_GPIO_CONF_ATEST, "atest", NULL, true),
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PCONFDUMP(PMIC_GPIO_CONF_ATEST, "atest", NULL, true),
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PCONFDUMP(PMIC_GPIO_CONF_ANALOG_PASS, "analog-pass", NULL, true),
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PCONFDUMP(PMIC_GPIO_CONF_ANALOG_PASS, "analog-pass", NULL, true),
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PCONFDUMP(PMIC_GPIO_CONF_DTEST_BUFFER, "dtest-buffer", NULL, true),
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};
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};
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#endif
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#endif
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@ -420,6 +431,9 @@ static int pmic_gpio_config_get(struct pinctrl_dev *pctldev,
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case PMIC_GPIO_CONF_ANALOG_PASS:
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case PMIC_GPIO_CONF_ANALOG_PASS:
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arg = pad->analog_pass;
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arg = pad->analog_pass;
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break;
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break;
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case PMIC_GPIO_CONF_DTEST_BUFFER:
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arg = pad->dtest_buffer;
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break;
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default:
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default:
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return -EINVAL;
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return -EINVAL;
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}
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}
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@ -504,6 +518,11 @@ static int pmic_gpio_config_set(struct pinctrl_dev *pctldev, unsigned int pin,
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return -EINVAL;
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return -EINVAL;
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pad->analog_pass = true;
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pad->analog_pass = true;
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break;
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break;
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case PMIC_GPIO_CONF_DTEST_BUFFER:
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if (arg > 4)
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return -EINVAL;
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pad->dtest_buffer = arg;
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break;
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default:
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default:
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return -EINVAL;
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return -EINVAL;
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}
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}
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@ -528,6 +547,20 @@ static int pmic_gpio_config_set(struct pinctrl_dev *pctldev, unsigned int pin,
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if (ret < 0)
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if (ret < 0)
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return ret;
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return ret;
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if (pad->dtest_buffer == 0) {
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val = 0;
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} else {
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if (pad->lv_mv_type) {
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val = pad->dtest_buffer - 1;
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val |= PMIC_GPIO_LV_MV_DIG_IN_DTEST_EN;
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} else {
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val = BIT(pad->dtest_buffer - 1);
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}
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}
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ret = pmic_gpio_write(state, pad, PMIC_GPIO_REG_DIG_IN_CTL, val);
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if (ret < 0)
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return ret;
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if (pad->analog_pass)
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if (pad->analog_pass)
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val = PMIC_GPIO_MODE_ANALOG_PASS_THRU;
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val = PMIC_GPIO_MODE_ANALOG_PASS_THRU;
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else if (pad->output_enabled && pad->input_enabled)
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else if (pad->output_enabled && pad->input_enabled)
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@ -627,6 +660,7 @@ static void pmic_gpio_config_dbg_show(struct pinctrl_dev *pctldev,
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seq_printf(s, " %-4s", pad->out_value ? "high" : "low");
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seq_printf(s, " %-4s", pad->out_value ? "high" : "low");
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seq_printf(s, " %-7s", strengths[pad->strength]);
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seq_printf(s, " %-7s", strengths[pad->strength]);
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seq_printf(s, " atest-%d", pad->atest);
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seq_printf(s, " atest-%d", pad->atest);
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seq_printf(s, " dtest-%d", pad->dtest_buffer);
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}
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}
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}
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}
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@ -845,6 +879,22 @@ static int pmic_gpio_populate(struct pmic_gpio_state *state,
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pad->pullup = val >> PMIC_GPIO_REG_PULL_SHIFT;
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pad->pullup = val >> PMIC_GPIO_REG_PULL_SHIFT;
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pad->pullup &= PMIC_GPIO_REG_PULL_MASK;
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pad->pullup &= PMIC_GPIO_REG_PULL_MASK;
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val = pmic_gpio_read(state, pad, PMIC_GPIO_REG_DIG_IN_CTL);
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if (val < 0)
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return val;
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if (pad->lv_mv_type && (val & PMIC_GPIO_LV_MV_DIG_IN_DTEST_EN))
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pad->dtest_buffer =
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(val & PMIC_GPIO_LV_MV_DIG_IN_DTEST_SEL_MASK) + 1;
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else if (!pad->lv_mv_type)
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pad->dtest_buffer = ffs(val);
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else
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pad->dtest_buffer = 0;
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val = pmic_gpio_read(state, pad, PMIC_GPIO_REG_DIG_OUT_CTL);
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if (val < 0)
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return val;
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pad->strength = val >> PMIC_GPIO_REG_OUT_STRENGTH_SHIFT;
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pad->strength = val >> PMIC_GPIO_REG_OUT_STRENGTH_SHIFT;
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pad->strength &= PMIC_GPIO_REG_OUT_STRENGTH_MASK;
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pad->strength &= PMIC_GPIO_REG_OUT_STRENGTH_MASK;
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