xen: update arch/x86/include/asm/xen/cpuid.h
Update arch/x86/include/asm/xen/cpuid.h from the Xen tree to get newest definitions. Signed-off-by: Juergen Gross <jgross@suse.com> Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com> Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
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@ -74,21 +74,43 @@
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#define XEN_CPUID_FEAT1_MMU_PT_UPDATE_PRESERVE_AD (1u<<0)
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/*
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* Leaf 5 (0x40000x04)
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* HVM-specific features
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* EAX: Features
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* EBX: vcpu id (iff EAX has XEN_HVM_CPUID_VCPU_ID_PRESENT flag)
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* Leaf 4 (0x40000x03)
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* Sub-leaf 0: EAX: bit 0: emulated tsc
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* bit 1: host tsc is known to be reliable
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* bit 2: RDTSCP instruction available
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* EBX: tsc_mode: 0=default (emulate if necessary), 1=emulate,
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* 2=no emulation, 3=no emulation + TSC_AUX support
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* ECX: guest tsc frequency in kHz
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* EDX: guest tsc incarnation (migration count)
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* Sub-leaf 1: EAX: tsc offset low part
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* EBX: tsc offset high part
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* ECX: multiplicator for tsc->ns conversion
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* EDX: shift amount for tsc->ns conversion
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* Sub-leaf 2: EAX: host tsc frequency in kHz
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*/
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/* Virtualized APIC registers */
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#define XEN_HVM_CPUID_APIC_ACCESS_VIRT (1u << 0)
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/* Virtualized x2APIC accesses */
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#define XEN_HVM_CPUID_X2APIC_VIRT (1u << 1)
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/*
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* Leaf 5 (0x40000x04)
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* HVM-specific features
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* Sub-leaf 0: EAX: Features
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* Sub-leaf 0: EBX: vcpu id (iff EAX has XEN_HVM_CPUID_VCPU_ID_PRESENT flag)
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*/
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#define XEN_HVM_CPUID_APIC_ACCESS_VIRT (1u << 0) /* Virtualized APIC registers */
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#define XEN_HVM_CPUID_X2APIC_VIRT (1u << 1) /* Virtualized x2APIC accesses */
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/* Memory mapped from other domains has valid IOMMU entries */
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#define XEN_HVM_CPUID_IOMMU_MAPPINGS (1u << 2)
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/* vcpu id is present in EBX */
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#define XEN_HVM_CPUID_VCPU_ID_PRESENT (1u << 3)
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#define XEN_HVM_CPUID_VCPU_ID_PRESENT (1u << 3) /* vcpu id is present in EBX */
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#define XEN_CPUID_MAX_NUM_LEAVES 4
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/*
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* Leaf 6 (0x40000x05)
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* PV-specific parameters
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* Sub-leaf 0: EAX: max available sub-leaf
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* Sub-leaf 0: EBX: bits 0-7: max machine address width
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*/
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/* Max. address width in bits taking memory hotplug into account. */
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#define XEN_CPUID_MACHINE_ADDRESS_WIDTH_MASK (0xffu << 0)
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#define XEN_CPUID_MAX_NUM_LEAVES 5
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#endif /* __XEN_PUBLIC_ARCH_X86_CPUID_H__ */
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