net/mlx4_en: break out tx_desc write into separate function
In preparation for writing the tx descriptor from multiple functions, create a helper for both normal and blueflame access. Signed-off-by: Brenden Blanco <bblanco@plumgrid.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Brenden Blanco
David S. Miller
Родитель
6ce96ca348
Коммит
224e92e02a
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@ -232,7 +232,7 @@ static void stamp_send_wqe(struct mlx4_ib_qp *qp, int n, int size)
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}
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} else {
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ctrl = buf = get_send_wqe(qp, n & (qp->sq.wqe_cnt - 1));
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s = (ctrl->fence_size & 0x3f) << 4;
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s = (ctrl->qpn_vlan.fence_size & 0x3f) << 4;
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for (i = 64; i < s; i += 64) {
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wqe = buf + i;
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*wqe = cpu_to_be32(0xffffffff);
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@ -264,7 +264,7 @@ static void post_nop_wqe(struct mlx4_ib_qp *qp, int n, int size)
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inl->byte_count = cpu_to_be32(1 << 31 | (size - s - sizeof *inl));
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}
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ctrl->srcrb_flags = 0;
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ctrl->fence_size = size / 16;
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ctrl->qpn_vlan.fence_size = size / 16;
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/*
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* Make sure descriptor is fully written before setting ownership bit
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* (because HW can start executing as soon as we do).
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@ -1992,7 +1992,8 @@ static int __mlx4_ib_modify_qp(struct ib_qp *ibqp,
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ctrl = get_send_wqe(qp, i);
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ctrl->owner_opcode = cpu_to_be32(1 << 31);
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if (qp->sq_max_wqes_per_wr == 1)
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ctrl->fence_size = 1 << (qp->sq.wqe_shift - 4);
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ctrl->qpn_vlan.fence_size =
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1 << (qp->sq.wqe_shift - 4);
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stamp_send_wqe(qp, i, 1 << qp->sq.wqe_shift);
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}
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@ -3169,8 +3170,8 @@ int mlx4_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
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wmb();
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*lso_wqe = lso_hdr_sz;
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ctrl->fence_size = (wr->send_flags & IB_SEND_FENCE ?
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MLX4_WQE_CTRL_FENCE : 0) | size;
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ctrl->qpn_vlan.fence_size = (wr->send_flags & IB_SEND_FENCE ?
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MLX4_WQE_CTRL_FENCE : 0) | size;
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/*
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* Make sure descriptor is fully written before
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@ -631,8 +631,7 @@ static int get_real_size(const struct sk_buff *skb,
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static void build_inline_wqe(struct mlx4_en_tx_desc *tx_desc,
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const struct sk_buff *skb,
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const struct skb_shared_info *shinfo,
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int real_size, u16 *vlan_tag,
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int tx_ind, void *fragptr)
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void *fragptr)
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{
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struct mlx4_wqe_inline_seg *inl = &tx_desc->inl;
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int spc = MLX4_INLINE_ALIGN - CTRL_SIZE - sizeof *inl;
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@ -700,10 +699,66 @@ static void mlx4_bf_copy(void __iomem *dst, const void *src,
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__iowrite64_copy(dst, src, bytecnt / 8);
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}
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void mlx4_en_xmit_doorbell(struct mlx4_en_tx_ring *ring)
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{
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wmb();
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/* Since there is no iowrite*_native() that writes the
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* value as is, without byteswapping - using the one
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* the doesn't do byteswapping in the relevant arch
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* endianness.
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*/
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#if defined(__LITTLE_ENDIAN)
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iowrite32(
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#else
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iowrite32be(
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#endif
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ring->doorbell_qpn,
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ring->bf.uar->map + MLX4_SEND_DOORBELL);
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}
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static void mlx4_en_tx_write_desc(struct mlx4_en_tx_ring *ring,
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struct mlx4_en_tx_desc *tx_desc,
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union mlx4_wqe_qpn_vlan qpn_vlan,
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int desc_size, int bf_index,
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__be32 op_own, bool bf_ok,
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bool send_doorbell)
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{
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tx_desc->ctrl.qpn_vlan = qpn_vlan;
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if (bf_ok) {
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op_own |= htonl((bf_index & 0xffff) << 8);
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/* Ensure new descriptor hits memory
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* before setting ownership of this descriptor to HW
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*/
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dma_wmb();
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tx_desc->ctrl.owner_opcode = op_own;
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wmb();
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mlx4_bf_copy(ring->bf.reg + ring->bf.offset, &tx_desc->ctrl,
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desc_size);
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wmb();
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ring->bf.offset ^= ring->bf.buf_size;
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} else {
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/* Ensure new descriptor hits memory
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* before setting ownership of this descriptor to HW
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*/
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dma_wmb();
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tx_desc->ctrl.owner_opcode = op_own;
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if (send_doorbell)
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mlx4_en_xmit_doorbell(ring);
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else
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ring->xmit_more++;
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}
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}
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netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)
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{
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struct skb_shared_info *shinfo = skb_shinfo(skb);
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struct mlx4_en_priv *priv = netdev_priv(dev);
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union mlx4_wqe_qpn_vlan qpn_vlan = {};
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struct device *ddev = priv->ddev;
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struct mlx4_en_tx_ring *ring;
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struct mlx4_en_tx_desc *tx_desc;
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@ -715,7 +770,6 @@ netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)
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int real_size;
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u32 index, bf_index;
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__be32 op_own;
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u16 vlan_tag = 0;
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u16 vlan_proto = 0;
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int i_frag;
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int lso_header_size;
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@ -725,6 +779,7 @@ netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)
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bool stop_queue;
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bool inline_ok;
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u32 ring_cons;
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bool bf_ok;
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tx_ind = skb_get_queue_mapping(skb);
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ring = priv->tx_ring[tx_ind];
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@ -749,9 +804,17 @@ netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)
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goto tx_drop;
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}
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bf_ok = ring->bf_enabled;
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if (skb_vlan_tag_present(skb)) {
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vlan_tag = skb_vlan_tag_get(skb);
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qpn_vlan.vlan_tag = cpu_to_be16(skb_vlan_tag_get(skb));
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vlan_proto = be16_to_cpu(skb->vlan_proto);
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if (vlan_proto == ETH_P_8021AD)
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qpn_vlan.ins_vlan = MLX4_WQE_CTRL_INS_SVLAN;
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else if (vlan_proto == ETH_P_8021Q)
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qpn_vlan.ins_vlan = MLX4_WQE_CTRL_INS_CVLAN;
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else
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qpn_vlan.ins_vlan = 0;
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bf_ok = false;
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}
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netdev_txq_bql_enqueue_prefetchw(ring->tx_queue);
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@ -771,6 +834,7 @@ netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)
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else {
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tx_desc = (struct mlx4_en_tx_desc *) ring->bounce_buf;
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bounce = true;
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bf_ok = false;
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}
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/* Save skb in tx_info ring */
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@ -907,8 +971,7 @@ netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)
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AVG_PERF_COUNTER(priv->pstats.tx_pktsz_avg, skb->len);
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if (tx_info->inl)
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build_inline_wqe(tx_desc, skb, shinfo, real_size, &vlan_tag,
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tx_ind, fragptr);
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build_inline_wqe(tx_desc, skb, shinfo, fragptr);
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if (skb->encapsulation) {
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union {
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@ -946,60 +1009,15 @@ netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)
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real_size = (real_size / 16) & 0x3f;
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if (ring->bf_enabled && desc_size <= MAX_BF && !bounce &&
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!skb_vlan_tag_present(skb) && send_doorbell) {
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tx_desc->ctrl.bf_qpn = ring->doorbell_qpn |
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cpu_to_be32(real_size);
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bf_ok &= desc_size <= MAX_BF && send_doorbell;
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op_own |= htonl((bf_index & 0xffff) << 8);
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/* Ensure new descriptor hits memory
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* before setting ownership of this descriptor to HW
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*/
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dma_wmb();
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tx_desc->ctrl.owner_opcode = op_own;
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if (bf_ok)
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qpn_vlan.bf_qpn = ring->doorbell_qpn | cpu_to_be32(real_size);
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else
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qpn_vlan.fence_size = real_size;
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wmb();
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mlx4_bf_copy(ring->bf.reg + ring->bf.offset, &tx_desc->ctrl,
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desc_size);
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wmb();
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ring->bf.offset ^= ring->bf.buf_size;
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} else {
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tx_desc->ctrl.vlan_tag = cpu_to_be16(vlan_tag);
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if (vlan_proto == ETH_P_8021AD)
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tx_desc->ctrl.ins_vlan = MLX4_WQE_CTRL_INS_SVLAN;
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else if (vlan_proto == ETH_P_8021Q)
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tx_desc->ctrl.ins_vlan = MLX4_WQE_CTRL_INS_CVLAN;
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else
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tx_desc->ctrl.ins_vlan = 0;
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tx_desc->ctrl.fence_size = real_size;
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/* Ensure new descriptor hits memory
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* before setting ownership of this descriptor to HW
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*/
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dma_wmb();
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tx_desc->ctrl.owner_opcode = op_own;
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if (send_doorbell) {
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wmb();
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/* Since there is no iowrite*_native() that writes the
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* value as is, without byteswapping - using the one
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* the doesn't do byteswapping in the relevant arch
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* endianness.
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*/
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#if defined(__LITTLE_ENDIAN)
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iowrite32(
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#else
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iowrite32be(
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#endif
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ring->doorbell_qpn,
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ring->bf.uar->map + MLX4_SEND_DOORBELL);
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} else {
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ring->xmit_more++;
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}
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}
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mlx4_en_tx_write_desc(ring, tx_desc, qpn_vlan, desc_size, bf_index,
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op_own, bf_ok, send_doorbell);
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if (unlikely(stop_queue)) {
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/* If queue was emptied after the if (stop_queue) , and before
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@ -291,16 +291,18 @@ enum {
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MLX4_WQE_CTRL_FORCE_LOOPBACK = 1 << 0,
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};
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union mlx4_wqe_qpn_vlan {
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struct {
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__be16 vlan_tag;
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u8 ins_vlan;
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u8 fence_size;
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};
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__be32 bf_qpn;
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};
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struct mlx4_wqe_ctrl_seg {
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__be32 owner_opcode;
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union {
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struct {
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__be16 vlan_tag;
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u8 ins_vlan;
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u8 fence_size;
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};
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__be32 bf_qpn;
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};
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union mlx4_wqe_qpn_vlan qpn_vlan;
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/*
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* High 24 bits are SRC remote buffer; low 8 bits are flags:
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* [7] SO (strong ordering)
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