mrst_max3110: add UART driver for Max3110 on Moorestown
This driver enable the max3110 device, it can be used as a system console. the IRQ needs be enabled if user want a better performance. MRST max3110 works in 3.684MHz clock, which supports 230400 as its maximum rate. Signed-off-by: Feng Tang <feng.tang@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Feng Tang
Greg Kroah-Hartman
Родитель
7a56aa4598
Коммит
225109957a
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@ -690,6 +690,23 @@ config SERIAL_SA1100_CONSOLE
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your boot loader (lilo or loadlin) about how to pass options to the
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kernel at boot time.)
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config SERIAL_MRST_MAX3110
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tristate "SPI UART driver for Max3110"
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depends on SPI_DW_PCI
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select SERIAL_CORE
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select SERIAL_CORE_CONSOLE
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help
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This is the UART protocol driver for the MAX3110 device on
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the Intel Moorestown platform. On other systems use the max3100
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driver.
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config MRST_MAX3110_IRQ
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boolean "Enable GPIO IRQ for Max3110 over Moorestown"
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default n
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depends on SERIAL_MRST_MAX3110 && GPIO_LANGWELL
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help
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This has to be enabled after Moorestown GPIO driver is loaded
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config SERIAL_BFIN
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tristate "Blackfin serial port support"
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depends on BLACKFIN
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@ -84,3 +84,4 @@ obj-$(CONFIG_SERIAL_TIMBERDALE) += timbuart.o
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obj-$(CONFIG_SERIAL_GRLIB_GAISLER_APBUART) += apbuart.o
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obj-$(CONFIG_SERIAL_ALTERA_JTAGUART) += altera_jtaguart.o
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obj-$(CONFIG_SERIAL_ALTERA_UART) += altera_uart.o
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obj-$(CONFIG_SERIAL_MRST_MAX3110) += mrst_max3110.o
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@ -0,0 +1,844 @@
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/*
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* max3110.c - spi uart protocol driver for Maxim 3110 on Moorestown
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*
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* Copyright (C) Intel 2008 Feng Tang <feng.tang@intel.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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/*
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* Note:
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* 1. From Max3110 spec, the Rx FIFO has 8 words, while the Tx FIFO only has
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* 1 word. If SPI master controller doesn't support sclk frequency change,
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* then the char need be sent out one by one with some delay
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*
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* 2. Currently only RX availabe interrrupt is used, no need for waiting TXE
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* interrupt for a low speed UART device
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*/
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#include <linux/module.h>
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#include <linux/ioport.h>
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#include <linux/init.h>
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#include <linux/console.h>
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#include <linux/sysrq.h>
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#include <linux/platform_device.h>
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#include <linux/serial_core.h>
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#include <linux/serial_reg.h>
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#include <linux/kthread.h>
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#include <linux/delay.h>
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#include <asm/atomic.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/dw_spi.h>
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#include "mrst_max3110.h"
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#define PR_FMT "mrst_max3110: "
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struct uart_max3110 {
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struct uart_port port;
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struct spi_device *spi;
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char *name;
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wait_queue_head_t wq;
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struct task_struct *main_thread;
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struct task_struct *read_thread;
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int mthread_up;
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spinlock_t lock;
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u32 baud;
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u16 cur_conf;
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u8 clock;
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u8 parity, word_7bits;
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atomic_t uart_tx_need;
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/* console related */
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struct circ_buf con_xmit;
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atomic_t con_tx_need;
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/* irq related */
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u16 irq;
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atomic_t irq_pending;
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};
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/* global data structure, may need be removed */
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struct uart_max3110 *pmax;
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static inline void receive_char(struct uart_max3110 *max, u8 ch);
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static void receive_chars(struct uart_max3110 *max,
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unsigned char *str, int len);
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static int max3110_read_multi(struct uart_max3110 *max, int len, u8 *buf);
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static void max3110_console_receive(struct uart_max3110 *max);
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int max3110_write_then_read(struct uart_max3110 *max,
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const u8 *txbuf, u8 *rxbuf, unsigned len, int always_fast)
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{
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struct spi_device *spi = max->spi;
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struct spi_message message;
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struct spi_transfer x;
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int ret;
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if (!txbuf || !rxbuf)
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return -EINVAL;
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spi_message_init(&message);
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memset(&x, 0, sizeof x);
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x.len = len;
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x.tx_buf = txbuf;
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x.rx_buf = rxbuf;
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spi_message_add_tail(&x, &message);
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if (always_fast)
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x.speed_hz = 3125000;
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else if (max->baud)
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x.speed_hz = max->baud;
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/* Do the i/o */
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ret = spi_sync(spi, &message);
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return ret;
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}
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/* Write a u16 to the device, and return one u16 read back */
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int max3110_out(struct uart_max3110 *max, const u16 out)
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{
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u16 tmp;
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int ret;
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ret = max3110_write_then_read(max, (u8 *)&out, (u8 *)&tmp, 2, 1);
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if (ret)
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return ret;
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/* If some valid data is read back */
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if (tmp & MAX3110_READ_DATA_AVAILABLE)
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receive_char(max, (tmp & 0xff));
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return ret;
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}
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#define MAX_READ_LEN 20
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/*
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* This is usually used to read data from SPIC RX FIFO, which doesn't
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* need any delay like flushing character out. It returns how many
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* valide bytes are read back
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*/
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static int max3110_read_multi(struct uart_max3110 *max, int len, u8 *buf)
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{
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u16 out[MAX_READ_LEN], in[MAX_READ_LEN];
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u8 *pbuf, valid_str[MAX_READ_LEN];
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int i, j, bytelen;
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if (len > MAX_READ_LEN) {
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pr_err(PR_FMT "read len %d is too large\n", len);
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return 0;
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}
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bytelen = len * 2;
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memset(out, 0, bytelen);
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memset(in, 0, bytelen);
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if (max3110_write_then_read(max, (u8 *)out, (u8 *)in, bytelen, 1))
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return 0;
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/* If caller don't provide a buffer, then handle received char */
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pbuf = buf ? buf : valid_str;
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for (i = 0, j = 0; i < len; i++) {
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if (in[i] & MAX3110_READ_DATA_AVAILABLE)
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pbuf[j++] = (u8)(in[i] & 0xff);
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}
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if (j && (pbuf == valid_str))
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receive_chars(max, valid_str, j);
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return j;
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}
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static void serial_m3110_con_putchar(struct uart_port *port, int ch)
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{
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struct uart_max3110 *max =
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container_of(port, struct uart_max3110, port);
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struct circ_buf *xmit = &max->con_xmit;
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if (uart_circ_chars_free(xmit)) {
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xmit->buf[xmit->head] = (char)ch;
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xmit->head = (xmit->head + 1) & (PAGE_SIZE - 1);
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}
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if (!atomic_read(&max->con_tx_need)) {
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atomic_set(&max->con_tx_need, 1);
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wake_up_process(max->main_thread);
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}
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}
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/*
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* Print a string to the serial port trying not to disturb
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* any possible real use of the port...
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*
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* The console_lock must be held when we get here.
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*/
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static void serial_m3110_con_write(struct console *co,
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const char *s, unsigned int count)
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{
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if (!pmax)
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return;
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uart_console_write(&pmax->port, s, count, serial_m3110_con_putchar);
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}
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static int __init
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serial_m3110_con_setup(struct console *co, char *options)
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{
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struct uart_max3110 *max = pmax;
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int baud = 115200;
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int bits = 8;
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int parity = 'n';
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int flow = 'n';
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pr_info(PR_FMT "setting up console\n");
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if (!max) {
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pr_err(PR_FMT "pmax is NULL, return");
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return -ENODEV;
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}
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if (options)
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uart_parse_options(options, &baud, &parity, &bits, &flow);
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return uart_set_options(&max->port, co, baud, parity, bits, flow);
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}
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static struct tty_driver *serial_m3110_con_device(struct console *co,
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int *index)
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{
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struct uart_driver *p = co->data;
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*index = co->index;
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return p->tty_driver;
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}
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static struct uart_driver serial_m3110_reg;
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static struct console serial_m3110_console = {
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.name = "ttyS",
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.write = serial_m3110_con_write,
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.device = serial_m3110_con_device,
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.setup = serial_m3110_con_setup,
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.flags = CON_PRINTBUFFER,
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.index = -1,
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.data = &serial_m3110_reg,
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};
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#define MRST_CONSOLE (&serial_m3110_console)
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static unsigned int serial_m3110_tx_empty(struct uart_port *port)
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{
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return 1;
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}
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static void serial_m3110_stop_tx(struct uart_port *port)
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{
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return;
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}
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/* stop_rx will be called in spin_lock env */
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static void serial_m3110_stop_rx(struct uart_port *port)
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{
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return;
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}
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#define WORDS_PER_XFER 128
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static inline void send_circ_buf(struct uart_max3110 *max,
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struct circ_buf *xmit)
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{
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int len, left = 0;
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u16 obuf[WORDS_PER_XFER], ibuf[WORDS_PER_XFER];
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u8 valid_str[WORDS_PER_XFER];
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int i, j;
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while (!uart_circ_empty(xmit)) {
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left = uart_circ_chars_pending(xmit);
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while (left) {
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len = (left >= WORDS_PER_XFER) ? WORDS_PER_XFER : left;
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memset(obuf, 0, len * 2);
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memset(ibuf, 0, len * 2);
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for (i = 0; i < len; i++) {
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obuf[i] = (u8)xmit->buf[xmit->tail] | WD_TAG;
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xmit->tail = (xmit->tail + 1) &
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(UART_XMIT_SIZE - 1);
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}
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max3110_write_then_read(max, (u8 *)obuf,
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(u8 *)ibuf, len * 2, 0);
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for (i = 0, j = 0; i < len; i++) {
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if (ibuf[i] & MAX3110_READ_DATA_AVAILABLE)
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valid_str[j++] = (u8)(ibuf[i] & 0xff);
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}
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if (j)
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receive_chars(max, valid_str, j);
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max->port.icount.tx += len;
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left -= len;
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}
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}
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}
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static void transmit_char(struct uart_max3110 *max)
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{
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struct uart_port *port = &max->port;
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struct circ_buf *xmit = &port->state->xmit;
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if (uart_circ_empty(xmit) || uart_tx_stopped(port))
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return;
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send_circ_buf(max, xmit);
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(port);
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if (uart_circ_empty(xmit))
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serial_m3110_stop_tx(port);
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}
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/* This will be called by uart_write() and tty_write, can't
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* go to sleep */
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static void serial_m3110_start_tx(struct uart_port *port)
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{
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struct uart_max3110 *max =
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container_of(port, struct uart_max3110, port);
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if (!atomic_read(&max->uart_tx_need)) {
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atomic_set(&max->uart_tx_need, 1);
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wake_up_process(max->main_thread);
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}
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}
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static void receive_chars(struct uart_max3110 *max, unsigned char *str, int len)
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{
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struct uart_port *port = &max->port;
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struct tty_struct *tty;
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int usable;
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/* If uart is not opened, just return */
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if (!port->state)
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return;
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tty = port->state->port.tty;
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if (!tty)
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return; /* receive some char before the tty is opened */
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while (len) {
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usable = tty_buffer_request_room(tty, len);
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if (usable) {
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tty_insert_flip_string(tty, str, usable);
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str += usable;
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port->icount.rx += usable;
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tty_flip_buffer_push(tty);
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}
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len -= usable;
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}
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}
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static inline void receive_char(struct uart_max3110 *max, u8 ch)
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{
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receive_chars(max, &ch, 1);
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}
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static void max3110_console_receive(struct uart_max3110 *max)
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{
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int loop = 1, num, total = 0;
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u8 recv_buf[512], *pbuf;
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pbuf = recv_buf;
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do {
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num = max3110_read_multi(max, 8, pbuf);
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if (num) {
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loop = 10;
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pbuf += num;
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total += num;
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if (total >= 500) {
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receive_chars(max, recv_buf, total);
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pbuf = recv_buf;
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total = 0;
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}
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}
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} while (--loop);
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if (total)
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receive_chars(max, recv_buf, total);
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}
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static int max3110_main_thread(void *_max)
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{
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struct uart_max3110 *max = _max;
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wait_queue_head_t *wq = &max->wq;
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int ret = 0;
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struct circ_buf *xmit = &max->con_xmit;
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init_waitqueue_head(wq);
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pr_info(PR_FMT "start main thread\n");
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do {
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wait_event_interruptible(*wq, (atomic_read(&max->irq_pending) ||
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atomic_read(&max->con_tx_need) ||
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atomic_read(&max->uart_tx_need)) ||
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kthread_should_stop());
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max->mthread_up = 1;
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#ifdef CONFIG_MRST_MAX3110_IRQ
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if (atomic_read(&max->irq_pending)) {
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max3110_console_receive(max);
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atomic_set(&max->irq_pending, 0);
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}
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#endif
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/* first handle console output */
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if (atomic_read(&max->con_tx_need)) {
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send_circ_buf(max, xmit);
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atomic_set(&max->con_tx_need, 0);
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}
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/* handle uart output */
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if (atomic_read(&max->uart_tx_need)) {
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transmit_char(max);
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atomic_set(&max->uart_tx_need, 0);
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}
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max->mthread_up = 0;
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} while (!kthread_should_stop());
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return ret;
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}
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#ifdef CONFIG_MRST_MAX3110_IRQ
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static irqreturn_t serial_m3110_irq(int irq, void *dev_id)
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{
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struct uart_max3110 *max = dev_id;
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/* max3110's irq is a falling edge, not level triggered,
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* so no need to disable the irq */
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if (!atomic_read(&max->irq_pending)) {
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atomic_inc(&max->irq_pending);
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wake_up_process(max->main_thread);
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}
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return IRQ_HANDLED;
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}
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#else
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/* if don't use RX IRQ, then need a thread to polling read */
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static int max3110_read_thread(void *_max)
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{
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struct uart_max3110 *max = _max;
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pr_info(PR_FMT "start read thread\n");
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do {
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if (!max->mthread_up)
|
||||
max3110_console_receive(max);
|
||||
|
||||
set_current_state(TASK_INTERRUPTIBLE);
|
||||
schedule_timeout(HZ / 20);
|
||||
} while (!kthread_should_stop());
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int serial_m3110_startup(struct uart_port *port)
|
||||
{
|
||||
struct uart_max3110 *max =
|
||||
container_of(port, struct uart_max3110, port);
|
||||
u16 config = 0;
|
||||
int ret = 0;
|
||||
|
||||
if (port->line != 0)
|
||||
pr_err(PR_FMT "uart port startup failed\n");
|
||||
|
||||
/* firstly disable all IRQ and config it to 115200, 8n1 */
|
||||
config = WC_TAG | WC_FIFO_ENABLE
|
||||
| WC_1_STOPBITS
|
||||
| WC_8BIT_WORD
|
||||
| WC_BAUD_DR2;
|
||||
ret = max3110_out(max, config);
|
||||
|
||||
/* as we use thread to handle tx/rx, need set low latency */
|
||||
port->state->port.tty->low_latency = 1;
|
||||
|
||||
#ifdef CONFIG_MRST_MAX3110_IRQ
|
||||
ret = request_irq(max->irq, serial_m3110_irq,
|
||||
IRQ_TYPE_EDGE_FALLING, "max3110", max);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* enable RX IRQ only */
|
||||
config |= WC_RXA_IRQ_ENABLE;
|
||||
max3110_out(max, config);
|
||||
#else
|
||||
/* if IRQ is disabled, start a read thread for input data */
|
||||
max->read_thread =
|
||||
kthread_run(max3110_read_thread, max, "max3110_read");
|
||||
#endif
|
||||
|
||||
max->cur_conf = config;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void serial_m3110_shutdown(struct uart_port *port)
|
||||
{
|
||||
struct uart_max3110 *max =
|
||||
container_of(port, struct uart_max3110, port);
|
||||
u16 config;
|
||||
|
||||
if (max->read_thread) {
|
||||
kthread_stop(max->read_thread);
|
||||
max->read_thread = NULL;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MRST_MAX3110_IRQ
|
||||
free_irq(max->irq, max);
|
||||
#endif
|
||||
|
||||
/* Disable interrupts from this port */
|
||||
config = WC_TAG | WC_SW_SHDI;
|
||||
max3110_out(max, config);
|
||||
}
|
||||
|
||||
static void serial_m3110_release_port(struct uart_port *port)
|
||||
{
|
||||
}
|
||||
|
||||
static int serial_m3110_request_port(struct uart_port *port)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void serial_m3110_config_port(struct uart_port *port, int flags)
|
||||
{
|
||||
/* give it fake type */
|
||||
port->type = PORT_PXA;
|
||||
}
|
||||
|
||||
static int
|
||||
serial_m3110_verify_port(struct uart_port *port, struct serial_struct *ser)
|
||||
{
|
||||
/* we don't want the core code to modify any port params */
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
||||
static const char *serial_m3110_type(struct uart_port *port)
|
||||
{
|
||||
struct uart_max3110 *max =
|
||||
container_of(port, struct uart_max3110, port);
|
||||
return max->name;
|
||||
}
|
||||
|
||||
static void
|
||||
serial_m3110_set_termios(struct uart_port *port, struct ktermios *termios,
|
||||
struct ktermios *old)
|
||||
{
|
||||
struct uart_max3110 *max =
|
||||
container_of(port, struct uart_max3110, port);
|
||||
unsigned char cval;
|
||||
unsigned int baud, parity = 0;
|
||||
int clk_div = -1;
|
||||
u16 new_conf = max->cur_conf;
|
||||
|
||||
switch (termios->c_cflag & CSIZE) {
|
||||
case CS7:
|
||||
cval = UART_LCR_WLEN7;
|
||||
new_conf |= WC_7BIT_WORD;
|
||||
break;
|
||||
default:
|
||||
case CS8:
|
||||
cval = UART_LCR_WLEN8;
|
||||
new_conf |= WC_8BIT_WORD;
|
||||
break;
|
||||
}
|
||||
|
||||
baud = uart_get_baud_rate(port, termios, old, 0, 230400);
|
||||
|
||||
/* first calc the div for 1.8MHZ clock case */
|
||||
switch (baud) {
|
||||
case 300:
|
||||
clk_div = WC_BAUD_DR384;
|
||||
break;
|
||||
case 600:
|
||||
clk_div = WC_BAUD_DR192;
|
||||
break;
|
||||
case 1200:
|
||||
clk_div = WC_BAUD_DR96;
|
||||
break;
|
||||
case 2400:
|
||||
clk_div = WC_BAUD_DR48;
|
||||
break;
|
||||
case 4800:
|
||||
clk_div = WC_BAUD_DR24;
|
||||
break;
|
||||
case 9600:
|
||||
clk_div = WC_BAUD_DR12;
|
||||
break;
|
||||
case 19200:
|
||||
clk_div = WC_BAUD_DR6;
|
||||
break;
|
||||
case 38400:
|
||||
clk_div = WC_BAUD_DR3;
|
||||
break;
|
||||
case 57600:
|
||||
clk_div = WC_BAUD_DR2;
|
||||
break;
|
||||
case 115200:
|
||||
clk_div = WC_BAUD_DR1;
|
||||
break;
|
||||
case 230400:
|
||||
if (max->clock & MAX3110_HIGH_CLK)
|
||||
break;
|
||||
default:
|
||||
/* pick the previous baud rate */
|
||||
baud = max->baud;
|
||||
clk_div = max->cur_conf & WC_BAUD_DIV_MASK;
|
||||
tty_termios_encode_baud_rate(termios, baud, baud);
|
||||
}
|
||||
|
||||
if (max->clock & MAX3110_HIGH_CLK) {
|
||||
clk_div += 1;
|
||||
/* high clk version max3110 doesn't support B300 */
|
||||
if (baud == 300)
|
||||
baud = 600;
|
||||
if (baud == 230400)
|
||||
clk_div = WC_BAUD_DR1;
|
||||
tty_termios_encode_baud_rate(termios, baud, baud);
|
||||
}
|
||||
|
||||
new_conf = (new_conf & ~WC_BAUD_DIV_MASK) | clk_div;
|
||||
if (termios->c_cflag & CSTOPB)
|
||||
new_conf |= WC_2_STOPBITS;
|
||||
else
|
||||
new_conf &= ~WC_2_STOPBITS;
|
||||
|
||||
if (termios->c_cflag & PARENB) {
|
||||
new_conf |= WC_PARITY_ENABLE;
|
||||
parity |= UART_LCR_PARITY;
|
||||
} else
|
||||
new_conf &= ~WC_PARITY_ENABLE;
|
||||
|
||||
if (!(termios->c_cflag & PARODD))
|
||||
parity |= UART_LCR_EPAR;
|
||||
max->parity = parity;
|
||||
|
||||
uart_update_timeout(port, termios->c_cflag, baud);
|
||||
|
||||
new_conf |= WC_TAG;
|
||||
if (new_conf != max->cur_conf) {
|
||||
max3110_out(max, new_conf);
|
||||
max->cur_conf = new_conf;
|
||||
max->baud = baud;
|
||||
}
|
||||
}
|
||||
|
||||
/* don't handle hw handshaking */
|
||||
static unsigned int serial_m3110_get_mctrl(struct uart_port *port)
|
||||
{
|
||||
return TIOCM_DSR | TIOCM_CAR | TIOCM_DSR;
|
||||
}
|
||||
|
||||
static void serial_m3110_set_mctrl(struct uart_port *port, unsigned int mctrl)
|
||||
{
|
||||
}
|
||||
|
||||
static void serial_m3110_break_ctl(struct uart_port *port, int break_state)
|
||||
{
|
||||
}
|
||||
|
||||
static void serial_m3110_pm(struct uart_port *port, unsigned int state,
|
||||
unsigned int oldstate)
|
||||
{
|
||||
}
|
||||
|
||||
static void serial_m3110_enable_ms(struct uart_port *port)
|
||||
{
|
||||
}
|
||||
|
||||
struct uart_ops serial_m3110_ops = {
|
||||
.tx_empty = serial_m3110_tx_empty,
|
||||
.set_mctrl = serial_m3110_set_mctrl,
|
||||
.get_mctrl = serial_m3110_get_mctrl,
|
||||
.stop_tx = serial_m3110_stop_tx,
|
||||
.start_tx = serial_m3110_start_tx,
|
||||
.stop_rx = serial_m3110_stop_rx,
|
||||
.enable_ms = serial_m3110_enable_ms,
|
||||
.break_ctl = serial_m3110_break_ctl,
|
||||
.startup = serial_m3110_startup,
|
||||
.shutdown = serial_m3110_shutdown,
|
||||
.set_termios = serial_m3110_set_termios, /* must have */
|
||||
.pm = serial_m3110_pm,
|
||||
.type = serial_m3110_type,
|
||||
.release_port = serial_m3110_release_port,
|
||||
.request_port = serial_m3110_request_port,
|
||||
.config_port = serial_m3110_config_port,
|
||||
.verify_port = serial_m3110_verify_port,
|
||||
};
|
||||
|
||||
static struct uart_driver serial_m3110_reg = {
|
||||
.owner = THIS_MODULE,
|
||||
.driver_name = "MRST serial",
|
||||
.dev_name = "ttyS",
|
||||
.major = TTY_MAJOR,
|
||||
.minor = 64,
|
||||
.nr = 1,
|
||||
.cons = MRST_CONSOLE,
|
||||
};
|
||||
|
||||
static int serial_m3110_suspend(struct spi_device *spi, pm_message_t state)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int serial_m3110_resume(struct spi_device *spi)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct dw_spi_chip spi0_uart = {
|
||||
.poll_mode = 1,
|
||||
.enable_dma = 0,
|
||||
.type = SPI_FRF_SPI,
|
||||
};
|
||||
|
||||
static int serial_m3110_probe(struct spi_device *spi)
|
||||
{
|
||||
struct uart_max3110 *max;
|
||||
int ret;
|
||||
unsigned char *buffer;
|
||||
|
||||
max = kzalloc(sizeof(*max), GFP_KERNEL);
|
||||
if (!max)
|
||||
return -ENOMEM;
|
||||
|
||||
/* set spi info */
|
||||
spi->mode = SPI_MODE_0;
|
||||
spi->bits_per_word = 16;
|
||||
max->clock = MAX3110_HIGH_CLK;
|
||||
spi->controller_data = &spi0_uart;
|
||||
|
||||
spi_setup(spi);
|
||||
|
||||
max->port.type = PORT_PXA; /* need apply for a max3110 type */
|
||||
max->port.fifosize = 2; /* only have 16b buffer */
|
||||
max->port.ops = &serial_m3110_ops;
|
||||
max->port.line = 0;
|
||||
max->port.dev = &spi->dev;
|
||||
max->port.uartclk = 115200;
|
||||
|
||||
max->spi = spi;
|
||||
max->name = spi->modalias; /* use spi name as the name */
|
||||
max->irq = (u16)spi->irq;
|
||||
|
||||
spin_lock_init(&max->lock);
|
||||
|
||||
max->word_7bits = 0;
|
||||
max->parity = 0;
|
||||
max->baud = 0;
|
||||
|
||||
max->cur_conf = 0;
|
||||
atomic_set(&max->irq_pending, 0);
|
||||
|
||||
buffer = (unsigned char *)__get_free_page(GFP_KERNEL);
|
||||
if (!buffer) {
|
||||
ret = -ENOMEM;
|
||||
goto err_get_page;
|
||||
}
|
||||
max->con_xmit.buf = (unsigned char *)buffer;
|
||||
max->con_xmit.head = max->con_xmit.tail = 0;
|
||||
|
||||
max->main_thread = kthread_run(max3110_main_thread,
|
||||
max, "max3110_main");
|
||||
if (IS_ERR(max->main_thread)) {
|
||||
ret = PTR_ERR(max->main_thread);
|
||||
goto err_kthread;
|
||||
}
|
||||
|
||||
pmax = max;
|
||||
/* give membase a psudo value to pass serial_core's check */
|
||||
max->port.membase = (void *)0xff110000;
|
||||
uart_add_one_port(&serial_m3110_reg, &max->port);
|
||||
|
||||
return 0;
|
||||
|
||||
err_kthread:
|
||||
free_page((unsigned long)buffer);
|
||||
err_get_page:
|
||||
pmax = NULL;
|
||||
kfree(max);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int max3110_remove(struct spi_device *dev)
|
||||
{
|
||||
struct uart_max3110 *max = pmax;
|
||||
|
||||
if (!pmax)
|
||||
return 0;
|
||||
|
||||
pmax = NULL;
|
||||
uart_remove_one_port(&serial_m3110_reg, &max->port);
|
||||
|
||||
free_page((unsigned long)max->con_xmit.buf);
|
||||
|
||||
if (max->main_thread)
|
||||
kthread_stop(max->main_thread);
|
||||
|
||||
kfree(max);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct spi_driver uart_max3110_driver = {
|
||||
.driver = {
|
||||
.name = "spi_max3111",
|
||||
.bus = &spi_bus_type,
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
.probe = serial_m3110_probe,
|
||||
.remove = __devexit_p(max3110_remove),
|
||||
.suspend = serial_m3110_suspend,
|
||||
.resume = serial_m3110_resume,
|
||||
};
|
||||
|
||||
|
||||
int __init serial_m3110_init(void)
|
||||
{
|
||||
int ret = 0;
|
||||
|
||||
ret = uart_register_driver(&serial_m3110_reg);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = spi_register_driver(&uart_max3110_driver);
|
||||
if (ret)
|
||||
uart_unregister_driver(&serial_m3110_reg);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
void __exit serial_m3110_exit(void)
|
||||
{
|
||||
spi_unregister_driver(&uart_max3110_driver);
|
||||
uart_unregister_driver(&serial_m3110_reg);
|
||||
}
|
||||
|
||||
module_init(serial_m3110_init);
|
||||
module_exit(serial_m3110_exit);
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_ALIAS("max3110-uart");
|
||||
|
|
@ -0,0 +1,59 @@
|
|||
#ifndef _MRST_MAX3110_H
|
||||
#define _MRST_MAX3110_H
|
||||
|
||||
#define MAX3110_HIGH_CLK 0x1 /* 3.6864 MHZ */
|
||||
#define MAX3110_LOW_CLK 0x0 /* 1.8432 MHZ */
|
||||
|
||||
/* status bits for all 4 MAX3110 operate modes */
|
||||
#define MAX3110_READ_DATA_AVAILABLE (1 << 15)
|
||||
#define MAX3110_WRITE_BUF_EMPTY (1 << 14)
|
||||
|
||||
#define WC_TAG (3 << 14)
|
||||
#define RC_TAG (1 << 14)
|
||||
#define WD_TAG (2 << 14)
|
||||
#define RD_TAG (0 << 14)
|
||||
|
||||
/* bits def for write configuration */
|
||||
#define WC_FIFO_ENABLE_MASK (1 << 13)
|
||||
#define WC_FIFO_ENABLE (0 << 13)
|
||||
|
||||
#define WC_SW_SHDI (1 << 12)
|
||||
|
||||
#define WC_IRQ_MASK (0xF << 8)
|
||||
#define WC_TXE_IRQ_ENABLE (1 << 11) /* TX empty irq */
|
||||
#define WC_RXA_IRQ_ENABLE (1 << 10) /* RX availabe irq */
|
||||
#define WC_PAR_HIGH_IRQ_ENABLE (1 << 9)
|
||||
#define WC_REC_ACT_IRQ_ENABLE (1 << 8)
|
||||
|
||||
#define WC_IRDA_ENABLE (1 << 7)
|
||||
|
||||
#define WC_STOPBITS_MASK (1 << 6)
|
||||
#define WC_2_STOPBITS (1 << 6)
|
||||
#define WC_1_STOPBITS (0 << 6)
|
||||
|
||||
#define WC_PARITY_ENABLE_MASK (1 << 5)
|
||||
#define WC_PARITY_ENABLE (1 << 5)
|
||||
|
||||
#define WC_WORDLEN_MASK (1 << 4)
|
||||
#define WC_7BIT_WORD (1 << 4)
|
||||
#define WC_8BIT_WORD (0 << 4)
|
||||
|
||||
#define WC_BAUD_DIV_MASK (0xF)
|
||||
#define WC_BAUD_DR1 (0x0)
|
||||
#define WC_BAUD_DR2 (0x1)
|
||||
#define WC_BAUD_DR4 (0x2)
|
||||
#define WC_BAUD_DR8 (0x3)
|
||||
#define WC_BAUD_DR16 (0x4)
|
||||
#define WC_BAUD_DR32 (0x5)
|
||||
#define WC_BAUD_DR64 (0x6)
|
||||
#define WC_BAUD_DR128 (0x7)
|
||||
#define WC_BAUD_DR3 (0x8)
|
||||
#define WC_BAUD_DR6 (0x9)
|
||||
#define WC_BAUD_DR12 (0xA)
|
||||
#define WC_BAUD_DR24 (0xB)
|
||||
#define WC_BAUD_DR48 (0xC)
|
||||
#define WC_BAUD_DR96 (0xD)
|
||||
#define WC_BAUD_DR192 (0xE)
|
||||
#define WC_BAUD_DR384 (0xF)
|
||||
|
||||
#endif
|
||||
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