microblaze: Add define for ASM_LOOP
It is default option but both options must be measured. Signed-off-by: Michal Simek <monstr@monstr.eu>
This commit is contained in:
Родитель
dcbae4be90
Коммит
22607a2821
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@ -15,25 +15,6 @@
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#include <asm/cpuinfo.h>
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#include <asm/pvr.h>
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static inline void __invalidate_flush_icache(unsigned int addr)
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{
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__asm__ __volatile__ ("wic %0, r0;" \
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: : "r" (addr));
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}
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static inline void __flush_dcache(unsigned int addr)
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{
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__asm__ __volatile__ ("wdc.flush %0, r0;" \
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: : "r" (addr));
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}
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static inline void __invalidate_dcache(unsigned int baseaddr,
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unsigned int offset)
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{
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__asm__ __volatile__ ("wdc.clear %0, %1;" \
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: : "r" (baseaddr), "r" (offset));
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}
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static inline void __enable_icache_msr(void)
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{
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__asm__ __volatile__ (" msrset r0, %0; \
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@ -148,9 +129,9 @@ do { \
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int step = -line_length; \
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BUG_ON(step >= 0); \
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\
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__asm__ __volatile__ (" 1: " #op " r0, %0; \
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bgtid %0, 1b; \
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addk %0, %0, %1; \
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__asm__ __volatile__ (" 1: " #op " r0, %0; \
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bgtid %0, 1b; \
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addk %0, %0, %1; \
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" : : "r" (len), "r" (step) \
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: "memory"); \
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} while (0);
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@ -162,9 +143,9 @@ do { \
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int count = end - start; \
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BUG_ON(count <= 0); \
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\
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__asm__ __volatile__ (" 1: " #op " %0, %1; \
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bgtid %1, 1b; \
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addk %1, %1, %2; \
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__asm__ __volatile__ (" 1: " #op " %0, %1; \
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bgtid %1, 1b; \
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addk %1, %1, %2; \
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" : : "r" (start), "r" (count), \
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"r" (step) : "memory"); \
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} while (0);
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@ -175,7 +156,7 @@ do { \
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int volatile temp; \
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BUG_ON(end - start <= 0); \
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\
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__asm__ __volatile__ (" 1: " #op " %1, r0; \
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__asm__ __volatile__ (" 1: " #op " %1, r0; \
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cmpu %0, %1, %2; \
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bgtid %0, 1b; \
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addk %1, %1, %3; \
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@ -183,10 +164,14 @@ do { \
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"r" (line_length) : "memory"); \
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} while (0);
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#define ASM_LOOP
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static void __flush_icache_range_msr_irq(unsigned long start, unsigned long end)
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{
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unsigned long flags;
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#ifndef ASM_LOOP
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int i;
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#endif
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pr_debug("%s: start 0x%x, end 0x%x\n", __func__,
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(unsigned int)start, (unsigned int) end);
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@ -196,8 +181,13 @@ static void __flush_icache_range_msr_irq(unsigned long start, unsigned long end)
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local_irq_save(flags);
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__disable_icache_msr();
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#ifdef ASM_LOOP
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CACHE_RANGE_LOOP_1(start, end, cpuinfo.icache_line_length, wic);
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#else
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for (i = start; i < end; i += cpuinfo.icache_line_length)
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__asm__ __volatile__ ("wic %0, r0;" \
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: : "r" (i));
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#endif
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__enable_icache_msr();
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local_irq_restore(flags);
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}
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@ -206,7 +196,9 @@ static void __flush_icache_range_nomsr_irq(unsigned long start,
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unsigned long end)
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{
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unsigned long flags;
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#ifndef ASM_LOOP
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int i;
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#endif
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pr_debug("%s: start 0x%x, end 0x%x\n", __func__,
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(unsigned int)start, (unsigned int) end);
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@ -216,7 +208,13 @@ static void __flush_icache_range_nomsr_irq(unsigned long start,
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local_irq_save(flags);
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__disable_icache_nomsr();
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#ifdef ASM_LOOP
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CACHE_RANGE_LOOP_1(start, end, cpuinfo.icache_line_length, wic);
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#else
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for (i = start; i < end; i += cpuinfo.icache_line_length)
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__asm__ __volatile__ ("wic %0, r0;" \
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: : "r" (i));
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#endif
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__enable_icache_nomsr();
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local_irq_restore(flags);
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@ -225,25 +223,41 @@ static void __flush_icache_range_nomsr_irq(unsigned long start,
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static void __flush_icache_range_noirq(unsigned long start,
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unsigned long end)
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{
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#ifndef ASM_LOOP
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int i;
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#endif
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pr_debug("%s: start 0x%x, end 0x%x\n", __func__,
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(unsigned int)start, (unsigned int) end);
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CACHE_LOOP_LIMITS(start, end,
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cpuinfo.icache_line_length, cpuinfo.icache_size);
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#ifdef ASM_LOOP
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CACHE_RANGE_LOOP_1(start, end, cpuinfo.icache_line_length, wic);
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#else
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for (i = start; i < end; i += cpuinfo.icache_line_length)
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__asm__ __volatile__ ("wic %0, r0;" \
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: : "r" (i));
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#endif
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}
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static void __flush_icache_all_msr_irq(void)
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{
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unsigned long flags;
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#ifndef ASM_LOOP
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int i;
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#endif
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pr_debug("%s\n", __func__);
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local_irq_save(flags);
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__disable_icache_msr();
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#ifdef ASM_LOOP
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CACHE_ALL_LOOP(cpuinfo.icache_size, cpuinfo.icache_line_length, wic);
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#else
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for (i = 0; i < cpuinfo.icache_size;
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i += cpuinfo.icache_line_length)
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__asm__ __volatile__ ("wic %0, r0;" \
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: : "r" (i));
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#endif
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__enable_icache_msr();
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local_irq_restore(flags);
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}
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@ -251,35 +265,59 @@ static void __flush_icache_all_msr_irq(void)
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static void __flush_icache_all_nomsr_irq(void)
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{
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unsigned long flags;
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#ifndef ASM_LOOP
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int i;
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#endif
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pr_debug("%s\n", __func__);
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local_irq_save(flags);
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__disable_icache_nomsr();
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#ifdef ASM_LOOP
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CACHE_ALL_LOOP(cpuinfo.icache_size, cpuinfo.icache_line_length, wic);
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#else
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for (i = 0; i < cpuinfo.icache_size;
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i += cpuinfo.icache_line_length)
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__asm__ __volatile__ ("wic %0, r0;" \
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: : "r" (i));
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#endif
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__enable_icache_nomsr();
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local_irq_restore(flags);
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}
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static void __flush_icache_all_noirq(void)
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{
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#ifndef ASM_LOOP
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int i;
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#endif
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pr_debug("%s\n", __func__);
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#ifdef ASM_LOOP
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CACHE_ALL_LOOP(cpuinfo.icache_size, cpuinfo.icache_line_length, wic);
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#else
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for (i = 0; i < cpuinfo.icache_size;
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i += cpuinfo.icache_line_length)
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__asm__ __volatile__ ("wic %0, r0;" \
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: : "r" (i));
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#endif
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}
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static void __invalidate_dcache_all_msr_irq(void)
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{
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unsigned long flags;
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#ifndef ASM_LOOP
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int i;
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#endif
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pr_debug("%s\n", __func__);
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local_irq_save(flags);
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__disable_dcache_msr();
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#ifdef ASM_LOOP
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CACHE_ALL_LOOP(cpuinfo.dcache_size, cpuinfo.dcache_line_length, wdc);
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#else
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for (i = 0; i < cpuinfo.dcache_size;
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i += cpuinfo.dcache_line_length)
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__asm__ __volatile__ ("wdc %0, r0;" \
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: : "r" (i));
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#endif
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__enable_dcache_msr();
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local_irq_restore(flags);
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}
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@ -287,60 +325,107 @@ static void __invalidate_dcache_all_msr_irq(void)
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static void __invalidate_dcache_all_nomsr_irq(void)
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{
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unsigned long flags;
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#ifndef ASM_LOOP
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int i;
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#endif
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pr_debug("%s\n", __func__);
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local_irq_save(flags);
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__disable_dcache_nomsr();
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#ifdef ASM_LOOP
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CACHE_ALL_LOOP(cpuinfo.dcache_size, cpuinfo.dcache_line_length, wdc);
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#else
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for (i = 0; i < cpuinfo.dcache_size;
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i += cpuinfo.dcache_line_length)
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__asm__ __volatile__ ("wdc %0, r0;" \
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: : "r" (i));
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#endif
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__enable_dcache_nomsr();
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local_irq_restore(flags);
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}
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static void __invalidate_dcache_all_noirq_wt(void)
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{
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#ifndef ASM_LOOP
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int i;
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#endif
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pr_debug("%s\n", __func__);
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#ifdef ASM_LOOP
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CACHE_ALL_LOOP(cpuinfo.dcache_size, cpuinfo.dcache_line_length, wdc)
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#else
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for (i = 0; i < cpuinfo.dcache_size;
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i += cpuinfo.dcache_line_length)
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__asm__ __volatile__ ("wdc %0, r0;" \
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: : "r" (i));
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#endif
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}
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/* FIXME this is weird - should be only wdc but not work
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* MS: I am getting bus errors and other weird things */
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static void __invalidate_dcache_all_wb(void)
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{
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#ifndef ASM_LOOP
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int i;
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#endif
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pr_debug("%s\n", __func__);
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#ifdef ASM_LOOP
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CACHE_ALL_LOOP2(cpuinfo.dcache_size, cpuinfo.dcache_line_length,
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wdc.clear)
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#else
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for (i = 0; i < cpuinfo.dcache_size;
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i += cpuinfo.dcache_line_length)
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__asm__ __volatile__ ("wdc.clear %0, r0;" \
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: : "r" (i));
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#endif
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}
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static void __invalidate_dcache_range_wb(unsigned long start,
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unsigned long end)
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{
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#ifndef ASM_LOOP
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int i;
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#endif
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pr_debug("%s: start 0x%x, end 0x%x\n", __func__,
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(unsigned int)start, (unsigned int) end);
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CACHE_LOOP_LIMITS(start, end,
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cpuinfo.dcache_line_length, cpuinfo.dcache_size);
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#ifdef ASM_LOOP
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CACHE_RANGE_LOOP_2(start, end, cpuinfo.dcache_line_length, wdc.clear);
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#else
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for (i = start; i < end; i += cpuinfo.icache_line_length)
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__asm__ __volatile__ ("wdc.clear %0, r0;" \
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: : "r" (i));
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#endif
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}
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static void __invalidate_dcache_range_nomsr_wt(unsigned long start,
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unsigned long end)
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{
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#ifndef ASM_LOOP
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int i;
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#endif
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pr_debug("%s: start 0x%x, end 0x%x\n", __func__,
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(unsigned int)start, (unsigned int) end);
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CACHE_LOOP_LIMITS(start, end,
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cpuinfo.dcache_line_length, cpuinfo.dcache_size);
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#ifdef ASM_LOOP
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CACHE_RANGE_LOOP_1(start, end, cpuinfo.dcache_line_length, wdc);
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#else
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for (i = start; i < end; i += cpuinfo.icache_line_length)
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__asm__ __volatile__ ("wdc %0, r0;" \
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: : "r" (i));
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#endif
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}
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static void __invalidate_dcache_range_msr_irq_wt(unsigned long start,
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unsigned long end)
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{
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unsigned long flags;
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#ifndef ASM_LOOP
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int i;
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#endif
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pr_debug("%s: start 0x%x, end 0x%x\n", __func__,
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(unsigned int)start, (unsigned int) end);
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CACHE_LOOP_LIMITS(start, end,
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@ -349,7 +434,13 @@ static void __invalidate_dcache_range_msr_irq_wt(unsigned long start,
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local_irq_save(flags);
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__disable_dcache_msr();
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#ifdef ASM_LOOP
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CACHE_RANGE_LOOP_1(start, end, cpuinfo.dcache_line_length, wdc);
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#else
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for (i = start; i < end; i += cpuinfo.icache_line_length)
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__asm__ __volatile__ ("wdc %0, r0;" \
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: : "r" (i));
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#endif
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__enable_dcache_msr();
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local_irq_restore(flags);
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@ -359,7 +450,9 @@ static void __invalidate_dcache_range_nomsr_irq(unsigned long start,
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unsigned long end)
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{
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unsigned long flags;
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#ifndef ASM_LOOP
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int i;
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#endif
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pr_debug("%s: start 0x%x, end 0x%x\n", __func__,
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(unsigned int)start, (unsigned int) end);
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@ -369,7 +462,13 @@ static void __invalidate_dcache_range_nomsr_irq(unsigned long start,
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local_irq_save(flags);
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__disable_dcache_nomsr();
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#ifdef ASM_LOOP
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CACHE_RANGE_LOOP_1(start, end, cpuinfo.dcache_line_length, wdc);
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#else
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for (i = start; i < end; i += cpuinfo.icache_line_length)
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__asm__ __volatile__ ("wdc %0, r0;" \
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: : "r" (i));
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#endif
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__enable_dcache_nomsr();
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local_irq_restore(flags);
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@ -377,19 +476,38 @@ static void __invalidate_dcache_range_nomsr_irq(unsigned long start,
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static void __flush_dcache_all_wb(void)
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{
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#ifndef ASM_LOOP
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int i;
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#endif
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pr_debug("%s\n", __func__);
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#ifdef ASM_LOOP
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CACHE_ALL_LOOP(cpuinfo.dcache_size, cpuinfo.dcache_line_length,
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wdc.flush);
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#else
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for (i = 0; i < cpuinfo.dcache_size;
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i += cpuinfo.dcache_line_length)
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__asm__ __volatile__ ("wdc.flush %0, r0;" \
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: : "r" (i));
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#endif
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}
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static void __flush_dcache_range_wb(unsigned long start, unsigned long end)
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{
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#ifndef ASM_LOOP
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int i;
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#endif
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pr_debug("%s: start 0x%x, end 0x%x\n", __func__,
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(unsigned int)start, (unsigned int) end);
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CACHE_LOOP_LIMITS(start, end,
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cpuinfo.dcache_line_length, cpuinfo.dcache_size);
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#ifdef ASM_LOOP
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CACHE_RANGE_LOOP_2(start, end, cpuinfo.dcache_line_length, wdc.flush);
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#else
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for (i = start; i < end; i += cpuinfo.icache_line_length)
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__asm__ __volatile__ ("wdc.flush %0, r0;" \
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: : "r" (i));
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#endif
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}
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/* struct for wb caches and for wt caches */
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